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[v3,1/8] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs
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| 4 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[v3,7/8] arm64: dts: renesas: rzg3s-smarc: Enable SCIF3
[v3,1/8] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs
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2024-11-15
Claudiu
New
[v3,5/8] arm64: dts: renesas: rzg3s-smarc: Fix the debug serial alias
[v3,1/8] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs
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-
-
2024-11-15
Claudiu
New
[v3,3/8] serial: sh-sci: Update the suspend/resume support
[v3,1/8] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs
-
-
-
2024-11-15
Claudiu
New
[v3,1/8] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs
[v3,1/8] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs
-
-
-
2024-11-15
Claudiu
New