Show patches with: Submitter = Yash Shah       |    Archived = No       |   13 patches
Patch Series S/W/F Date Submitter Delegate State
[v3,2/2] RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 riscv: sifive_l2_cache: Add support for SiFive FU740 SoC --- 2020-12-10 Yash Shah Accepted
[v3,1/2] dt-bindings: riscv: Update l2 cache DT documentation to add support for SiFive FU740 riscv: sifive_l2_cache: Add support for SiFive FU740 SoC --- 2020-12-10 Yash Shah Accepted
[v2,9/9] riscv: dts: add initial board data for the SiFive HiFive Unmatched [v2,1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC --- 2020-12-08 Yash Shah Accepted
[v2,7/9] riscv: dts: add initial support for the SiFive FU740-C000 SoC [v2,1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC --- 2020-12-08 Yash Shah Accepted
[v2,3/9] dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC [v2,1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC --- 2020-12-08 Yash Shah Accepted
[v2,2/9] dt-bindings: spi: Update DT binding docs to support SiFive FU740 SoC [v2,1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC --- 2020-12-08 Yash Shah Accepted
[v2,1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC [v2,1/9] dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC --- 2020-12-08 Yash Shah Accepted
[3/4] dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board arch: riscv: add board and SoC DT file support --- 2020-12-02 Yash Shah Accepted
[v2,2/2] RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 [v2,1/2] RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 --- 2020-11-30 Yash Shah New
[v2,1/2] RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 [v2,1/2] RISC-V: Update l2 cache DT documentation to add support for SiFive FU740 --- 2020-11-30 Yash Shah Superseded
[2/3] soc: sifive: Add SiFive specific Cadence DDR controller driver SiFive DDR controller and EDAC support --- 2020-08-25 Yash Shah New
[2/3] riscv: dts: fu540-c000: define hart clocks Dynamic CPU frequency switching for the HiFive --- 2020-06-16 Yash Shah New
[v2,2/2] riscv: cacheinfo: Add support to determine no. of L2 cache way enabled L2 ccache DT and cacheinfo support to read no. of L2 cache ways enabled --- 2020-01-03 Yash Shah New