Toggle navigation
Patchwork
Patches credited to philippe.mathieu-daude@linaro.org
Login
Register
Mail settings
Current Team Memberships
team-tcwg
Show patches with
: Series =
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
| State =
Action Required
| Archived =
No
| 6 patches
Series
Submitter
State
any
Action Required
New
Under Review
Accepted
Rejected
RFC
Not Applicable
Changes Requested
Awaiting Upstream
Superseded
Deferred
Search
Archived
No
Yes
Both
Apply
Patch
Series
S/W/F
Date
Submitter
Delegate
State
[15/20] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[11/20] hw/net/xilinx_ethlite: Access RX_CTRL register for each port
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[10/20] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[08/20] hw/net/xilinx_ethlite: Add addr_to_port_index() helper
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[07/20] hw/net/xilinx_ethlite: Rename rxbuf -> port_index
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
[05/20] hw/net/xilinx_ethlite: Correct maximum RX buffer size
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
-
-
-
2024-11-12
Philippe Mathieu-Daudé
New
Bundling
Create bundle: