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There are 40917 patches submitted by members of this team, and 10499 of those have been accepted upstream.

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Show patches with: Series = hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls       |    Archived = No       |   20 patches
Patch Series S/W/F Date Submitter Delegate State
[20/20] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container' hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[19/20] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[18/20] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[17/20] hw/net/xilinx_ethlite: Map TX_GIE as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[16/20] hw/net/xilinx_ethlite: Map TX_LEN as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[15/20] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé New
[14/20] hw/net/xilinx_ethlite: Access TX_CTRL register for each port hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[13/20] hw/net/xilinx_ethlite: Access TX_LEN register for each port hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[12/20] hw/net/xilinx_ethlite: Access TX_GIE register for each port hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[11/20] hw/net/xilinx_ethlite: Access RX_CTRL register for each port hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé New
[10/20] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé New
[09/20] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[08/20] hw/net/xilinx_ethlite: Add addr_to_port_index() helper hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé New
[07/20] hw/net/xilinx_ethlite: Rename rxbuf -> port_index hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé New
[06/20] hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented) hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[05/20] hw/net/xilinx_ethlite: Correct maximum RX buffer size hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé New
[04/20] hw/net/xilinx_ethlite: Update QOM style hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[03/20] hw/net/xilinx_ethlite: Remove unuseful debug logs hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[02/20] hw/net/xilinx_ethlite: Convert some debug logs to trace events hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded
[01/20] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls --- 2024-11-12 Philippe Mathieu-Daudé Superseded