Patch Metrics

There are 40094 patches submitted by members of this team, and 10355 of those have been accepted upstream.

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Show patches with: Series = [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics       |   26 patches
Patch Series S/W/F Date Submitter Delegate State
[PULL,26/33] hw/timer/nrf51_timer: Don't lose time when timer is queried in tight loop [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,25/33] hw/sd/allwinner-sdhost: Don't send non-boolean IRQ line levels [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,24/33] hw/intc/allwinner-a10-pic: Handle IRQ levels other than 0 or 1 [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,23/33] target/arm: Convert load/store tags insns to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,22/33] target/arm: Convert load/store single structure to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,21/33] target/arm: Convert load/store (multiple structures) to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,20/33] target/arm: Convert LDAPR/STLR (imm) to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,19/33] target/arm: Convert load (pointer auth) insns to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,18/33] target/arm: Convert atomic memory ops to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,17/33] target/arm: Convert LDR/STR reg+reg to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,16/33] target/arm: Convert LDR/STR with 12-bit immediate to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,15/33] target/arm: Convert ld/st reg+imm9 insns to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,14/33] target/arm: Convert load/store-pair to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,13/33] target/arm: Convert load reg (literal) group to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,12/33] target/arm: Convert LDXP, STXP, CASP, CAS to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,11/33] target/arm: Convert load/store exclusive and ordered to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,10/33] target/arm: Convert exception generation instructions to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,09/33] target/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,08/33] target/arm: Convert MSR (immediate) to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,07/33] target/arm: Convert CFINV, XAFLAG and AXFLAG to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,06/33] target/arm: Convert barrier insns to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,05/33] target/arm: Convert hint instruction space to decodetree [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,04/33] target/arm: Consistently use finalize_memop_asimd() for ASIMD loads/stores [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,03/33] target/arm: Pass memop to gen_mte_check1_mmuidx() in reg_imm9 decode [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,02/33] target/arm: Return correct result for LDG when ATA=0 [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted
[PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics [PULL,01/33] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics --- 2023-06-19 Peter Maydell Accepted