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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 31-v6si14737134plk.699.2018.03.08.05.29.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Mar 2018 05:30:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=dgoG+D/N; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 66DC422135D20; Thu, 8 Mar 2018 05:23:43 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c05::243; helo=mail-pg0-x243.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E2A05209574F3 for ; Thu, 8 Mar 2018 05:23:41 -0800 (PST) Received: by mail-pg0-x243.google.com with SMTP id r26so2204380pgv.13 for ; Thu, 08 Mar 2018 05:29:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=8BnrUzwpSb560J7t6zdTuZEt/JjolKBa0fzmkwgz8qQ=; b=dgoG+D/Ns1dJpBFw8F3+pGMWqjpIGtHjF91Jjf2t9AwF1Q/3LihEpHbXlFjx2U95LA awneibBwvt4btHtlqz4R0XUwUSEyn7X77S+ZAUzNwfd+mx2EWwGVFuJGVF/m07kA2CeX cNb3N3O2e2w8tUuJhqrrtV1xiCzkk0NLYjZ30= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=8BnrUzwpSb560J7t6zdTuZEt/JjolKBa0fzmkwgz8qQ=; b=ScZR7aosrxy5Y3zhIKnpBaxgaIf+2xb8QLBqrfWZuI1KsKk3+0RqL4ZdcXcvBxUKhY eH074JooloW+XI3l2vq+SmrnIrkzI93g82HSkukmcN1HAVHUx6m+4U96aLXg+t7y15Cb dMLBUg/87pCvaTFS7pPJUdR3DrNFfQzkoUjVSHMR4lbN32hBp5DloE4KDYJYO/VCKE1P f29EuJtq1GS6VidUwwNGP8ZANc1zjFY7TAbT0DCIn2vGRQpyEMJYUEuncu2MTTtndUnP 2RU6aRF6A7gYOjL56UZmIeZSzLktLgSgjpxB+fXG+c+8ofcfMaUtUNpxZyg9gbjVmgpE XLsA== X-Gm-Message-State: APf1xPDfG9b4GEo1FR4elyf0yFhV/AwaBAykSnLWmAp8ouWDxrqwWD4h ZTbozxJswiQyjkbKsQD1V3zLmDh10vk= X-Received: by 10.99.122.70 with SMTP id j6mr19762513pgn.17.1520515797221; Thu, 08 Mar 2018 05:29:57 -0800 (PST) Received: from localhost.localdomain ([64.64.108.52]) by smtp.gmail.com with ESMTPSA id r14sm37331402pfh.83.2018.03.08.05.29.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Mar 2018 05:29:56 -0800 (PST) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Thu, 8 Mar 2018 21:29:50 +0800 Message-Id: <1520515790-29527-1-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [edk2] [PATCH v2 edk-platforms 1/4] Platform/Hisilicon/HiKey960: add gpio platform driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add gpio platform driver to enable GPIO in HiKey960 platform. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey960/HiKey960.dsc | 1 + Platform/Hisilicon/HiKey960/HiKey960.fdf | 1 + Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf | 35 +++++++++ Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.c | 77 ++++++++++++++++++++ 4 files changed, 114 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dsc b/Platform/Hisilicon/HiKey960/HiKey960.dsc index 36f43956ab40..3da1b8556321 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.dsc +++ b/Platform/Hisilicon/HiKey960/HiKey960.dsc @@ -179,6 +179,7 @@ [Components.common] # # GPIO # + Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # diff --git a/Platform/Hisilicon/HiKey960/HiKey960.fdf b/Platform/Hisilicon/HiKey960/HiKey960.fdf index 655032a36c53..162dbaaf2646 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.fdf +++ b/Platform/Hisilicon/HiKey960/HiKey960.fdf @@ -120,6 +120,7 @@ [FV.FvMain] # # GPIO # + INF Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # diff --git a/Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf b/Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf new file mode 100644 index 000000000000..a16213f02520 --- /dev/null +++ b/Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.inf @@ -0,0 +1,35 @@ +# +# Copyright (c) 2018, Linaro. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = HiKey960GpioDxe + FILE_GUID = 6aa12592-7e36-4aec-acf8-2ac2fd13815c + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKey960GpioEntryPoint + +[Sources] + HiKey960GpioDxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + UefiDriverEntryPoint + +[Protocols] + gPlatformGpioProtocolGuid + +[Depex] + TRUE diff --git a/Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.c b/Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.c new file mode 100644 index 000000000000..986feceea564 --- /dev/null +++ b/Platform/Hisilicon/HiKey960/HiKey960GpioDxe/HiKey960GpioDxe.c @@ -0,0 +1,77 @@ +/** @file +* +* Copyright (c) 2018, Linaro. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include + +GPIO_CONTROLLER gGpioDevice[]= { + { 0xe8a0b000, 0, 8 }, // GPIO0 + { 0xe8a0c000, 8, 8 }, // GPIO1 + { 0xe8a0d000, 16, 8 }, // GPIO2 + { 0xe8a0e000, 24, 8 }, // GPIO3 + { 0xe8a0f000, 32, 8 }, // GPIO4 + { 0xe8a10000, 40, 8 }, // GPIO5 + { 0xe8a11000, 48, 8 }, // GPIO6 + { 0xe8a12000, 56, 8 }, // GPIO7 + { 0xe8a13000, 64, 8 }, // GPIO8 + { 0xe8a14000, 72, 8 }, // GPIO9 + { 0xe8a15000, 80, 8 }, // GPIO10 + { 0xe8a16000, 88, 8 }, // GPIO11 + { 0xe8a17000, 96, 8 }, // GPIO12 + { 0xe8a18000, 104, 8 }, // GPIO13 + { 0xe8a19000, 112, 8 }, // GPIO14 + { 0xe8a1a000, 120, 8 }, // GPIO15 + { 0xe8a1b000, 128, 8 }, // GPIO16 + { 0xe8a1c000, 136, 8 }, // GPIO17 + { 0xff3b4000, 144, 8 }, // GPIO18 + { 0xff3b5000, 152, 8 }, // GPIO19 + { 0xe8a1f000, 160, 8 }, // GPIO20 + { 0xe8a20000, 168, 8 }, // GPIO21 + { 0xfff0b000, 176, 8 }, // GPIO22 + { 0xfff0c000, 184, 8 }, // GPIO23 + { 0xfff0d000, 192, 8 }, // GPIO24 + { 0xfff0e000, 200, 8 }, // GPIO25 + { 0xfff0f000, 208, 8 }, // GPIO26 + { 0xfff10000, 216, 8 }, // GPIO27 + { 0xfff1d000, 224, 8 }, // GPIO28 +}; + +PLATFORM_GPIO_CONTROLLER gPlatformGpioDevice = { + 232, 29, gGpioDevice +}; + +EFI_STATUS +EFIAPI +HiKey960GpioEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE Handle; + + // Install the Embedded Platform GPIO Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gPlatformGpioProtocolGuid, &gPlatformGpioDevice, + NULL + ); + if (EFI_ERROR(Status)) { + Status = EFI_OUT_OF_RESOURCES; + } + + return Status; +} From patchwork Thu Mar 8 13:30:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 131010 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp6480631lja; Thu, 8 Mar 2018 05:30:24 -0800 (PST) X-Google-Smtp-Source: AG47ELtdcy8Mi7W2oJpCUWIJXRcESQ8OA2A0jnuEP0NKZyS6jAON+srTVtQn2TQ/zNmuO7uF7f1l X-Received: by 2002:a17:902:c5:: with SMTP id a63-v6mr24494209pla.391.1520515824590; Thu, 08 Mar 2018 05:30:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520515824; cv=none; d=google.com; s=arc-20160816; b=mrWTt4j+DnYlpeJwoLE2zyw7CF4JRiYVV5q9gC40nLydb73YgI4g59lpt3A9yRm0FF ZaMw40v9Gq3rE6EttbZQpBtV7R4n1b8kxCYnRtErwZv2tz3qv1saPlfUY7jU/DDHss92 J/IVPQS0ZHDCIjIJdF5M82+pw3k8FXmdj70ZXEEseb63uy0ffG7Y5avV3JvdHItZ9h/b 69Cx0WiPsMaRSdmR5BelmwWqBwZKtThEC/fVIV3FKv6caVJNc66/Jh1yy6SFAWwugczf +Hz3yUbzVVNufETCoiwDRaEtyJ31ju5qZPfQBHYDSNkabjKg0zNkjJ1iaoloNS377mg6 HEHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :delivered-to:arc-authentication-results; bh=xF1jl2f7+oZveHZEyiceAwEgpqrsp47qxmgL6Q1GII4=; b=Qx+ccY39N4dhMDClGN4+OwlNVCMJ4Ta8p17+eVjCLjV3nGrVQqopwDTFg2Ja82o8mb GxYxLanAx2nEheMIbzac+AlvMXWmHd3+9HWWs4GP6zew6QHuT1Pg9IvjSbsZom90l8UO +bh5oNMA1bflnaRq6BX+w1ahDJpJJ0H5btvd6GRl4dw3rn/8jcXMN6enVJ0fjHWkOWUg Tm0qKhj0uEwCSe/v6QbCGd5gTC5qeihJJPkqxwIa7ghG2sCjH08DGAIN64jrEIUxyK0d k7zbCNeu1kkOuXZ2cZiK3Xvy78Jh/JxCxsGdm1KaucIbD+gAY/qAI9w1P663bT9K525m 949Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=YJPYcEzT; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id h70si7890668pfc.269.2018.03.08.05.30.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Mar 2018 05:30:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=YJPYcEzT; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C7DC121ED1C7D; Thu, 8 Mar 2018 05:24:07 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::22d; helo=mail-pl0-x22d.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x22d.google.com (mail-pl0-x22d.google.com [IPv6:2607:f8b0:400e:c01::22d]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2DB6D209574F3 for ; Thu, 8 Mar 2018 05:24:06 -0800 (PST) Received: by mail-pl0-x22d.google.com with SMTP id v9-v6so3291249plp.12 for ; Thu, 08 Mar 2018 05:30:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=mBQGJQJwHOa9440yeZIq1BBydKBYpy4LGSPr1oyGuAo=; b=YJPYcEzT/vdGnMkqLqPO0WeLCAicDF5NN2ITO7mLdLYxLULCqGNMpD+wI2hjtHJlBb G3rQRXqGAVq8CAn8H9ozPOPz719Ql6tU6EQXZCfMxXOYBhLn3GIeb1TzLbnSPhqdoopJ qmDtJ5/tgCQ0iU0XAZy1ImFyaN2Js6hT8oSlk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=mBQGJQJwHOa9440yeZIq1BBydKBYpy4LGSPr1oyGuAo=; b=fCSypqHX/1DRxpi3yqqf8afhIEtflQzDNhmV70wr0n9eRVITZpn9oCeKGB7mvVK5ah 8kPjNcIAut1ZI3JhlB12e/pNVsKIvxy7wTPuW3CPaZPGwcTPWfY2BrZG/E6LFqLTD9RM 6NirRX0SS42yIgQFbbAvYs88zpZ6qpDqXJscw0PRDvXD6zY9k82EENO+wQwHqjL1OM+C fj4fDw3jLFUdnmOe7X/ov6eLvwID56Yx1tuOK/xbejgLBJ0O7PJZwsB6if55NAATw6C4 SGZ28B23Pu7+HEUnkBVA3++ln7UXG7wakX3J2rDUm3tO5VL3XdtutGilKZhmzKpYoTLi lllw== X-Gm-Message-State: APf1xPD9ZrYS3nmB1v5+/JrTebZ8w/hV+r2AJnSXsXcxxCfbz6IFmi/v 9YjVaMl50imRvkAizHPEw3ndOZfJZcg= X-Received: by 2002:a17:902:14e:: with SMTP id 72-v6mr24301269plb.280.1520515821219; Thu, 08 Mar 2018 05:30:21 -0800 (PST) Received: from localhost.localdomain ([64.64.108.52]) by smtp.gmail.com with ESMTPSA id w88sm44077601pfa.50.2018.03.08.05.30.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Mar 2018 05:30:20 -0800 (PST) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Thu, 8 Mar 2018 21:30:04 +0800 Message-Id: <1520515804-29577-1-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [edk2] [PATCH v2 edk-platforms 2/4] Platform/Hisilicon/HiKey960: enable virtual keyboard X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Enable virtual keyboard on HiKey960 platform. The platform driver read pattern from memory or GPIO pin. When the value is matched, it simulates a hotkey that is used to adjust sequence of boot options. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey960/HiKey960.dsc | 10 + Platform/Hisilicon/HiKey960/HiKey960.fdf | 7 + Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf | 54 +++ Silicon/Hisilicon/Hi3660/Include/Hi3660.h | 147 ++++++ Silicon/Hisilicon/Hi3660/Include/Hkadc.h | 66 +++ Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c | 491 ++++++++++++++++++++ 6 files changed, 775 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey960/HiKey960.dsc b/Platform/Hisilicon/HiKey960/HiKey960.dsc index 3da1b8556321..859ab84f8415 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.dsc +++ b/Platform/Hisilicon/HiKey960/HiKey960.dsc @@ -68,6 +68,9 @@ [LibraryClasses.common.SEC] PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf +[BuildOptions] + GCC:*_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/Silicon/Hisilicon/Hi3660/Include + ################################################################################ # # Pcd Section - list of all EDK II PCD Entries defined by this Platform @@ -183,6 +186,13 @@ [Components.common] ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # + # Virtual Keyboard + # + EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf + + # # USB Host Support # MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf diff --git a/Platform/Hisilicon/HiKey960/HiKey960.fdf b/Platform/Hisilicon/HiKey960/HiKey960.fdf index 162dbaaf2646..d65f77878575 100644 --- a/Platform/Hisilicon/HiKey960/HiKey960.fdf +++ b/Platform/Hisilicon/HiKey960/HiKey960.fdf @@ -124,6 +124,13 @@ [FV.FvMain] INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf + + # # USB Host Support # INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf new file mode 100644 index 000000000000..cc517656b340 --- /dev/null +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.inf @@ -0,0 +1,54 @@ +# +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = HiKey960Dxe + FILE_GUID = 6d824b2c-640e-4643-b9f2-9c09e8bff429 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKey960EntryPoint + +[Sources.common] + HiKey960Dxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + +[LibraryClasses] + BaseMemoryLib + CacheMaintenanceLib + DebugLib + DxeServicesTableLib + FdtLib + IoLib + PcdLib + PrintLib + SerialPortLib + TimerLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + UefiRuntimeServicesTableLib + +[Protocols] + gEmbeddedGpioProtocolGuid + gPlatformVirtualKeyboardProtocolGuid + +[Guids] + gEfiEndOfDxeEventGroupGuid + gEfiFileInfoGuid + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h new file mode 100644 index 000000000000..f3ce12f64ed5 --- /dev/null +++ b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h @@ -0,0 +1,147 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HI3660_H__ +#define __HI3660_H__ + +#define HKADC_SSI_REG_BASE 0xE82B8000 + +#define PCTRL_REG_BASE 0xE8A09000 + +#define PCTRL_CTRL3 (PCTRL_REG_BASE + 0x010) +#define PCTRL_CTRL24 (PCTRL_REG_BASE + 0x064) + +#define PCTRL_CTRL3_USB_TXCO_EN (1 << 1) +#define PCTRL_CTRL24_USB3PHY_3MUX1_SEL (1 << 25) + +#define SCTRL_REG_BASE 0xFFF0A000 + +#define SCTRL_SCFPLLCTRL0 (SCTRL_REG_BASE + 0x120) +#define SCTRL_SCFPLLCTRL0_FPLL0_EN (1 << 0) + +#define SCTRL_BAK_DATA0 (SCTRL_REG_BASE + 0x40C) + +#define USB3OTG_BC_REG_BASE 0xFF200000 + +#define USB3OTG_CTRL0 (USB3OTG_BC_REG_BASE + 0x000) +#define USB3OTG_CTRL2 (USB3OTG_BC_REG_BASE + 0x008) +#define USB3OTG_CTRL3 (USB3OTG_BC_REG_BASE + 0x00C) +#define USB3OTG_CTRL4 (USB3OTG_BC_REG_BASE + 0x010) +#define USB3OTG_CTRL6 (USB3OTG_BC_REG_BASE + 0x018) +#define USB3OTG_CTRL7 (USB3OTG_BC_REG_BASE + 0x01C) +#define USB3OTG_PHY_CR_STS (USB3OTG_BC_REG_BASE + 0x050) +#define USB3OTG_PHY_CR_CTRL (USB3OTG_BC_REG_BASE + 0x054) + +#define USB3OTG_CTRL0_SC_USB3PHY_ABB_GT_EN (1 << 15) +#define USB3OTG_CTRL2_TEST_POWERDOWN_SSP (1 << 1) +#define USB3OTG_CTRL2_TEST_POWERDOWN_HSP (1 << 0) +#define USB3OTG_CTRL3_VBUSVLDEXT (1 << 6) +#define USB3OTG_CTRL3_VBUSVLDEXTSEL (1 << 5) +#define USB3OTG_CTRL7_REF_SSP_EN (1 << 16) +#define USB3OTG_PHY_CR_DATA_OUT(x) (((x) & 0xFFFF) << 1) +#define USB3OTG_PHY_CR_ACK (1 << 0) +#define USB3OTG_PHY_CR_DATA_IN(x) (((x) & 0xFFFF) << 4) +#define USB3OTG_PHY_CR_WRITE (1 << 3) +#define USB3OTG_PHY_CR_READ (1 << 2) +#define USB3OTG_PHY_CR_CAP_DATA (1 << 1) +#define USB3OTG_PHY_CR_CAP_ADDR (1 << 0) + +#define PMU_REG_BASE 0xFFF34000 +#define PMIC_HARDWARE_CTRL0 (PMU_REG_BASE + (0x0C5 << 2)) +#define PMIC_OSC32K_ONOFF_CTRL (PMU_REG_BASE + (0x0CC << 2)) + +#define PMIC_HARDWARE_CTRL0_WIFI_CLK (1 << 5) +#define PMIC_OSC32K_ONOFF_CTRL_EN_32K (1 << 1) + + +#define CRG_REG_BASE 0xFFF35000 + +#define CRG_PEREN2 (CRG_REG_BASE + 0x020) +#define CRG_PERDIS2 (CRG_REG_BASE + 0x024) +#define CRG_PERCLKEN2 (CRG_REG_BASE + 0x028) +#define CRG_PERSTAT2 (CRG_REG_BASE + 0x02C) +#define CRG_PEREN4 (CRG_REG_BASE + 0x040) +#define CRG_PERDIS4 (CRG_REG_BASE + 0x044) +#define CRG_PERCLKEN4 (CRG_REG_BASE + 0x048) +#define CRG_PERSTAT4 (CRG_REG_BASE + 0x04C) +#define CRG_PERRSTEN2 (CRG_REG_BASE + 0x078) +#define CRG_PERRSTDIS2 (CRG_REG_BASE + 0x07C) +#define CRG_PERRSTSTAT2 (CRG_REG_BASE + 0x080) +#define CRG_PERRSTEN3 (CRG_REG_BASE + 0x084) +#define CRG_PERRSTDIS3 (CRG_REG_BASE + 0x088) +#define CRG_PERRSTSTAT3 (CRG_REG_BASE + 0x08C) +#define CRG_PERRSTEN4 (CRG_REG_BASE + 0x090) +#define CRG_PERRSTDIS4 (CRG_REG_BASE + 0x094) +#define CRG_PERRSTSTAT4 (CRG_REG_BASE + 0x098) +#define CRG_ISOEN (CRG_REG_BASE + 0x144) +#define CRG_ISODIS (CRG_REG_BASE + 0x148) +#define CRG_ISOSTAT (CRG_REG_BASE + 0x14C) + +#define PERI_UFS_BIT (1 << 12) +#define PERI_ARST_UFS_BIT (1 << 7) + +#define PEREN2_HKADCSSI BIT24 + +#define PEREN4_GT_ACLK_USB3OTG (1 << 1) +#define PEREN4_GT_CLK_USB3OTG_REF (1 << 0) + +#define PERRSTEN2_HKADCSSI BIT24 + +#define PERRSTEN4_USB3OTG_MUX (1 << 8) +#define PERRSTEN4_USB3OTG_AHBIF (1 << 7) +#define PERRSTEN4_USB3OTG_32K (1 << 6) +#define PERRSTEN4_USB3OTG (1 << 5) +#define PERRSTEN4_USB3OTGPHY_POR (1 << 3) + +#define PERISOEN_USB_REFCLK_ISO_EN (1 << 25) + +#define CRG_CLKDIV16_OFFSET 0x0E8 +#define SC_DIV_UFSPHY_CFG_MASK (0x3 << 9) +#define SC_DIV_UFSPHY_CFG(x) (((x) & 0x3) << 9) + +#define CRG_CLKDIV17_OFFSET 0x0EC +#define SC_DIV_UFS_PERIBUS (1 << 14) + +#define UFS_SYS_REG_BASE 0xFF3B1000 + +#define UFS_SYS_PSW_POWER_CTRL_OFFSET 0x004 +#define UFS_SYS_PHY_ISO_EN_OFFSET 0x008 +#define UFS_SYS_HC_LP_CTRL_OFFSET 0x00C +#define UFS_SYS_PHY_CLK_CTRL_OFFSET 0x010 +#define UFS_SYS_PSW_CLK_CTRL_OFFSET 0x014 +#define UFS_SYS_CLOCK_GATE_BYPASS_OFFSET 0x018 +#define UFS_SYS_RESET_CTRL_EN_OFFSET 0x01C +#define UFS_SYS_MONITOR_HH_OFFSET 0x03C +#define UFS_SYS_UFS_SYSCTRL_OFFSET 0x05C +#define UFS_SYS_UFS_DEVICE_RESET_CTRL_OFFSET 0x060 +#define UFS_SYS_UFS_APB_ADDR_MASK_OFFSET 0x064 + +#define BIT_UFS_PSW_ISO_CTRL (1 << 16) +#define BIT_UFS_PSW_MTCMOS_EN (1 << 0) +#define BIT_UFS_REFCLK_ISO_EN (1 << 16) +#define BIT_UFS_PHY_ISO_CTRL (1 << 0) +#define BIT_SYSCTRL_LP_ISOL_EN (1 << 16) +#define BIT_SYSCTRL_PWR_READY (1 << 8) +#define BIT_SYSCTRL_REF_CLOCK_EN (1 << 24) +#define MASK_SYSCTRL_REF_CLOCK_SEL (3 << 8) +#define MASK_SYSCTRL_CFG_CLOCK_FREQ (0xFF) +#define BIT_SYSCTRL_PSW_CLK_EN (1 << 4) +#define MASK_UFS_CLK_GATE_BYPASS (0x3F) +#define BIT_SYSCTRL_LP_RESET_N (1 << 0) +#define BIT_UFS_REFCLK_SRC_SE1 (1 << 0) +#define MASK_UFS_SYSCTRL_BYPASS (0x3F << 16) +#define MASK_UFS_DEVICE_RESET (1 << 16) +#define BIT_UFS_DEVICE_RESET (1 << 0) + +#endif /* __HI3660_H__ */ diff --git a/Silicon/Hisilicon/Hi3660/Include/Hkadc.h b/Silicon/Hisilicon/Hi3660/Include/Hkadc.h new file mode 100644 index 000000000000..2584256b8726 --- /dev/null +++ b/Silicon/Hisilicon/Hi3660/Include/Hkadc.h @@ -0,0 +1,66 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HKADC_H__ +#define __HKADC_H__ + +#include + +#define HKADC_DSP_START (HKADC_SSI_REG_BASE + 0x000) +#define HKADC_WR_NUM (HKADC_SSI_REG_BASE + 0x008) +#define HKADC_DSP_START_CLR (HKADC_SSI_REG_BASE + 0x01C) +#define HKADC_WR01_DATA (HKADC_SSI_REG_BASE + 0x020) + +#define WR1_WRITE_MODE BIT31 +#define WR1_READ_MODE (0 << 31) +#define WR1_ADDR(x) (((x) & 0x7F) << 24) +#define WR1_DATA(x) (((x) & 0xFF) << 16) +#define WR0_WRITE_MODE BIT15 +#define WR0_READ_MODE (0 << 15) +#define WR0_ADDR(x) (((x) & 0x7F) << 8) +#define WR0_DATA(x) ((x) & 0xFF) + +#define HKADC_WR23_DATA (HKADC_SSI_REG_BASE + 0x024) +#define HKADC_WR45_DATA (HKADC_SSI_REG_BASE + 0x028) +#define HKADC_DELAY01 (HKADC_SSI_REG_BASE + 0x030) +#define HKADC_DELAY23 (HKADC_SSI_REG_BASE + 0x034) +#define HKADC_DELAY45 (HKADC_SSI_REG_BASE + 0x038) +#define HKADC_DSP_RD2_DATA (HKADC_SSI_REG_BASE + 0x048) +#define HKADC_DSP_RD3_DATA (HKADC_SSI_REG_BASE + 0x04C) + +// HKADC Internal Registers +#define HKADC_CTRL_ADDR 0x00 +#define HKADC_START_ADDR 0x01 +#define HKADC_DATA1_ADDR 0x03 // high 8 bits +#define HKADC_DATA0_ADDR 0x04 // low 8 bits +#define HKADC_MODE_CFG 0x0A + +#define HKADC_VALUE_HIGH 0x0FF0 +#define HKADC_VALUE_LOW 0x000F +#define HKADC_VALID_VALUE 0x0FFF + +#define HKADC_CHANNEL_MAX 15 +#define HKADC_VREF_1V8 1800 +#define HKADC_ACCURACY 0x0FFF + +#define HKADC_WR01_VALUE ((HKADC_START_ADDR << 24) | (0x1 << 16)) +#define HKADC_WR23_VALUE ((0x1 << 31) | (HKADC_DATA0_ADDR << 24) | (1 << 15) | (HKADC_DATA1_ADDR << 8)) +#define HKADC_WR45_VALUE (0x80) +#define HKADC_CHANNEL0_DELAY01_VALUE ((0x0700 << 16) | 0xFFFF) +#define HKADC_DELAY01_VALUE ((0x0700 << 16) | 0x0200) +#define HKADC_DELAY23_VALUE ((0x00C8 << 16) | 0x00C8) +#define START_DELAY_TIMEOUT 2000 +#define HKADC_WR_NUM_VALUE 4 + +#endif /* __HKADC_H__ */ diff --git a/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c new file mode 100644 index 000000000000..473d61ed384e --- /dev/null +++ b/Platform/Hisilicon/HiKey960/HiKey960Dxe/HiKey960Dxe.c @@ -0,0 +1,491 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define ADC_ADCIN0 0 +#define ADC_ADCIN1 1 +#define ADC_ADCIN2 2 + +#define HKADC_DATA_GRADE0 0 +#define HKADC_DATA_GRADE1 100 +#define HKADC_DATA_GRADE2 300 +#define HKADC_DATA_GRADE3 500 +#define HKADC_DATA_GRADE4 700 +#define HKADC_DATA_GRADE5 900 +#define HKADC_DATA_GRADE6 1100 +#define HKADC_DATA_GRADE7 1300 +#define HKADC_DATA_GRADE8 1500 +#define HKADC_DATA_GRADE9 1700 +#define HKADC_DATA_GRADE10 1800 + +#define BOARDID_VALUE0 0 +#define BOARDID_VALUE1 1 +#define BOARDID_VALUE2 2 +#define BOARDID_VALUE3 3 +#define BOARDID_VALUE4 4 +#define BOARDID_VALUE5 5 +#define BOARDID_VALUE6 6 +#define BOARDID_VALUE7 7 +#define BOARDID_VALUE8 8 +#define BOARDID_VALUE9 9 +#define BOARDID_UNKNOW 0xF + +#define BOARDID3_BASE 5 + +#define HIKEY960_BOARDID_V1 5300 +#define HIKEY960_BOARDID_V2 5301 + +#define HIKEY960_COMPATIBLE_LEDS_V1 "gpio-leds_v1" +#define HIKEY960_COMPATIBLE_LEDS_V2 "gpio-leds_v2" +#define HIKEY960_COMPATIBLE_HUB_V1 "hisilicon,gpio_hubv1" +#define HIKEY960_COMPATIBLE_HUB_V2 "hisilicon,gpio_hubv2" + +#define SERIAL_NUMBER_SIZE 17 +#define SERIAL_NUMBER_BLOCK_SIZE EFI_PAGE_SIZE +#define SERIAL_NUMBER_LBA 20 +#define RANDOM_MAX 0x7FFFFFFFFFFFFFFF +#define RANDOM_MAGIC 0x9A4DBEAF + +#define ADB_REBOOT_ADDRESS 0x32100000 +#define ADB_REBOOT_BOOTLOADER 0x77665500 +#define ADB_REBOOT_NONE 0x77665501 + +#define DETECT_SW_FASTBOOT 68 // GPIO8_4 + +typedef struct { + UINT64 Magic; + UINT64 Data; + CHAR16 UnicodeSN[SERIAL_NUMBER_SIZE]; +} RANDOM_SERIAL_NUMBER; + +enum { + BOOT_MODE_RECOVERY = 0, + BOOT_MODE_NORMAL, + BOOT_MODE_MASK = 1, +}; + +STATIC UINTN mBoardId; + +STATIC EMBEDDED_GPIO *mGpio; + +STATIC +VOID +InitAdc ( + VOID + ) +{ + // reset hkadc + MmioWrite32 (CRG_PERRSTEN2, PERRSTEN2_HKADCSSI); + // wait a few clock cycles + MicroSecondDelay (2); + MmioWrite32 (CRG_PERRSTDIS2, PERRSTEN2_HKADCSSI); + MicroSecondDelay (2); + // enable hkadc clock + MmioWrite32 (CRG_PERDIS2, PEREN2_HKADCSSI); + MicroSecondDelay (2); + MmioWrite32 (CRG_PEREN2, PEREN2_HKADCSSI); + MicroSecondDelay (2); +} + +STATIC +EFI_STATUS +AdcGetAdc ( + IN UINTN Channel, + OUT UINTN *Value + ) +{ + UINT32 Data; + UINT16 Value1, Value0; + + if (Channel > HKADC_CHANNEL_MAX) { + DEBUG ((DEBUG_ERROR, "invalid channel:%d\n", Channel)); + return EFI_OUT_OF_RESOURCES; + } + // configure the read/write operation for external HKADC + MmioWrite32 (HKADC_WR01_DATA, HKADC_WR01_VALUE | Channel); + MmioWrite32 (HKADC_WR23_DATA, HKADC_WR23_VALUE); + MmioWrite32 (HKADC_WR45_DATA, HKADC_WR45_VALUE); + // configure the number of accessing registers + MmioWrite32 (HKADC_WR_NUM, HKADC_WR_NUM_VALUE); + // configure delay of accessing registers + MmioWrite32 (HKADC_DELAY01, HKADC_CHANNEL0_DELAY01_VALUE); + MmioWrite32 (HKADC_DELAY23, HKADC_DELAY23_VALUE); + + // start HKADC + MmioWrite32 (HKADC_DSP_START, 1); + do { + Data = MmioRead32 (HKADC_DSP_START); + } while (Data & 1); + + // convert AD result + Value1 = (UINT16)MmioRead32 (HKADC_DSP_RD2_DATA); + Value0 = (UINT16)MmioRead32 (HKADC_DSP_RD3_DATA); + + Data = ((Value1 << 4) & HKADC_VALUE_HIGH) | ((Value0 >> 4) & HKADC_VALUE_LOW); + *Value = Data; + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +AdcGetValue ( + IN UINTN Channel, + IN OUT UINTN *Value + ) +{ + EFI_STATUS Status; + UINTN Result; + + Status = AdcGetAdc (Channel, Value); + if (EFI_ERROR (Status)) { + return Status; + } + + // convert ADC value to micro-volt + Result = ((*Value & HKADC_VALID_VALUE) * HKADC_VREF_1V8) / HKADC_ACCURACY; + *Value = Result; + return EFI_SUCCESS; +} + +STATIC +UINTN +AdcinDataRemap ( + IN UINTN AdcinValue + ) +{ + UINTN Result; + + if (AdcinValue < HKADC_DATA_GRADE0) { + Result = BOARDID_UNKNOW; + } else if (AdcinValue < HKADC_DATA_GRADE1) { + Result = BOARDID_VALUE0; + } else if (AdcinValue < HKADC_DATA_GRADE2) { + Result = BOARDID_VALUE1; + } else if (AdcinValue < HKADC_DATA_GRADE3) { + Result = BOARDID_VALUE2; + } else if (AdcinValue < HKADC_DATA_GRADE4) { + Result = BOARDID_VALUE3; + } else if (AdcinValue < HKADC_DATA_GRADE5) { + Result = BOARDID_VALUE4; + } else if (AdcinValue < HKADC_DATA_GRADE6) { + Result = BOARDID_VALUE5; + } else if (AdcinValue < HKADC_DATA_GRADE7) { + Result = BOARDID_VALUE6; + } else if (AdcinValue < HKADC_DATA_GRADE8) { + Result = BOARDID_VALUE7; + } else if (AdcinValue < HKADC_DATA_GRADE9) { + Result = BOARDID_VALUE8; + } else if (AdcinValue < HKADC_DATA_GRADE10) { + Result = BOARDID_VALUE9; + } else { + Result = BOARDID_UNKNOW; + } + return Result; +} + +STATIC +EFI_STATUS +InitBoardId ( + OUT UINTN *Id + ) +{ + UINTN Adcin0, Adcin1, Adcin2; + UINTN Adcin0Remap, Adcin1Remap, Adcin2Remap; + + InitAdc (); + + // read ADC channel0 data + AdcGetValue (ADC_ADCIN0, &Adcin0); + DEBUG ((DEBUG_INFO, "[BDID]Adcin0:%d\n", Adcin0)); + Adcin0Remap = AdcinDataRemap (Adcin0); + DEBUG ((DEBUG_INFO, "[BDID]Adcin0Remap:%d\n", Adcin0Remap)); + if (Adcin0Remap == BOARDID_UNKNOW) { + return EFI_INVALID_PARAMETER; + } + // read ADC channel1 data + AdcGetValue (ADC_ADCIN1, &Adcin1); + DEBUG ((DEBUG_INFO, "[BDID]Adcin1:%d\n", Adcin1)); + Adcin1Remap = AdcinDataRemap (Adcin1); + DEBUG ((DEBUG_INFO, "[BDID]Adcin1Remap:%d\n", Adcin1Remap)); + if (Adcin1Remap == BOARDID_UNKNOW) { + return EFI_INVALID_PARAMETER; + } + // read ADC channel2 data + AdcGetValue (ADC_ADCIN2, &Adcin2); + DEBUG ((DEBUG_INFO, "[BDID]Adcin2:%d\n", Adcin2)); + Adcin2Remap = AdcinDataRemap (Adcin2); + DEBUG ((DEBUG_INFO, "[BDID]Adcin2Remap:%d\n", Adcin2Remap)); + if (Adcin2Remap == BOARDID_UNKNOW) { + return EFI_INVALID_PARAMETER; + } + *Id = BOARDID3_BASE * 1000 + (Adcin2Remap * 100) + (Adcin1Remap * 10) + Adcin0Remap; + DEBUG ((DEBUG_INFO, "[BDID]boardid: %d\n", *Id)); + return EFI_SUCCESS; +} + +STATIC +VOID +InitSdCard ( + IN VOID + ) +{ + UINT32 Data; + + // LDO16 + Data = MmioRead32 (PMU_REG_BASE + (0x79 << 2)) & 7; + Data |= 6; + MmioWrite32 (PMU_REG_BASE + (0x79 << 2), Data); + MmioOr32 (PMU_REG_BASE + (0x78 << 2), 2); + MicroSecondDelay (100); + + // LDO9 + Data = MmioRead32 (PMU_REG_BASE + (0x6b << 2)) & 7; + Data |= 5; + MmioWrite32 (PMU_REG_BASE + (0x6b << 2), Data); + MmioOr32 (PMU_REG_BASE + (0x6a << 2), 2); + MicroSecondDelay (100); + + // GPIO203 + MmioWrite32 (0xfff11000 + (24 << 2), 0); // GPIO function + + // SD pinmux + MmioWrite32 (0xff37e000 + 0x0, 1); // SD_CLK + MmioWrite32 (0xff37e000 + 0x4, 1); // SD_CMD + MmioWrite32 (0xff37e000 + 0x8, 1); // SD_DATA0 + MmioWrite32 (0xff37e000 + 0xc, 1); // SD_DATA1 + MmioWrite32 (0xff37e000 + 0x10, 1); // SD_DATA2 + MmioWrite32 (0xff37e000 + 0x14, 1); // SD_DATA3 + MmioWrite32 (0xff37e800 + 0x0, 15 << 4); // SD_CLK float with 32mA + MmioWrite32 (0xff37e800 + 0x4, (1 << 0) | (8 << 4)); // SD_CMD + MmioWrite32 (0xff37e800 + 0x8, (1 << 0) | (8 << 4)); // SD_DATA0 + MmioWrite32 (0xff37e800 + 0xc, (1 << 0) | (8 << 4)); // SD_DATA1 + MmioWrite32 (0xff37e800 + 0x10, (1 << 0) | (8 << 4)); // SD_DATA2 + MmioWrite32 (0xff37e800 + 0x14, (1 << 0) | (8 << 4)); // SD_DATA3 + + do { + MmioOr32 (CRG_REG_BASE + 0xb8, (1 << 6) | (1 << 6 << 16) | (0 << 4) | (3 << 4 << 16)); + Data = MmioRead32 (CRG_REG_BASE + 0xb8); + } while ((Data & ((1 << 6) | (3 << 4))) != ((1 << 6) | (0 << 4))); + + // Unreset SD controller + MmioWrite32 (CRG_PERRSTDIS4, 1 << 18); + do { + Data = MmioRead32 (CRG_PERRSTSTAT4); + } while ((Data & (1 << 18)) == (1 << 18)); + // Enable SD controller clock + MmioOr32 (CRG_REG_BASE + 0, 1 << 30); + MmioOr32 (CRG_REG_BASE + 0x40, 1 << 17); + do { + Data = MmioRead32 (CRG_REG_BASE + 0x48); + } while ((Data & (1 << 17)) != (1 << 17)); +} + +VOID +InitPeripherals ( + IN VOID + ) +{ + // Enable FPLL0 + MmioOr32 (SCTRL_SCFPLLCTRL0, SCTRL_SCFPLLCTRL0_FPLL0_EN); + + InitSdCard (); + + // Enable wifi clock + MmioOr32 (PMIC_HARDWARE_CTRL0, PMIC_HARDWARE_CTRL0_WIFI_CLK); + MmioOr32 (PMIC_OSC32K_ONOFF_CTRL, PMIC_OSC32K_ONOFF_CTRL_EN_32K); +} + +/** + Notification function of the event defined as belonging to the + EFI_END_OF_DXE_EVENT_GROUP_GUID event group that was created in + the entry point of the driver. + + This function is called when an event belonging to the + EFI_END_OF_DXE_EVENT_GROUP_GUID event group is signalled. Such an + event is signalled once at the end of the dispatching of all + drivers (end of the so called DXE phase). + + @param[in] Event Event declared in the entry point of the driver whose + notification function is being invoked. + @param[in] Context NULL +**/ +STATIC +VOID +OnEndOfDxe ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINT32 BootMode; + + BootMode = MmioRead32 (SCTRL_BAK_DATA0) & BOOT_MODE_MASK; + if (BootMode == BOOT_MODE_RECOVERY) { + SerialPortWrite ((UINT8 *)"WARNING: CAN NOT BOOT KERNEL IN RECOVERY MODE!\r\n", 48); + SerialPortWrite ((UINT8 *)"Switch to normal boot mode, then reboot to boot kernel.\r\n", 57); + } +} + +EFI_STATUS +EFIAPI +VirtualKeyboardRegister ( + IN VOID + ) +{ + EFI_STATUS Status; + + Status = gBS->LocateProtocol ( + &gEmbeddedGpioProtocolGuid, + NULL, + (VOID **) &mGpio + ); + if (EFI_ERROR (Status)) { + return Status; + } + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardReset ( + IN VOID + ) +{ + EFI_STATUS Status; + + if (mGpio == NULL) { + return EFI_INVALID_PARAMETER; + } + // Configure GPIO68 as GPIO function + MmioWrite32 (0xe896c108, 0); + Status = mGpio->Set (mGpio, DETECT_SW_FASTBOOT, GPIO_MODE_INPUT); + return Status; +} + +BOOLEAN +EFIAPI +VirtualKeyboardQuery ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + EFI_STATUS Status; + UINTN Value = 0; + + if ((VirtualKey == NULL) || (mGpio == NULL)) { + return FALSE; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + goto Done; + } else { + Status = mGpio->Get (mGpio, DETECT_SW_FASTBOOT, &Value); + if (EFI_ERROR (Status) || (Value != 0)) { + return FALSE; + } + } +Done: + VirtualKey->Signature = VIRTUAL_KEYBOARD_KEY_SIGNATURE; + VirtualKey->Key.ScanCode = SCAN_NULL; + VirtualKey->Key.UnicodeChar = L'f'; + return TRUE; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardClear ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + if (VirtualKey == NULL) { + return EFI_INVALID_PARAMETER; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + MmioWrite32 (ADB_REBOOT_ADDRESS, ADB_REBOOT_NONE); + WriteBackInvalidateDataCacheRange ((VOID *)ADB_REBOOT_ADDRESS, 4); + } + return EFI_SUCCESS; +} + +PLATFORM_VIRTUAL_KBD_PROTOCOL mVirtualKeyboard = { + VirtualKeyboardRegister, + VirtualKeyboardReset, + VirtualKeyboardQuery, + VirtualKeyboardClear +}; + +EFI_STATUS +EFIAPI +HiKey960EntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_EVENT EndOfDxeEvent; + + Status = InitBoardId (&mBoardId); + if (EFI_ERROR (Status)) { + return Status; + } + + InitPeripherals (); + + // + // Create an event belonging to the "gEfiEndOfDxeEventGroupGuid" group. + // The "OnEndOfDxe()" function is declared as the call back function. + // It will be called at the end of the DXE phase when an event of the + // same group is signalled to inform about the end of the DXE phase. + // Install the INSTALL_FDT_PROTOCOL protocol. + // + Status = gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, + OnEndOfDxe, + NULL, + &gEfiEndOfDxeEventGroupGuid, + &EndOfDxeEvent + ); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gPlatformVirtualKeyboardProtocolGuid, + EFI_NATIVE_INTERFACE, + &mVirtualKeyboard + ); + return Status; +} From patchwork Thu Mar 8 13:30:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 131011 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp6481161lja; Thu, 8 Mar 2018 05:30:52 -0800 (PST) X-Google-Smtp-Source: AG47ELvQKFwU5xYbdaZYGpOSVCeL8BxbwSwXNiLh9u0i9uwhZ7E1TrXFJ5LN0/97sN0BVbDNGCg/ X-Received: by 2002:a17:902:bc3:: with SMTP id 61-v6mr24462654plr.398.1520515852208; Thu, 08 Mar 2018 05:30:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520515852; cv=none; d=google.com; s=arc-20160816; b=DXDryI1CytFzVFj/iotTzTKw1s3bo5O1mzEFyh9rqcT7tUtd5c9IVJIXp2nT3IqGIe gr4Oid5fLYhYtHcjVuyi8DeOEDWT1AVBlTLqn9P/4onTpbi7RDYTlbjanosUCwrMwIrO 9+7hAAyEMjXbjdam8lS4svNJbjLgvvwZNz/w3IEjENcWKCzVhXR9ECj8utrFjmTDYalU q5JibsAxCoF1zB+flDHW+8lscqYP95gGVDwG3aL+7lGlVz2d3gJsvpQk6oU7vodLGQBX Tj79Z8qpdJ62Lxckg8sT+jUEcOifymlKM+QXZ+a8gLm1nyUKwYKgEPSQtzl6QUKqVz+3 z9ow== ARC-Message-Signature: i=1; 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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id r26si13155777pgd.654.2018.03.08.05.30.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Mar 2018 05:30:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=WNVcA0H+; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 492E521ED1C79; Thu, 8 Mar 2018 05:24:35 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C6914209574F3 for ; Thu, 8 Mar 2018 05:24:33 -0800 (PST) Received: by mail-pl0-x242.google.com with SMTP id d9-v6so3303838plo.8 for ; Thu, 08 Mar 2018 05:30:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=79PCTYYs3mwPvnkTJNNeCwsfvw5aecg7j33Aexgu8o8=; b=WNVcA0H+MTG/OZfakK0MEkkHCRssK6FE2VxnU+dgAmtOUpqUH9PM/J5gLpZZBpMy3h xUhkmYgJNeKulICOuKmPUZ/ognCKKO7g19GSNb942tswi6YVn45w1BcGzWGCmj5fGpWm d3C/ii7fHTtHgF6NmrqIud/DNqOgvYQ5X38JA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=79PCTYYs3mwPvnkTJNNeCwsfvw5aecg7j33Aexgu8o8=; b=Gq2hTStJD9lwh2qoo+ZFwnXT3dbUGZhr38f3cdlJHjg8T8fyfdmMDVFGMRF3Dnm5wU f3+R9p38hEr8nAUUR2XhlLfFLvOnRFu6HqPw09JRmM1s9yVQs324ZTH8mveS4Hw7TC8j 8yrUJUZbWEtF3qTWGXLcXuREKGAB50nW0gRXbLeGZCpe7MJSqsWCBKO2VAtv9fPX8Zl8 U1K3pzzSqRkU9qMFsEgufaysQGL0wlBOv70E94OL8WjlxFe+UGqJQzu80+CijhNYR5gv tM9NboYm2R9vhrEHvaGh9WmSLKzywPkf2QR/sQa7FaM+g38ipLtnGMkHcegcTcrpwJOo 70nA== X-Gm-Message-State: AElRT7EcGMiwgbHnzLXKHr5TvF+8JZ9Bz1p8bkn3hjJB28II/TLjkwl0 6GID1Oz5GGP4s3M2eO7cIqI/Z7SV4IE= X-Received: by 2002:a17:902:43e4:: with SMTP id j91-v6mr11218542pld.2.1520515849432; Thu, 08 Mar 2018 05:30:49 -0800 (PST) Received: from localhost.localdomain ([64.64.108.52]) by smtp.gmail.com with ESMTPSA id b5sm43854448pfc.12.2018.03.08.05.30.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Mar 2018 05:30:48 -0800 (PST) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Thu, 8 Mar 2018 21:30:28 +0800 Message-Id: <1520515828-29629-1-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [edk2] [PATCH v2 edk-platforms 3/4] Platform/Hisilicon/HiKey: add gpio platform driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add gpio platform driver to enable GPIO in HiKey platform. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf | 36 +++++++++++ Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c | 68 ++++++++++++++++++++ 2 files changed, 104 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf new file mode 100644 index 000000000000..272ed1c0cea2 --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf @@ -0,0 +1,36 @@ +# +# Copyright (c) 2018, Linaro. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = HiKeyGpio + FILE_GUID = b51a851c-7bf7-463f-b261-cfb158b7f699 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyGpioEntryPoint + +[Sources.common] + HiKeyGpioDxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + DebugLib + UefiDriverEntryPoint + +[Protocols] + gPlatformGpioProtocolGuid + +[Depex] + TRUE diff --git a/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c new file mode 100644 index 000000000000..543f65d7b12d --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.c @@ -0,0 +1,68 @@ +/** @file +* +* Copyright (c) 2018, Linaro. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include + +GPIO_CONTROLLER gGpioDevice[]= { + { 0xf8011000, 0, 8 }, // GPIO0 + { 0xf8012000, 8, 8 }, // GPIO1 + { 0xf8013000, 16, 8 }, // GPIO2 + { 0xf8014000, 24, 8 }, // GPIO3 + { 0xf7020000, 32, 8 }, // GPIO4 + { 0xf7021000, 40, 8 }, // GPIO5 + { 0xf7022000, 48, 8 }, // GPIO6 + { 0xf7023000, 56, 8 }, // GPIO7 + { 0xf7024000, 64, 8 }, // GPIO8 + { 0xf7025000, 72, 8 }, // GPIO9 + { 0xf7026000, 80, 8 }, // GPIO10 + { 0xf7027000, 88, 8 }, // GPIO11 + { 0xf7028000, 96, 8 }, // GPIO12 + { 0xf7029000, 104, 8 }, // GPIO13 + { 0xf702a000, 112, 8 }, // GPIO14 + { 0xf702b000, 120, 8 }, // GPIO15 + { 0xf702c000, 128, 8 }, // GPIO16 + { 0xf702d000, 136, 8 }, // GPIO17 + { 0xf702e000, 144, 8 }, // GPIO18 + { 0xf702f000, 152, 8 } // GPIO19 +}; + +PLATFORM_GPIO_CONTROLLER gPlatformGpioDevice = { + 160, 20, gGpioDevice +}; + +EFI_STATUS +EFIAPI +HiKeyGpioEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE Handle; + + // Install the Embedded Platform GPIO Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gPlatformGpioProtocolGuid, &gPlatformGpioDevice, + NULL + ); + if (EFI_ERROR(Status)) { + Status = EFI_OUT_OF_RESOURCES; + } + + return Status; +} From patchwork Thu Mar 8 13:30:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 131012 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp6481477lja; Thu, 8 Mar 2018 05:31:10 -0800 (PST) X-Google-Smtp-Source: AG47ELsJM6MSxfyN0ZtWVckJImhAQtaK5beoWJYcHEP5xzB6uqYosuUohTNX+UEpy4C2hw2e0CNU X-Received: by 2002:a17:902:ad0b:: with SMTP id i11-v6mr15876288plr.10.1520515870557; Thu, 08 Mar 2018 05:31:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520515870; cv=none; d=google.com; s=arc-20160816; b=okU8G7UHtlf4doxB0rPjB97bnXKavuXe+CfBYeGZHnCX8I3tC+ejLA6I/bP/GgU1jh MNfpsy/HlroU2EvVgS00h41NRJ50YWdWoXU+Yitz8xxeBHZ70Cok2JtgxEK93qVdpUip trla4XWoAQzbwCueTPFKAcWpShjnLssxMkfu2J15aNNyL7kIVcqiP2XlTJajcoc630/K 5MeS8RrEHXoe3gYrZAJn5QV05apMH0zs5oiMZc5QqY2WJrDpvsyPTsq/shq9lWaguSyC kVkWehcyB6XWHv8iabUQKvDhdT7jPESWidmQgXZFfp+Lll/6+NbpnAkzk2DKYP4CyY47 nDuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :delivered-to:arc-authentication-results; bh=PDhUvrGJeb+3PikvbD+mafqqgQ9KY/2C5ge0339hk5w=; b=obKTtQs3WQkbV9GeHlNUNx2odoiKNaqV6PjZ5tjEQ2cnX13wx0s0la9iWvLg+f7/cf F9gTTPNk/YxQAKyt90wUcNM92ItM0SStwLTt7A4MU1QRXxRRm/htLFOcy45N3vyOZwHH NlFPulMq654nzu2uPU2kUXoNrF7XZs8dTeqiBXXm1pvvxhosRBCAHvg8DvcbL7Uy9oYM RUhIj/B+BCzzu7u9dE9RSuAm46cECtFIoiE372cKkYCiwDYMomo8dZhT+TmN1AFZreYz oDqwoi/ubObxsrPksLPzZfmUQ4LMi/lTxhBlCQkDHR6qOEuJtWM8HL8dyWgPbOAZ6/qc JfAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Do1U6wRB; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id f18-v6si11744302plr.726.2018.03.08.05.31.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Mar 2018 05:31:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Do1U6wRB; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B8DF222135D2E; Thu, 8 Mar 2018 05:24:53 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=haojian.zhuang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 432E521ED1C6E for ; Thu, 8 Mar 2018 05:24:52 -0800 (PST) Received: by mail-pl0-x242.google.com with SMTP id 61-v6so3312919plf.3 for ; Thu, 08 Mar 2018 05:31:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=25/1BhxeK96e2RCOuWJ5RNUeVWDMm1gF1cO7ytiyZXA=; b=Do1U6wRB+EpYhRKVlt5B2Z+SZBbPgZuRqjXGp5lgooVEwH5s9lpyGTqAOrKee8zEhf lv/CdnR+/JqJ7tQUTb3mTJ721LE3fJOnBWvsxXoeaFQwbt0vlO2De2Z454+I3Xm7u8VZ KzPlQDWUE+DAAbrEgxb0iUPXDGuP2ogYb556k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=25/1BhxeK96e2RCOuWJ5RNUeVWDMm1gF1cO7ytiyZXA=; b=kYziY4c8fmhG/b8ba7SiMDgnAPZL2fL54xf0fvaaagSWItTZ4M7LIsj24AdP6Jot+M gkGvPhixB7AsY9amS66czbJh2V1WBNR8lLQq5gLGg8jhbvsuqbyfNudERFFxk9C0lW8K 9mXqxH5PU0Bq6LUe0nmYxJazmBOEdS2d8pLvR/iJVDQrofFzCakKOtYAdB92OtgBEa7B NkWwDkn1EHju37+VRKYo9Zjec+BsI3tQkgyStQ09DObJKvd9u8A2MA2JoM1aNecHbMRN 6tiIEKbTHYGamyAsswAgkLahvlR+JwRQrfOrPoF/F/MtXtII9dsvuK77QfIFXPHyoC4s X3kA== X-Gm-Message-State: APf1xPBelsjJaWP2g/NicbeJmoaM6FyJU7FVYriJGqadj6xuA2n2GJmE 56QdzU0rZDzaARNzPfxZF9RUp0AB++Y= X-Received: by 2002:a17:902:63:: with SMTP id 90-v6mr23691884pla.125.1520515867702; Thu, 08 Mar 2018 05:31:07 -0800 (PST) Received: from localhost.localdomain ([64.64.108.52]) by smtp.gmail.com with ESMTPSA id y6sm49395302pfg.71.2018.03.08.05.31.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Mar 2018 05:31:06 -0800 (PST) From: Haojian Zhuang To: edk2-devel@lists.01.org Date: Thu, 8 Mar 2018 21:30:56 +0800 Message-Id: <1520515856-29683-1-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [edk2] [PATCH v2 edk-platforms 4/4] Platform/Hisilicon/HiKey: enable virtual keyboard X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Enable virtual keyboard driver on HiKey platform. The platform driver reads pattern from memory or GPIO pin. When the value is matched, it simulates a key value that is used to adjust the sequence of boot options. Cc: Leif Lindholm Cc: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Haojian Zhuang --- Platform/Hisilicon/HiKey/HiKey.dsc | 8 + Platform/Hisilicon/HiKey/HiKey.fdf | 8 + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf | 57 +++++ Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h | 48 ++++ Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c | 229 ++++++++++++++++++++ 5 files changed, 350 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/HiKey/HiKey.dsc b/Platform/Hisilicon/HiKey/HiKey.dsc index 5c1604d7f689..83dd68a820b1 100644 --- a/Platform/Hisilicon/HiKey/HiKey.dsc +++ b/Platform/Hisilicon/HiKey/HiKey.dsc @@ -189,9 +189,17 @@ [Components.common] # # GPIO # + Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # + # Virtual Keyboard + # + EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + + # # MMC/SD # EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf diff --git a/Platform/Hisilicon/HiKey/HiKey.fdf b/Platform/Hisilicon/HiKey/HiKey.fdf index 2a5c5a4d6e79..2bca7232b6e5 100644 --- a/Platform/Hisilicon/HiKey/HiKey.fdf +++ b/Platform/Hisilicon/HiKey/HiKey.fdf @@ -120,9 +120,17 @@ [FV.FvMain] # # GPIO # + INF Platform/Hisilicon/HiKey/HiKeyGpioDxe/HiKeyGpioDxe.inf INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf # + # Virtual Keyboard + # + INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf + + INF Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf + + # # Multimedia Card Interface # INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf new file mode 100644 index 000000000000..702fdb1eebf0 --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.inf @@ -0,0 +1,57 @@ +# +# Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved. +# Copyright (c) 2018, Linaro Ltd. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = HiKeyDxe + FILE_GUID = f567684b-1089-4214-8881-d64b20cbda2f + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = HiKeyEntryPoint + +[Sources.common] + HiKeyDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + +[LibraryClasses] + BaseMemoryLib + CacheMaintenanceLib + DebugLib + DxeServicesLib + DxeServicesTableLib + FdtLib + IoLib + PcdLib + PrintLib + SerialPortLib + TimerLib + UefiBootServicesTableLib + UefiRuntimeServicesTableLib + UefiLib + UefiDriverEntryPoint + +[Protocols] + gEmbeddedGpioProtocolGuid + gPlatformVirtualKeyboardProtocolGuid + +[Guids] + gEfiEndOfDxeEventGroupGuid + gEfiFileInfoGuid + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h new file mode 100644 index 000000000000..8419685611bf --- /dev/null +++ b/Silicon/Hisilicon/Hi6220/Include/Hi6220RegsPeri.h @@ -0,0 +1,48 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __HI6220_REGS_PERI_H__ +#define __HI6220_REGS_PERI_H__ + +#define SC_PERIPH_CLKEN3 0x230 +#define SC_PERIPH_RSTEN3 0x330 +#define SC_PERIPH_RSTDIS0 0x304 +#define SC_PERIPH_RSTDIS3 0x334 +#define SC_PERIPH_RSTSTAT3 0x338 + +/* SC_PERIPH_RSTEN0/RSTDIS0/RSTSTAT0 */ +#define PERIPH_RST0_MMC2 (1 << 2) + +/* SC_PERIPH_RSTEN3/RSTDIS3/RSTSTAT3 */ +#define PERIPH_RST3_CSSYS (1 << 0) +#define PERIPH_RST3_I2C0 (1 << 1) +#define PERIPH_RST3_I2C1 (1 << 2) +#define PERIPH_RST3_I2C2 (1 << 3) +#define PERIPH_RST3_I2C3 (1 << 4) +#define PERIPH_RST3_UART1 (1 << 5) +#define PERIPH_RST3_UART2 (1 << 6) +#define PERIPH_RST3_UART3 (1 << 7) +#define PERIPH_RST3_UART4 (1 << 8) +#define PERIPH_RST3_SSP (1 << 9) +#define PERIPH_RST3_PWM (1 << 10) +#define PERIPH_RST3_BLPWM (1 << 11) +#define PERIPH_RST3_TSENSOR (1 << 12) +#define PERIPH_RST3_DAPB (1 << 18) +#define PERIPH_RST3_HKADC (1 << 19) +#define PERIPH_RST3_CODEC_SSI (1 << 20) +#define PERIPH_RST3_PMUSSI1 (1 << 22) + +#define PMUSSI_REG(x) (PMUSSI_BASE + ((x) << 2)) + +#endif /* __HI6220_REGS_PERI_H__ */ diff --git a/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c new file mode 100644 index 000000000000..65e800116b76 --- /dev/null +++ b/Platform/Hisilicon/HiKey/HiKeyDxe/HiKeyDxe.c @@ -0,0 +1,229 @@ +/** @file +* +* Copyright (c) 2018, Linaro Ltd. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#define SERIAL_NUMBER_SIZE 17 +#define SERIAL_NUMBER_BLOCK_SIZE EFI_PAGE_SIZE +#define SERIAL_NUMBER_LBA 1024 +#define RANDOM_MAX 0x7FFFFFFFFFFFFFFF +#define RANDOM_MAGIC 0x9A4DBEAF + +#define DETECT_J15_FASTBOOT 24 // GPIO3_0 + +#define ADB_REBOOT_ADDRESS 0x05F01000 +#define ADB_REBOOT_BOOTLOADER 0x77665500 +#define ADB_REBOOT_NONE 0x77665501 + + +typedef struct { + UINT64 Magic; + UINT64 Data; + CHAR16 UnicodeSN[SERIAL_NUMBER_SIZE]; +} RANDOM_SERIAL_NUMBER; + +STATIC EMBEDDED_GPIO *mGpio; + +STATIC +VOID +UartInit ( + IN VOID + ) +{ + UINT32 Val; + + /* make UART1 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART1); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART1); + /* make UART2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART2); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART2); + /* make UART3 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART3); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART3); + /* make UART4 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, PERIPH_RST3_UART4); + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART4); + + /* make DW_MMC2 out of reset */ + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS0, PERIPH_RST0_MMC2); + + /* enable clock for BT/WIFI */ + Val = MmioRead32 (PMUSSI_REG(0x1c)) | 0x40; + MmioWrite32 (PMUSSI_REG(0x1c), Val); +} + +STATIC +VOID +MtcmosInit ( + IN VOID + ) +{ + UINT32 Data; + + /* enable MTCMOS for GPU */ + MmioWrite32 (AO_CTRL_BASE + SC_PW_MTCMOS_EN0, PW_EN0_G3D); + do { + Data = MmioRead32 (AO_CTRL_BASE + SC_PW_MTCMOS_ACK_STAT0); + } while ((Data & PW_EN0_G3D) == 0); +} + +EFI_STATUS +HiKeyInitPeripherals ( + IN VOID + ) +{ + UINT32 Data, Bits; + + /* make I2C0/I2C1/I2C2/SPI0 out of reset */ + Bits = PERIPH_RST3_I2C0 | PERIPH_RST3_I2C1 | PERIPH_RST3_I2C2 | \ + PERIPH_RST3_SSP; + MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_RSTDIS3, Bits); + + do { + Data = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_RSTSTAT3); + } while (Data & Bits); + + UartInit (); + MtcmosInit (); + + /* Set DETECT_J15_FASTBOOT (GPIO24) pin as GPIO function */ + MmioWrite32 (0xf7010950, 0); /* configure GPIO24 as nopull */ + MmioWrite32 (0xf7010140, 0); /* configure GPIO24 as GPIO */ + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardRegister ( + IN VOID + ) +{ + EFI_STATUS Status; + + Status = gBS->LocateProtocol ( + &gEmbeddedGpioProtocolGuid, + NULL, + (VOID **) &mGpio + ); + if (EFI_ERROR (Status)) { + return Status; + } + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardReset ( + IN VOID + ) +{ + EFI_STATUS Status; + + if (mGpio == NULL) { + return EFI_INVALID_PARAMETER; + } + Status = mGpio->Set (mGpio, DETECT_J15_FASTBOOT, GPIO_MODE_INPUT); + return Status; +} + +BOOLEAN +EFIAPI +VirtualKeyboardQuery ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + EFI_STATUS Status; + UINTN Value = 0; + + if ((VirtualKey == NULL) || (mGpio == NULL)) { + return FALSE; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + goto Done; + } else { + Status = mGpio->Get (mGpio, DETECT_J15_FASTBOOT, &Value); + if (EFI_ERROR (Status) || (Value != 0)) { + return FALSE; + } + } +Done: + VirtualKey->Signature = VIRTUAL_KEYBOARD_KEY_SIGNATURE; + VirtualKey->Key.ScanCode = SCAN_NULL; + VirtualKey->Key.UnicodeChar = L'f'; + return TRUE; +} + +EFI_STATUS +EFIAPI +VirtualKeyboardClear ( + IN VIRTUAL_KBD_KEY *VirtualKey + ) +{ + if (VirtualKey == NULL) { + return EFI_INVALID_PARAMETER; + } + if (MmioRead32 (ADB_REBOOT_ADDRESS) == ADB_REBOOT_BOOTLOADER) { + MmioWrite32 (ADB_REBOOT_ADDRESS, ADB_REBOOT_NONE); + WriteBackInvalidateDataCacheRange ((VOID *)ADB_REBOOT_ADDRESS, 4); + } + return EFI_SUCCESS; +} + +PLATFORM_VIRTUAL_KBD_PROTOCOL mVirtualKeyboard = { + VirtualKeyboardRegister, + VirtualKeyboardReset, + VirtualKeyboardQuery, + VirtualKeyboardClear +}; + +EFI_STATUS +EFIAPI +HiKeyEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = HiKeyInitPeripherals (); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->InstallProtocolInterface ( + &ImageHandle, + &gPlatformVirtualKeyboardProtocolGuid, + EFI_NATIVE_INTERFACE, + &mVirtualKeyboard + ); + return Status; +}