From patchwork Thu Jan 28 15:59:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 373258 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 603B9C433DB for ; Thu, 28 Jan 2021 16:01:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1AE6864DFB for ; Thu, 28 Jan 2021 16:01:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229785AbhA1QBn (ORCPT ); Thu, 28 Jan 2021 11:01:43 -0500 Received: from mga02.intel.com ([134.134.136.20]:49716 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229586AbhA1QBl (ORCPT ); Thu, 28 Jan 2021 11:01:41 -0500 IronPort-SDR: ViqkLdDt7ZAJoAmWc2+2T3n8Z6xq0P6nY8NIzulmwb0mJW4DNPOp/fDQwkgoc4zo54+zCpmkOe DjFUkmL//ToQ== X-IronPort-AV: E=McAfee;i="6000,8403,9878"; a="167353453" X-IronPort-AV: E=Sophos;i="5.79,383,1602572400"; d="scan'208";a="167353453" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2021 07:59:51 -0800 IronPort-SDR: 4JR5+uxG10lAThBUWYr3Xr0P17KUjyEANVgtYHnap6gZKVVL+2UeYWLjv4gxTrJ18Op9klMQgL C/St54nZGi8g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,383,1602572400"; d="scan'208";a="430563176" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga001.jf.intel.com with SMTP; 28 Jan 2021 07:59:50 -0800 Received: by stinkbox (sSMTP sendmail emulation); Thu, 28 Jan 2021 17:59:48 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org Subject: [PATCH 1/5] drm/i915: Skip vswing programming for TBT Date: Thu, 28 Jan 2021 17:59:44 +0200 Message-Id: <20210128155948.13678-1-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Ville Syrjälä In thunderbolt mode the PHY is owned by the thunderbolt controller. We are not supposed to touch it. So skip the vswing programming as well (we already skipped the other steps not applicable to TBT). Touching this stuff could supposedly interfere with the PHY programming done by the thunderbolt controller. Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 9506b8048530..c94650488dc1 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2827,6 +2827,9 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int n_entries, ln; u32 val; + if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT) + return; + ddi_translations = icl_get_mg_buf_trans(encoder, crtc_state, &n_entries); if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations)) @@ -2962,6 +2965,9 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, u32 val, dpcnt_mask, dpcnt_val; int n_entries, ln; + if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT) + return; + ddi_translations = tgl_get_dkl_buf_trans(encoder, crtc_state, &n_entries); if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations)) From patchwork Thu Jan 28 15:59:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 373794 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41B2DC433E0 for ; Thu, 28 Jan 2021 16:01:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2D6064DEE for ; Thu, 28 Jan 2021 16:01:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229847AbhA1QBn (ORCPT ); Thu, 28 Jan 2021 11:01:43 -0500 Received: from mga01.intel.com ([192.55.52.88]:6998 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229785AbhA1QBl (ORCPT ); Thu, 28 Jan 2021 11:01:41 -0500 IronPort-SDR: ct3ZBpW5vgiMIyP+ArZ/X85TGYYR5H197O2rAlBPLh18XxXNud0lHGPup4n7HdWoPnVnhhGN3t RdZ/E0YFLRow== X-IronPort-AV: E=McAfee;i="6000,8403,9878"; a="199090692" X-IronPort-AV: E=Sophos;i="5.79,382,1602572400"; d="scan'208";a="199090692" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2021 07:59:55 -0800 IronPort-SDR: dW2GBBf3u9X43+wFRhxYe7cZ/tkaRtdFj0z1wbvozCxo6rXV6bU3LmkUqgE+R+A64DWHbGXebW qwBheWk1W0Lg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,382,1602572400"; d="scan'208";a="473879654" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by fmsmga001.fm.intel.com with SMTP; 28 Jan 2021 07:59:53 -0800 Received: by stinkbox (sSMTP sendmail emulation); Thu, 28 Jan 2021 17:59:52 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org Subject: [PATCH 2/5] drm/i915: Extract intel_ddi_power_up_lanes() Date: Thu, 28 Jan 2021 17:59:45 +0200 Message-Id: <20210128155948.13678-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210128155948.13678-1-ville.syrjala@linux.intel.com> References: <20210128155948.13678-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Ville Syrjälä Reduce the copypasta by pulling the combo PHY lane power up stuff into a helper. We'll have a third user soon. Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 35 +++++++++++++----------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index c94650488dc1..88cc6e2fbe91 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3641,6 +3641,23 @@ static void intel_ddi_disable_fec_state(struct intel_encoder *encoder, intel_de_posting_read(dev_priv, dp_tp_ctl_reg(encoder, crtc_state)); } +static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *i915 = to_i915(encoder->base.dev); + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); + enum phy phy = intel_port_to_phy(i915, encoder->port); + + if (intel_phy_is_combo(i915, phy)) { + bool lane_reversal = + dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL; + + intel_combo_phy_power_up_lanes(i915, phy, false, + crtc_state->lane_count, + lane_reversal); + } +} + static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, @@ -3732,14 +3749,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, * 7.f Combo PHY: Configure PORT_CL_DW10 Static Power Down to power up * the used lanes of the DDI. */ - if (intel_phy_is_combo(dev_priv, phy)) { - bool lane_reversal = - dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL; - - intel_combo_phy_power_up_lanes(dev_priv, phy, false, - crtc_state->lane_count, - lane_reversal); - } + intel_ddi_power_up_lanes(encoder, crtc_state); /* * 7.g Configure and enable DDI_BUF_CTL @@ -3830,14 +3840,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, else intel_prepare_dp_ddi_buffers(encoder, crtc_state); - if (intel_phy_is_combo(dev_priv, phy)) { - bool lane_reversal = - dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL; - - intel_combo_phy_power_up_lanes(dev_priv, phy, false, - crtc_state->lane_count, - lane_reversal); - } + intel_ddi_power_up_lanes(encoder, crtc_state); intel_ddi_init_dp_buf_reg(encoder, crtc_state); if (!is_mst) From patchwork Thu Jan 28 15:59:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 373257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82102C433E6 for ; Thu, 28 Jan 2021 16:01:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3FBA764E09 for ; Thu, 28 Jan 2021 16:01:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229885AbhA1QBo (ORCPT ); Thu, 28 Jan 2021 11:01:44 -0500 Received: from mga14.intel.com ([192.55.52.115]:49979 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229586AbhA1QBo (ORCPT ); Thu, 28 Jan 2021 11:01:44 -0500 IronPort-SDR: PPUqFx85IbnRTHZTPrm9m66fZDr4KH9D/XoR0sOJO1s7HTpNl7tl5gMhjweYZlNLCSiXY4V1L6 BxYz5AhnPESA== X-IronPort-AV: E=McAfee;i="6000,8403,9878"; a="179474022" X-IronPort-AV: E=Sophos;i="5.79,383,1602572400"; d="scan'208";a="179474022" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jan 2021 07:59:58 -0800 IronPort-SDR: /T2hFtUULmzkVkmJMV9j9+NbKcdPcBKVfUBmIQ9OHQDUwvOeRlKT93RuJAYLPPZXGUjYDiXjKM 3R/xqeo3oo5g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,383,1602572400"; d="scan'208";a="369899951" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.171]) by orsmga002.jf.intel.com with SMTP; 28 Jan 2021 07:59:56 -0800 Received: by stinkbox (sSMTP sendmail emulation); Thu, 28 Jan 2021 17:59:55 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org Subject: [PATCH 3/5] drm/i915: Power up combo PHY lanes for for HDMI as well Date: Thu, 28 Jan 2021 17:59:46 +0200 Message-Id: <20210128155948.13678-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210128155948.13678-1-ville.syrjala@linux.intel.com> References: <20210128155948.13678-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Ville Syrjälä Currently we only explicitly power up the combo PHY lanes for DP. The spec says we should do it for HDMI as well. Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 88cc6e2fbe91..8fbeb8c24efb 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4337,6 +4337,8 @@ static void intel_enable_ddi_hdmi(struct intel_atomic_state *state, intel_de_write(dev_priv, reg, val); } + intel_ddi_power_up_lanes(encoder, crtc_state); + /* In HDMI/DVI mode, the port width, and swing/emphasis values * are ignored so nothing special needs to be done besides * enabling the port.