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Thu, 28 Jan 2021 23:37:05 +0000 From: Eric Tremblay To: gregkh@linuxfoundation.org Cc: jslaby@suse.com, andriy.shevchenko@linux.intel.com, matwey.kornilov@gmail.com, giulio.benetti@micronovasrl.com, lukas@wunner.de, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, christoph.muellner@theobroma-systems.com, heiko@sntech.de, heiko.stuebner@theobroma-systems.com, Eric Tremblay Subject: [PATCH 1/3] serial: 8250: Handle UART without interrupt on TEMT using em485 Date: Thu, 28 Jan 2021 18:36:27 -0500 Message-Id: <20210128233629.4164-2-etremblay@distech-controls.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210128233629.4164-1-etremblay@distech-controls.com> References: <20210128233629.4164-1-etremblay@distech-controls.com> X-Originating-IP: [2607:fa49:6d60:7d00:a56e:4209:76ad:3739] X-ClientProxiedBy: QB1PR01CA0006.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c00:2d::19) To DM5PR01MB2457.prod.exchangelabs.com (2603:10b6:3:41::21) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (2607:fa49:6d60:7d00:a56e:4209:76ad:3739) by QB1PR01CA0006.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c00:2d::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3805.16 via Frontend Transport; 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When we get in the situation where we get the THRE interrupt but the TEMT bit is not set we start the timer and recall __stop_tx after the delay Signed-off-by: Eric Tremblay --- drivers/tty/serial/8250/8250.h | 1 + drivers/tty/serial/8250/8250_bcm2835aux.c | 2 +- drivers/tty/serial/8250/8250_omap.c | 2 +- drivers/tty/serial/8250/8250_port.c | 89 ++++++++++++++++++++++- include/linux/serial_8250.h | 2 + 5 files changed, 93 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index 52bb21205bb6..5361b761eed7 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -82,6 +82,7 @@ struct serial8250_config { #define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks: * STOP PARITY EPAR SPAR WLEN5 WLEN6 */ +#define UART_CAP_TEMT (1 << 18) /* UART have interrupt on TEMT */ #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */ #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */ diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c index fd95860cd661..354faebce885 100644 --- a/drivers/tty/serial/8250/8250_bcm2835aux.c +++ b/drivers/tty/serial/8250/8250_bcm2835aux.c @@ -91,7 +91,7 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev) return -ENOMEM; /* initialize data */ - up.capabilities = UART_CAP_FIFO | UART_CAP_MINI; + data->uart.capabilities = UART_CAP_FIFO | UART_CAP_MINI | UART_CAP_TEMT; up.port.dev = &pdev->dev; up.port.regshift = 2; up.port.type = PORT_16550; diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c index 23e0decde33e..1c21ac68ff37 100644 --- a/drivers/tty/serial/8250/8250_omap.c +++ b/drivers/tty/serial/8250/8250_omap.c @@ -1294,7 +1294,7 @@ static int omap8250_probe(struct platform_device *pdev) up.port.regshift = 2; up.port.fifosize = 64; up.tx_loadsz = 64; - up.capabilities = UART_CAP_FIFO; + up.capabilities = UART_CAP_FIFO | UART_CAP_TEMT; #ifdef CONFIG_PM /* * Runtime PM is mostly transparent. However to do it right we need to a diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index b0af13074cd3..44a54406e4b4 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -558,8 +558,41 @@ static void serial8250_clear_fifos(struct uart_8250_port *p) } } +static inline void serial8250_em485_update_temt_delay(struct uart_8250_port *p, + unsigned int cflag, unsigned int baud) +{ + unsigned int bits; + + if (!p->em485) + return; + + /* byte size and parity */ + switch (cflag & CSIZE) { + case CS5: + bits = 7; + break; + case CS6: + bits = 8; + break; + case CS7: + bits = 9; + break; + default: + bits = 10; + break; /* CS8 */ + } + + if (cflag & CSTOPB) + bits++; + if (cflag & PARENB) + bits++; + + p->em485->no_temt_delay = bits*1000000/baud; +} + static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t); static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t); +static enum hrtimer_restart serial8250_em485_handle_no_temt(struct hrtimer *t); void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p) { @@ -618,6 +651,18 @@ static int serial8250_em485_init(struct uart_8250_port *p) HRTIMER_MODE_REL); hrtimer_init(&p->em485->start_tx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + + if (!(p->capabilities & UART_CAP_TEMT)) { + struct tty_struct *tty = p->port.state->port.tty; + + serial8250_em485_update_temt_delay(p, tty->termios.c_cflag, + tty_get_baud_rate(tty)); + hrtimer_init(&p->em485->no_temt_timer, CLOCK_MONOTONIC, + HRTIMER_MODE_REL); + p->em485->no_temt_timer.function = + &serial8250_em485_handle_no_temt; + } + p->em485->stop_tx_timer.function = &serial8250_em485_handle_stop_tx; p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx; p->em485->port = p; @@ -649,6 +694,7 @@ void serial8250_em485_destroy(struct uart_8250_port *p) hrtimer_cancel(&p->em485->start_tx_timer); hrtimer_cancel(&p->em485->stop_tx_timer); + hrtimer_cancel(&p->em485->no_temt_timer); kfree(p->em485); p->em485 = NULL; @@ -1494,6 +1540,15 @@ static void start_hrtimer_ms(struct hrtimer *hrt, unsigned long msec) hrtimer_start(hrt, t, HRTIMER_MODE_REL); } +static void start_hrtimer_us(struct hrtimer *hrt, unsigned long usec) +{ + long sec = usec / 1000000; + long nsec = (usec % 1000000) * 1000; + ktime_t t = ktime_set(sec, nsec); + + hrtimer_start(hrt, t, HRTIMER_MODE_REL); +} + static void __stop_tx_rs485(struct uart_8250_port *p) { struct uart_8250_em485 *em485 = p->em485; @@ -1531,8 +1586,18 @@ static inline void __stop_tx(struct uart_8250_port *p) * shift register are empty. It is for device driver to enable * interrupt on TEMT. */ - if ((lsr & BOTH_EMPTY) != BOTH_EMPTY) + if ((lsr & BOTH_EMPTY) != BOTH_EMPTY) { + /* + * On devices with no interrupt on TEMT available + * start a timer for a byte time, the timer will recall + * __stop_tx + */ + if (!(p->capabilities & UART_CAP_TEMT) && (lsr & UART_LSR_THRE)) { + em485->active_timer = &em485->no_temt_timer; + start_hrtimer_us(&em485->no_temt_timer, em485->no_temt_delay); + } return; + } __stop_tx_rs485(p); } @@ -1631,6 +1696,25 @@ static inline void start_tx_rs485(struct uart_port *port) __start_tx(port); } +static enum hrtimer_restart serial8250_em485_handle_no_temt(struct hrtimer *t) +{ + struct uart_8250_em485 *em485; + struct uart_8250_port *p; + unsigned long flags; + + em485 = container_of(t, struct uart_8250_em485, no_temt_timer); + p = em485->port; + + serial8250_rpm_get(p); + spin_lock_irqsave(&p->port.lock, flags); + if (em485->active_timer == &em485->no_temt_timer) + __stop_tx(p); + + spin_unlock_irqrestore(&p->port.lock, flags); + serial8250_rpm_put(p); + return HRTIMER_NORESTART; +} + static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t) { struct uart_8250_em485 *em485; @@ -2792,6 +2876,9 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, serial8250_set_divisor(port, baud, quot, frac); + if (!(up->capabilities & UART_CAP_TEMT)) + serial8250_em485_update_temt_delay(up, termios->c_cflag, baud); + /* * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR * is written without DLAB set, this mode will be disabled. diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h index 9e655055112d..d2c66faff0dd 100644 --- a/include/linux/serial_8250.h +++ b/include/linux/serial_8250.h @@ -79,7 +79,9 @@ struct uart_8250_ops { struct uart_8250_em485 { struct hrtimer start_tx_timer; /* "rs485 start tx" timer */ struct hrtimer stop_tx_timer; /* "rs485 stop tx" timer */ + struct hrtimer no_temt_timer; /* "rs485 no tempt interrupt" timer */ struct hrtimer *active_timer; /* pointer to active timer */ + unsigned int no_temt_delay; /* Value of delay for no TEMT UART */ struct uart_8250_port *port; /* for hrtimer callbacks */ unsigned int tx_stopped:1; /* tx is currently stopped */ }; From patchwork Thu Jan 28 23:36:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Tremblay X-Patchwork-Id: 373036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 542B5C43381 for ; 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Thu, 28 Jan 2021 23:37:08 +0000 From: Eric Tremblay To: gregkh@linuxfoundation.org Cc: jslaby@suse.com, andriy.shevchenko@linux.intel.com, matwey.kornilov@gmail.com, giulio.benetti@micronovasrl.com, lukas@wunner.de, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, christoph.muellner@theobroma-systems.com, heiko@sntech.de, heiko.stuebner@theobroma-systems.com, Eric Tremblay Subject: [PATCH 2/3] serial: 8250: add compatible for fsl,16550-FIFO64 Date: Thu, 28 Jan 2021 18:36:28 -0500 Message-Id: <20210128233629.4164-3-etremblay@distech-controls.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210128233629.4164-1-etremblay@distech-controls.com> References: <20210128233629.4164-1-etremblay@distech-controls.com> X-Originating-IP: [2607:fa49:6d60:7d00:a56e:4209:76ad:3739] X-ClientProxiedBy: QB1PR01CA0006.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c00:2d::19) To DM5PR01MB2457.prod.exchangelabs.com (2603:10b6:3:41::21) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (2607:fa49:6d60:7d00:a56e:4209:76ad:3739) by QB1PR01CA0006.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c00:2d::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3805.16 via Frontend Transport; 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Thu, 28 Jan 2021 23:37:10 +0000 From: Eric Tremblay To: gregkh@linuxfoundation.org Cc: jslaby@suse.com, andriy.shevchenko@linux.intel.com, matwey.kornilov@gmail.com, giulio.benetti@micronovasrl.com, lukas@wunner.de, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, christoph.muellner@theobroma-systems.com, heiko@sntech.de, heiko.stuebner@theobroma-systems.com, Eric Tremblay Subject: [PATCH 3/3] serial: 8250: remove UART_CAP_TEMT on PORT_16550A_FSL64 Date: Thu, 28 Jan 2021 18:36:29 -0500 Message-Id: <20210128233629.4164-4-etremblay@distech-controls.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210128233629.4164-1-etremblay@distech-controls.com> References: <20210128233629.4164-1-etremblay@distech-controls.com> X-Originating-IP: [2607:fa49:6d60:7d00:a56e:4209:76ad:3739] X-ClientProxiedBy: QB1PR01CA0006.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c00:2d::19) To DM5PR01MB2457.prod.exchangelabs.com (2603:10b6:3:41::21) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (2607:fa49:6d60:7d00:a56e:4209:76ad:3739) by QB1PR01CA0006.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:c00:2d::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3805.16 via Frontend Transport; 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Signed-off-by: Eric Tremblay --- drivers/tty/serial/8250/8250_of.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c index 4efc62c0b25c..9a5bb6837949 100644 --- a/drivers/tty/serial/8250/8250_of.c +++ b/drivers/tty/serial/8250/8250_of.c @@ -225,6 +225,9 @@ static int of_platform_serial_probe(struct platform_device *ofdev) &port8250.overrun_backoff_time_ms) != 0) port8250.overrun_backoff_time_ms = 0; + if (port_type != PORT_16550A_FSL64) + port8250.capabilities |= UART_CAP_TEMT; + ret = serial8250_register_8250_port(&port8250); if (ret < 0) goto err_dispose;