From patchwork Wed Jan 27 05:22:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Saeed Mahameed X-Patchwork-Id: 372358 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD036C433DB for ; Wed, 27 Jan 2021 05:47:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9667D20719 for ; Wed, 27 Jan 2021 05:47:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232759AbhA0FrD (ORCPT ); Wed, 27 Jan 2021 00:47:03 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:12987 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234603AbhA0FXD (ORCPT ); Wed, 27 Jan 2021 00:23:03 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Tue, 26 Jan 2021 21:22:13 -0800 Received: from sx1.lan (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 27 Jan 2021 05:22:10 +0000 From: Saeed Mahameed To: , CC: Roi Dayan , Sridhar Samudrala , Saeed Mahameed Subject: [PATCH -stable v5.{7, 8, 9}] net/mlx5: E-Switch, fix changing mode to switchdev Date: Tue, 26 Jan 2021 21:22:00 -0800 Message-ID: <20210127052200.219549-1-saeedm@nvidia.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1611724933; bh=GuUG5wYl7d3IDK2Gp9QK7R1CQ+nteUbx3AqsflNp9YQ=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:MIME-Version: Content-Transfer-Encoding:Content-Type:X-Originating-IP: X-ClientProxiedBy; b=HgHzQCcJpHpa+S3kfzThOSqY1itq1EEnaqdjn8kafcOe/Oz+QxV++tb1rWZkxJWrg rvrsYkYzDXEa/IlXbSAHigPnAadLWdTnjpqJLMY0dktk5SX0BMNKXvES8PBIOTUwpl +2MbBjnLfZTIxGVSHXj48Vyo6e5b+xFed7GFMKgMdnWPMv7qW5bWs/RPRO6F/W3YUn eifJv88E2B95B3xSgNbx1upqCv1i4br6PbEMEZXuISZHVR53jL3+8PV4laQfSAq09K oNIklUqM/v4AyuROzO+Dg/I7njTH7WkkGct4hOe2xSclsvo1h45A+xNfSlprnSa2FZ wFTggmC9HKnpg== Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Roi Dayan Miss rule creation is always done with ignore flow level bit set. Older firmwares do not support that. Check FW support before setting the ignore flow level bit. The issue doesn't exist upstream, it was already fixed by a refactoring commit ae430332557a ("net/mlx5: Refactor multi chains and prios support") which was merged on v5.10. Fixes: 278d51f24330 ("net/mlx5: E-Switch, Increase number of chains and priorities") Reported-by: Sridhar Samudrala Signed-off-by: Roi Dayan Signed-off-by: Saeed Mahameed --- drivers/net/ethernet/mellanox/mlx5/core/esw/chains.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/chains.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/chains.c index 029001040737..b801825b3292 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/esw/chains.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/chains.c @@ -419,7 +419,9 @@ mlx5_esw_chains_add_miss_rule(struct fdb_chain *fdb_chain, struct mlx5_flow_destination dest = {}; struct mlx5_flow_act act = {}; - act.flags = FLOW_ACT_IGNORE_FLOW_LEVEL | FLOW_ACT_NO_APPEND; + act.flags = FLOW_ACT_NO_APPEND; + if (fdb_ignore_flow_level_supported(esw)) + act.flags |= FLOW_ACT_IGNORE_FLOW_LEVEL; act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; dest.ft = next_fdb;