From patchwork Tue Jan 26 09:55:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 370919 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1FADC433DB for ; Tue, 26 Jan 2021 09:57:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9A4302255F for ; Tue, 26 Jan 2021 09:57:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390868AbhAZJ5N (ORCPT ); Tue, 26 Jan 2021 04:57:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391668AbhAZJ4r (ORCPT ); Tue, 26 Jan 2021 04:56:47 -0500 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7114FC0613ED; Tue, 26 Jan 2021 01:56:06 -0800 (PST) Received: by mail-ed1-x532.google.com with SMTP id d22so19012401edy.1; Tue, 26 Jan 2021 01:56:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2UsIhDknBiOfKaHxlibyvi4CoRT/UMiyIJnEzMxKA54=; b=GlCl3UUuoFUofdZDn1iAkD5eyc4n3aXXLWWr0qiJeNawAFwYNSHBzrjZkxaCnJzUam GI/v17kL2K1pQNn+CKkd69IGVzKI/6WpPEhzZxe3Q8d6opnKvlwEHBQEPlffqyHxe7AM 8vH0NshDb7zQpQZP0/dUT6hDEXaW5HsVtN/XWGa6vSdXN6nbeWxryzIkQ/vPiNuXo7OW dFP/15HZaj4rK8FylAHLr3vAkcNcQYGSEekIx4OUlF3EoxsTuxVcf7IATOddkxZMWToB AOpmQzvN/v/u0Eg4zZsmPa+Ax0b8FBSf0THhHT9IpwI7zgaJxdx8HqmU2I+PiogmkOhc 0s8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2UsIhDknBiOfKaHxlibyvi4CoRT/UMiyIJnEzMxKA54=; b=MNwSzx5gcpFWzvA5nnclIttm+vFpPZBgNBj70qpIP3Q6jlQ0dmo6Vdt6m8AiqYlYJa 71wDN6BCMZk2cRHa3zhdTa5olBreXk8vO8Hkr9LHj182Z9R5G51sZFKK/ZXdljKdRf2z y2JO4JMut1my9HhgR+SXltDkV2Q2zUPKYSmYsP0W+/VifPc//H91TIWUBOQhFVBnyIfV N8VDHO+tn9qBdBA/5vV8QsrxA5JUEN6tN54OT8yVD4mppEt9y8NEJ54h24bFeM6Ju5Oc XFaiGyWI83sMQXbsxryah/L1806WsVc8b9Ugkn6aKIjcIstW9AVl7yYbaO9BibtORvWV i+7A== X-Gm-Message-State: AOAM531l6CHIshltlyvy16jAbkFNne5j870u4FplKh9CJW6tDTFQJrv5 xj4tk7VyMHx/TIX0UHK/NTg= X-Google-Smtp-Source: ABdhPJxXw262UWxvqZSJJbq37L8AjipjIsWacP2dsHP6OeJ22s+4h47FFkBrfjDhI81iNHy/JPlpGw== X-Received: by 2002:a50:fc8c:: with SMTP id f12mr3878101edq.225.1611654965227; Tue, 26 Jan 2021 01:56:05 -0800 (PST) Received: from localhost.localdomain ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id h12sm11648310edb.16.2021.01.26.01.56.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 01:56:04 -0800 (PST) From: Cristian Ciocaltea To: Lee Jones , Mark Brown , Rob Herring , Dmitry Torokhov , Sebastian Reichel Cc: Manivannan Sadhasivam , Liam Girdwood , =?utf-8?q?Andreas_F=C3=A4rber?= , Linus Walleij , linux-actions@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Rob Herring Subject: [PATCH v7 1/5] dt-bindings: input: Add reset-time-sec common property Date: Tue, 26 Jan 2021 11:55:57 +0200 Message-Id: X-Mailer: git-send-email 2.30.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Add a new common property 'reset-time-sec' to be used in conjunction with the devices supporting the key pressed reset feature. Signed-off-by: Cristian Ciocaltea Reviewed-by: Rob Herring --- Changes in v7: - None Changes in v6: - None Changes in v5: - None Changes in v4: - Added Reviewed-by from Rob Changes in v3: - This patch was not present in v2 Documentation/devicetree/bindings/input/input.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/input/input.yaml b/Documentation/devicetree/bindings/input/input.yaml index ab407f266bef..caba93209ae7 100644 --- a/Documentation/devicetree/bindings/input/input.yaml +++ b/Documentation/devicetree/bindings/input/input.yaml @@ -34,4 +34,11 @@ properties: specify this property. $ref: /schemas/types.yaml#/definitions/uint32 + reset-time-sec: + description: + Duration in seconds which the key should be kept pressed for device to + reset automatically. Device with key pressed reset feature can specify + this property. + $ref: /schemas/types.yaml#/definitions/uint32 + additionalProperties: true From patchwork Tue Jan 26 09:55:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 370918 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED71CC433E0 for ; Tue, 26 Jan 2021 13:26:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B6ACA20729 for ; Tue, 26 Jan 2021 13:26:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391374AbhAZN0A (ORCPT ); Tue, 26 Jan 2021 08:26:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391749AbhAZJ5Y (ORCPT ); Tue, 26 Jan 2021 04:57:24 -0500 Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2DD4AC061786; Tue, 26 Jan 2021 01:56:08 -0800 (PST) Received: by mail-ed1-x531.google.com with SMTP id z22so4295670edb.9; Tue, 26 Jan 2021 01:56:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=06PBoT937iPmfRNftqV4radm7GXUsZecDfli3DIAGK0=; b=C0ntFk1xOH3aYdDDj+4d4fThcAlydMznRVFIahM3+2agbMray9eFjT8IHk7ExdUyJy FiS01OYdPHimY3yj9wwFbBMD5Q8jPug/uZB2X4h7AEfh2MratygQLzf+4c9smEo4oqLS iI0DR875AOyDK2wWjJpgn3FENjhJUeH8WqUM8GBE6ZZNf5C9n0PH8qb95lkUFwj9uF+z CZ3J2AYWVSNa/rXYkgp9qpwceVikhEqNxnyaiNqhfXlKom7OaVLiJFKZvLEgfEfFQ4fy WGt+BP5Bg9OADgrl2o2KS5IeWCb6jteU4kawKCTll8vBf/pm2SezUYQNoWYaiHLUjP31 Du1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=06PBoT937iPmfRNftqV4radm7GXUsZecDfli3DIAGK0=; b=aww8q4sn0Sob2sJANi5AYfUKWAw9BowFBaA3VxY2aKyQ0gvNpA6PVnuWzrBC+YXAfE x9WlDw0di8yGbVB43A81ePQaOU1/iLj8sugpLaSnPP67bZWQZ9f2Q2C9jRwmnK0vi/+Z FtopLYn8sEaRvEqJ13peSLXKAeF5WUvCyB0WxBL8SN7lBpHzgljVmzfWmpT+18JA8AkH PFU9Vly1dF2JB1YB9SmSqUXdKA8rGjhIWRlCvP1A0NOZrFyvXmKBJZuyw4v/tZfYfH8+ ybGv2/rJiwkn9jTvVuPKC8JlWTz7cDfH8d/j3Vwqeoddkn76XYYhnNlQWYK57vdFGI6Z cm1A== X-Gm-Message-State: AOAM5334+ip1u3RlYgsKjzIYZO8nAfFDUeDEZ7i2F3xCOkD1Ufjb+8Jy Dn4lnv9jR+BK8dMkiQjYQrI= X-Google-Smtp-Source: ABdhPJzYfeOiC9T4MBpqLzLV8/76oAIyaZLhmWZ5XYcyeN4Vb0+H9K8YwYfZiI13STEpTDZVZh1dsw== X-Received: by 2002:a05:6402:50c6:: with SMTP id h6mr3889876edb.117.1611654966863; Tue, 26 Jan 2021 01:56:06 -0800 (PST) Received: from localhost.localdomain ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id h12sm11648310edb.16.2021.01.26.01.56.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 01:56:06 -0800 (PST) From: Cristian Ciocaltea To: Lee Jones , Mark Brown , Rob Herring , Dmitry Torokhov , Sebastian Reichel Cc: Manivannan Sadhasivam , Liam Girdwood , =?utf-8?q?Andreas_F=C3=A4rber?= , Linus Walleij , linux-actions@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Rob Herring Subject: [PATCH v7 2/5] dt-bindings: mfd: Add Actions Semi ATC260x PMIC binding Date: Tue, 26 Jan 2021 11:55:58 +0200 Message-Id: <43dc8093fa5c5bdf518d5b448459ec3495045a33.1611653995.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Add devicetree binding for Actions Semi ATC260x PMICs. Signed-off-by: Cristian Ciocaltea Reviewed-by: Rob Herring --- Changes in v7: - None Changes in v6: - None Changes in v5: - None Changes in v4 - Added Reviewed-by from Rob - Added support for ATC2603C LDO12 fixed regulator per Mark's suggestion Changes in v3 (according to Rob's review): - Dropped the 'pwrc' and 'onkey' nodes - Used a common 'reset-time-sec' property .../bindings/mfd/actions,atc260x.yaml | 183 ++++++++++++++++++ 1 file changed, 183 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/actions,atc260x.yaml diff --git a/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml b/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml new file mode 100644 index 000000000000..dd43a0c766f3 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml @@ -0,0 +1,183 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/actions,atc260x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi ATC260x Power Management IC bindings + +maintainers: + - Manivannan Sadhasivam + - Cristian Ciocaltea + +description: | + ATC260x series PMICs integrates Audio Codec, Power Management, RTC, IR + and GPIO controller blocks. Currently only the PM related functionalities + (i.e. regulators and system power-off/reboot) for the ATC2603C and ATC2609A + chip variants are supported. + ATC2603C includes 3 programmable DC-DC converters, 9 programmable LDO + regulators and 1 fixed LDO regulator. + ATC2609A includes 5 programmable DC-DC converters and 10 programmable LDO + regulators. + +allOf: + - $ref: ../input/input.yaml + +properties: + compatible: + enum: + - actions,atc2603c + - actions,atc2609a + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-time-sec: + description: | + Duration in seconds which the key should be kept pressed for device + to reset automatically. The hardware default is 8. Use 0 to disable + this functionality. + enum: [0, 6, 8, 10, 12] + + regulators: + type: object + description: | + List of child nodes specifying the regulators, depending on chip variant: + * ATC2603C: dcdc[1-3], ldo[1-3,5-8,11,12], switchldo1 + * ATC2609A: dcdc[0-4], ldo[0-9] + + properties: + compatible: + enum: + - actions,atc2603c-regulator + - actions,atc2609a-regulator + + switchldo1: + type: object + $ref: ../regulator/regulator.yaml + + properties: + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-min-microvolt: true + regulator-max-microvolt: true + regulator-allow-bypass: true + regulator-active-discharge: true + + additionalProperties: false + + patternProperties: + "^(dcdc[0-4]|ldo[0-9]|ldo1[1-2]|switchldo1)-supply$": + description: ATC260x voltage regulators supplies + + "^(dcdc[0-4]|ldo[0-9]|ldo1[1-2])$": + type: object + $ref: ../regulator/regulator.yaml + + properties: + regulator-name: true + regulator-boot-on: true + regulator-always-on: true + regulator-min-microvolt: true + regulator-max-microvolt: true + regulator-allow-bypass: true + + additionalProperties: false + + allOf: + - if: + properties: + compatible: + contains: + const: actions,atc2603c-regulator + then: + patternProperties: + "^(dcdc[0,4]|ldo[0,4,9])(-supply)?$": false + + "^(ldo|dcdc)": + properties: + regulator-allow-bypass: false + - if: + properties: + compatible: + contains: + const: actions,atc2609a-regulator + then: + patternProperties: + "^(ldo1[1-2]|switchldo1)(-supply)?$": false + + "^(dcdc|ldo[3-9])": + properties: + regulator-allow-bypass: false + + required: + - compatible + + additionalProperties: false + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + pmic@65 { + compatible = "actions,atc2603c"; + reg = <0x65>; + interrupt-parent = <&sirq>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + + reset-time-sec = <6>; + + regulators { + compatible = "actions,atc2603c-regulator"; + + dcdc1-supply = <®_5v0>; + dcdc3-supply = <®_5v0>; + ldo5-supply = <®_5v0>; + switchldo1-supply = <&vcc>; + + vdd_cpu: dcdc1 { + regulator-name = "VDD_CPU"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + }; + + vcc: dcdc3 { + regulator-name = "VCC"; + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vcc_3v1: ldo5 { + regulator-name = "VCC_3V1"; + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3300000>; + }; + + sd_vcc: switchldo1 { + regulator-name = "SD_VCC"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + +... From patchwork Tue Jan 26 09:55:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 371917 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB7FFC433E6 for ; Tue, 26 Jan 2021 13:26:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9A843206F9 for ; Tue, 26 Jan 2021 13:26:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390779AbhAZNZ4 (ORCPT ); Tue, 26 Jan 2021 08:25:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391747AbhAZJ5Y (ORCPT ); Tue, 26 Jan 2021 04:57:24 -0500 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36AADC061788; Tue, 26 Jan 2021 01:56:10 -0800 (PST) Received: by mail-ed1-x530.google.com with SMTP id a14so7682372edu.7; Tue, 26 Jan 2021 01:56:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sKMk578Q87qU+MES4M1yhc7YxZkOzg4ChkbAXYlnMYc=; b=g1ldbBjYgtwNYVb9bfaqDJD1O+sG9vdYg29+AzzLAemMm2nxCgveLcOWDA5Vb8vM1i 0Dx6FluaIY/LKLYo2qA9Z3POacfXjy2lNs/NlHl/wU81WjSsBzomSpdgPUXwX33nMTAO Wnd6jSGBBN//SpXAs2UOJyfN0fHU7rKspKSprI0rZARJwmLq3jz9uc5uNRLOOpVdidgJ 7n1tCIx+eNCUI7xI89eqZmbYHYOT9HUCk7TXPjtMt21cXBl9vSAd17Ajhtx3dXQ026GV hgk+qe4hScNp9bfm8XgSZRJGqQbSuYzWLTrr11nHqWJilHrykG0U8Vu8mSweCtrYQvjC Tf0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sKMk578Q87qU+MES4M1yhc7YxZkOzg4ChkbAXYlnMYc=; b=BbEJBmGq3x3vlGHVY3cMoxH9GbsIOSSKeVS0DWDu6kpB6gI/jb8XF8KXWGN4ERz7Y1 oZGyaeF0A7NwMJZaycrtce1ZpPAFCwm+XS3/FHtieSxTgc5N37i5PvE1EwPq/1I5iB+c v4yAhpYMVo0QOAvsWgMYxU720Oi3qDSdkGt/kjUji4g0h+d3bgvNVztBL/v+oLAZ/fQO 9BvQqS/Fkjsx/aS967lPOlZdr2POB4aDxwe7Yv7VMjjRZ/KvToljHpNiK7fJ0YvpTVY9 M9O+Mcye2fYEy5jidhi4pZdsmwSrnDoX+km1pXN+PIRiEuDETzzObQaAOyD7tuaga/aN NLjw== X-Gm-Message-State: AOAM530OM6dASZWtItRrgl5rIwpt3++GSNDOyX+RxuyzQMQv92KHfSeg Qqk3KWWUVnPd8qHZElyg1dY= X-Google-Smtp-Source: ABdhPJxQcsb0xuLbN9IE9lV1FLID1uI5fX3/bze67zqqD0HckSrHpJGCFCcQeG+aFqCjcYiFWAwzZA== X-Received: by 2002:a05:6402:151:: with SMTP id s17mr3708535edu.107.1611654968810; Tue, 26 Jan 2021 01:56:08 -0800 (PST) Received: from localhost.localdomain ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id h12sm11648310edb.16.2021.01.26.01.56.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 01:56:08 -0800 (PST) From: Cristian Ciocaltea To: Lee Jones , Mark Brown , Rob Herring , Dmitry Torokhov , Sebastian Reichel Cc: Manivannan Sadhasivam , Liam Girdwood , =?utf-8?q?Andreas_F=C3=A4rber?= , Linus Walleij , linux-actions@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v7 3/5] mfd: Add MFD driver for ATC260x PMICs Date: Tue, 26 Jan 2021 11:55:59 +0200 Message-Id: <249465f02db10c52b9ccce45cb2de36373cfc81d.1611653995.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Add initial support for the Actions Semi ATC260x PMICs which integrates Audio Codec, Power management, Clock generation and GPIO controller blocks. For the moment this driver only supports Regulator, Poweroff and Onkey functionalities for the ATC2603C and ATC2609A chip variants. Since the PMICs can be accessed using both I2C and SPI buses, the following driver structure has been adopted: -----> atc260x-core.c (Implements core functionalities) / ATC260x --------> atc260x-i2c.c (Implements I2C interface) \ -----> atc260x-spi.c (Implements SPI interface - TODO) Co-developed-by: Manivannan Sadhasivam Signed-off-by: Manivannan Sadhasivam Signed-off-by: Cristian Ciocaltea --- Changes in v7: - None Changes in v6 - per Lee's feedback: - Added ATC260X_CHIP_REV_MAX magic number - Fixed code formattting arround atc260x_i2c_driver initialization - Replaced dev_init() callback in struct atc260x with a pointer to a new struct atc260x_init_regs to hold hardware specific registry information - Added a generic atc260x_dev_init() function and instantiated atc2603c_init_regs and atc2609a_init_regs Changes in v5: - None Changes in v4 - according to Lee's review: - Replaced 'regmap_add_irq_chip()' with 'devm' counterpart and dropped 'atc260x_device_remove()' and 'atc260x_i2c_remove()' functions - Moved kerneldoc sections from prototypes to real functions - Placed single line entries on one line for mfd_cells[] - Several other minor changes Changes in v3: - Fixed the issues reported by Lee's kernel test robot: WARNING: modpost: missing MODULE_LICENSE() in drivers/mfd/atc260x-core.o >> FATAL: modpost: drivers/mfd/atc260x-i2c: sizeof(struct i2c_device_id)=24 is not a modulo of the size of section __mod_i2c___device_table=588. >> Fix definition of struct i2c_device_id in mod_devicetable.h - Dropped the usage of '.of_compatible' fields in {atc2603c,atc2609a}_mfd_cells[] - Added 'Co-developed-by' tag in commit message and dropped [cristian: ...] line drivers/mfd/Kconfig | 18 ++ drivers/mfd/Makefile | 3 + drivers/mfd/atc260x-core.c | 310 +++++++++++++++++++++++++++ drivers/mfd/atc260x-i2c.c | 64 ++++++ include/linux/mfd/atc260x/atc2603c.h | 281 ++++++++++++++++++++++++ include/linux/mfd/atc260x/atc2609a.h | 308 ++++++++++++++++++++++++++ include/linux/mfd/atc260x/core.h | 58 +++++ 7 files changed, 1042 insertions(+) create mode 100644 drivers/mfd/atc260x-core.c create mode 100644 drivers/mfd/atc260x-i2c.c create mode 100644 include/linux/mfd/atc260x/atc2603c.h create mode 100644 include/linux/mfd/atc260x/atc2609a.h create mode 100644 include/linux/mfd/atc260x/core.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index bdfce7b15621..a27ff2e83e7a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2064,6 +2064,24 @@ config MFD_WCD934X This driver provides common support WCD934x audio codec and its associated Pin Controller, Soundwire Controller and Audio codec. +config MFD_ATC260X + tristate + select MFD_CORE + select REGMAP + select REGMAP_IRQ + +config MFD_ATC260X_I2C + tristate "Actions Semi ATC260x PMICs with I2C" + select MFD_ATC260X + select REGMAP_I2C + depends on I2C + help + Support for the Actions Semi ATC260x PMICs controlled via I2C. + + This driver provides common support for accessing the ATC2603C + and ATC2609A chip variants, additional drivers must be enabled + in order to use the functionality of the device. + config MFD_KHADAS_MCU tristate "Support for Khadas System control Microcontroller" depends on I2C diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 14fdb188af02..1ea88d2c83b4 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -268,3 +268,6 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o + +obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o +obj-$(CONFIG_MFD_ATC260X_I2C) += atc260x-i2c.o diff --git a/drivers/mfd/atc260x-core.c b/drivers/mfd/atc260x-core.c new file mode 100644 index 000000000000..7148ff5b05b1 --- /dev/null +++ b/drivers/mfd/atc260x-core.c @@ -0,0 +1,310 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Core support for ATC260x PMICs + * + * Copyright (C) 2019 Manivannan Sadhasivam + * Copyright (C) 2020 Cristian Ciocaltea + */ + +#include +#include +#include +#include +#include +#include +#include + +#define ATC260X_CHIP_REV_MAX 31 + +struct atc260x_init_regs { + unsigned int cmu_devrst; + unsigned int cmu_devrst_ints; + unsigned int ints_msk; + unsigned int pad_en; + unsigned int pad_en_extirq; +}; + +static void regmap_lock_mutex(void *__mutex) +{ + struct mutex *mutex = __mutex; + + /* + * Using regmap within an atomic context (e.g. accessing a PMIC when + * powering system down) is normally allowed only if the regmap type + * is MMIO and the regcache type is either REGCACHE_NONE or + * REGCACHE_FLAT. For slow buses like I2C and SPI, the regmap is + * internally protected by a mutex which is acquired non-atomically. + * + * Let's improve this by using a customized locking scheme inspired + * from I2C atomic transfer. See i2c_in_atomic_xfer_mode() for a + * starting point. + */ + if (system_state > SYSTEM_RUNNING && irqs_disabled()) + mutex_trylock(mutex); + else + mutex_lock(mutex); +} + +static void regmap_unlock_mutex(void *__mutex) +{ + struct mutex *mutex = __mutex; + + mutex_unlock(mutex); +} + +static const struct regmap_config atc2603c_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .max_register = ATC2603C_SADDR, + .cache_type = REGCACHE_NONE, +}; + +static const struct regmap_config atc2609a_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .max_register = ATC2609A_SADDR, + .cache_type = REGCACHE_NONE, +}; + +static const struct regmap_irq atc2603c_regmap_irqs[] = { + REGMAP_IRQ_REG(ATC2603C_IRQ_AUDIO, 0, ATC2603C_INTS_MSK_AUDIO), + REGMAP_IRQ_REG(ATC2603C_IRQ_OV, 0, ATC2603C_INTS_MSK_OV), + REGMAP_IRQ_REG(ATC2603C_IRQ_OC, 0, ATC2603C_INTS_MSK_OC), + REGMAP_IRQ_REG(ATC2603C_IRQ_OT, 0, ATC2603C_INTS_MSK_OT), + REGMAP_IRQ_REG(ATC2603C_IRQ_UV, 0, ATC2603C_INTS_MSK_UV), + REGMAP_IRQ_REG(ATC2603C_IRQ_ALARM, 0, ATC2603C_INTS_MSK_ALARM), + REGMAP_IRQ_REG(ATC2603C_IRQ_ONOFF, 0, ATC2603C_INTS_MSK_ONOFF), + REGMAP_IRQ_REG(ATC2603C_IRQ_SGPIO, 0, ATC2603C_INTS_MSK_SGPIO), + REGMAP_IRQ_REG(ATC2603C_IRQ_IR, 0, ATC2603C_INTS_MSK_IR), + REGMAP_IRQ_REG(ATC2603C_IRQ_REMCON, 0, ATC2603C_INTS_MSK_REMCON), + REGMAP_IRQ_REG(ATC2603C_IRQ_POWER_IN, 0, ATC2603C_INTS_MSK_POWERIN), +}; + +static const struct regmap_irq atc2609a_regmap_irqs[] = { + REGMAP_IRQ_REG(ATC2609A_IRQ_AUDIO, 0, ATC2609A_INTS_MSK_AUDIO), + REGMAP_IRQ_REG(ATC2609A_IRQ_OV, 0, ATC2609A_INTS_MSK_OV), + REGMAP_IRQ_REG(ATC2609A_IRQ_OC, 0, ATC2609A_INTS_MSK_OC), + REGMAP_IRQ_REG(ATC2609A_IRQ_OT, 0, ATC2609A_INTS_MSK_OT), + REGMAP_IRQ_REG(ATC2609A_IRQ_UV, 0, ATC2609A_INTS_MSK_UV), + REGMAP_IRQ_REG(ATC2609A_IRQ_ALARM, 0, ATC2609A_INTS_MSK_ALARM), + REGMAP_IRQ_REG(ATC2609A_IRQ_ONOFF, 0, ATC2609A_INTS_MSK_ONOFF), + REGMAP_IRQ_REG(ATC2609A_IRQ_WKUP, 0, ATC2609A_INTS_MSK_WKUP), + REGMAP_IRQ_REG(ATC2609A_IRQ_IR, 0, ATC2609A_INTS_MSK_IR), + REGMAP_IRQ_REG(ATC2609A_IRQ_REMCON, 0, ATC2609A_INTS_MSK_REMCON), + REGMAP_IRQ_REG(ATC2609A_IRQ_POWER_IN, 0, ATC2609A_INTS_MSK_POWERIN), +}; + +static const struct regmap_irq_chip atc2603c_regmap_irq_chip = { + .name = "atc2603c", + .irqs = atc2603c_regmap_irqs, + .num_irqs = ARRAY_SIZE(atc2603c_regmap_irqs), + .num_regs = 1, + .status_base = ATC2603C_INTS_PD, + .mask_base = ATC2603C_INTS_MSK, + .mask_invert = true, +}; + +static const struct regmap_irq_chip atc2609a_regmap_irq_chip = { + .name = "atc2609a", + .irqs = atc2609a_regmap_irqs, + .num_irqs = ARRAY_SIZE(atc2609a_regmap_irqs), + .num_regs = 1, + .status_base = ATC2609A_INTS_PD, + .mask_base = ATC2609A_INTS_MSK, + .mask_invert = true, +}; + +static const struct resource atc2603c_onkey_resources[] = { + DEFINE_RES_IRQ(ATC2603C_IRQ_ONOFF), +}; + +static const struct resource atc2609a_onkey_resources[] = { + DEFINE_RES_IRQ(ATC2609A_IRQ_ONOFF), +}; + +static const struct mfd_cell atc2603c_mfd_cells[] = { + { .name = "atc260x-regulator" }, + { .name = "atc260x-pwrc" }, + { + .name = "atc260x-onkey", + .num_resources = ARRAY_SIZE(atc2603c_onkey_resources), + .resources = atc2603c_onkey_resources, + }, +}; + +static const struct mfd_cell atc2609a_mfd_cells[] = { + { .name = "atc260x-regulator" }, + { .name = "atc260x-pwrc" }, + { + .name = "atc260x-onkey", + .num_resources = ARRAY_SIZE(atc2609a_onkey_resources), + .resources = atc2609a_onkey_resources, + }, +}; + +static const struct atc260x_init_regs atc2603c_init_regs = { + .cmu_devrst = ATC2603C_CMU_DEVRST, + .cmu_devrst_ints = ATC2603C_CMU_DEVRST_INTS, + .ints_msk = ATC2603C_INTS_MSK, + .pad_en = ATC2603C_PAD_EN, + .pad_en_extirq = ATC2603C_PAD_EN_EXTIRQ, +}; + +static const struct atc260x_init_regs atc2609a_init_regs = { + .cmu_devrst = ATC2609A_CMU_DEVRST, + .cmu_devrst_ints = ATC2609A_CMU_DEVRST_INTS, + .ints_msk = ATC2609A_INTS_MSK, + .pad_en = ATC2609A_PAD_EN, + .pad_en_extirq = ATC2609A_PAD_EN_EXTIRQ, +}; + +static void atc260x_cmu_reset(struct atc260x *atc260x) +{ + const struct atc260x_init_regs *regs = atc260x->init_regs; + + /* Assert reset */ + regmap_update_bits(atc260x->regmap, regs->cmu_devrst, + regs->cmu_devrst_ints, ~regs->cmu_devrst_ints); + + /* De-assert reset */ + regmap_update_bits(atc260x->regmap, regs->cmu_devrst, + regs->cmu_devrst_ints, regs->cmu_devrst_ints); +} + +static void atc260x_dev_init(struct atc260x *atc260x) +{ + const struct atc260x_init_regs *regs = atc260x->init_regs; + + /* Initialize interrupt block */ + atc260x_cmu_reset(atc260x); + + /* Disable all interrupt sources */ + regmap_write(atc260x->regmap, regs->ints_msk, 0); + + /* Enable EXTIRQ pad */ + regmap_update_bits(atc260x->regmap, regs->pad_en, + regs->pad_en_extirq, regs->pad_en_extirq); +} + +/** + * atc260x_match_device(): Setup ATC260x variant related fields + * + * @atc260x: ATC260x device to setup (.dev field must be set) + * @regmap_cfg: regmap config associated with this ATC260x device + * + * This lets the ATC260x core configure the MFD cells and register maps + * for later use. + */ +int atc260x_match_device(struct atc260x *atc260x, struct regmap_config *regmap_cfg) +{ + struct device *dev = atc260x->dev; + const void *of_data; + + of_data = of_device_get_match_data(dev); + if (!of_data) + return -ENODEV; + + atc260x->ic_type = (unsigned long)of_data; + + switch (atc260x->ic_type) { + case ATC2603C: + *regmap_cfg = atc2603c_regmap_config; + atc260x->regmap_irq_chip = &atc2603c_regmap_irq_chip; + atc260x->cells = atc2603c_mfd_cells; + atc260x->nr_cells = ARRAY_SIZE(atc2603c_mfd_cells); + atc260x->type_name = "atc2603c"; + atc260x->rev_reg = ATC2603C_CHIP_VER; + atc260x->init_regs = &atc2603c_init_regs; + break; + case ATC2609A: + *regmap_cfg = atc2609a_regmap_config; + atc260x->regmap_irq_chip = &atc2609a_regmap_irq_chip; + atc260x->cells = atc2609a_mfd_cells; + atc260x->nr_cells = ARRAY_SIZE(atc2609a_mfd_cells); + atc260x->type_name = "atc2609a"; + atc260x->rev_reg = ATC2609A_CHIP_VER; + atc260x->init_regs = &atc2609a_init_regs; + break; + default: + dev_err(dev, "Unsupported ATC260x device type: %u\n", + atc260x->ic_type); + return -EINVAL; + } + + atc260x->regmap_mutex = devm_kzalloc(dev, sizeof(*atc260x->regmap_mutex), + GFP_KERNEL); + if (!atc260x->regmap_mutex) + return -ENOMEM; + + mutex_init(atc260x->regmap_mutex); + + regmap_cfg->lock = regmap_lock_mutex, + regmap_cfg->unlock = regmap_unlock_mutex, + regmap_cfg->lock_arg = atc260x->regmap_mutex; + + return 0; +} +EXPORT_SYMBOL_GPL(atc260x_match_device); + +/** + * atc260x_device_probe(): Probe a configured ATC260x device + * + * @atc260x: ATC260x device to probe (must be configured) + * + * This function lets the ATC260x core register the ATC260x MFD devices + * and IRQCHIP. The ATC260x device passed in must be fully configured + * with atc260x_match_device, its IRQ set, and regmap created. + */ +int atc260x_device_probe(struct atc260x *atc260x) +{ + struct device *dev = atc260x->dev; + unsigned int chip_rev; + int ret; + + if (!atc260x->irq) { + dev_err(dev, "No interrupt support\n"); + return -EINVAL; + } + + /* Initialize the hardware */ + atc260x_dev_init(atc260x); + + ret = regmap_read(atc260x->regmap, atc260x->rev_reg, &chip_rev); + if (ret) { + dev_err(dev, "Failed to get chip revision\n"); + return ret; + } + + if (chip_rev > ATC260X_CHIP_REV_MAX) { + dev_err(dev, "Unknown chip revision: %u\n", chip_rev); + return -EINVAL; + } + + atc260x->ic_ver = __ffs(chip_rev + 1U); + + dev_info(dev, "Detected chip type %s rev.%c\n", + atc260x->type_name, 'A' + atc260x->ic_ver); + + ret = devm_regmap_add_irq_chip(dev, atc260x->regmap, atc260x->irq, IRQF_ONESHOT, + -1, atc260x->regmap_irq_chip, &atc260x->irq_data); + if (ret) { + dev_err(dev, "Failed to add IRQ chip: %d\n", ret); + return ret; + } + + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, + atc260x->cells, atc260x->nr_cells, NULL, 0, + regmap_irq_get_domain(atc260x->irq_data)); + if (ret) { + dev_err(dev, "Failed to add child devices: %d\n", ret); + regmap_del_irq_chip(atc260x->irq, atc260x->irq_data); + } + + return ret; +} +EXPORT_SYMBOL_GPL(atc260x_device_probe); + +MODULE_DESCRIPTION("ATC260x PMICs Core support"); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_AUTHOR("Cristian Ciocaltea "); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/atc260x-i2c.c b/drivers/mfd/atc260x-i2c.c new file mode 100644 index 000000000000..362005703367 --- /dev/null +++ b/drivers/mfd/atc260x-i2c.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * I2C bus interface for ATC260x PMICs + * + * Copyright (C) 2019 Manivannan Sadhasivam + * Copyright (C) 2020 Cristian Ciocaltea + */ + +#include +#include +#include +#include +#include + +static int atc260x_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct atc260x *atc260x; + struct regmap_config regmap_cfg; + int ret; + + atc260x = devm_kzalloc(&client->dev, sizeof(*atc260x), GFP_KERNEL); + if (!atc260x) + return -ENOMEM; + + atc260x->dev = &client->dev; + atc260x->irq = client->irq; + + ret = atc260x_match_device(atc260x, ®map_cfg); + if (ret) + return ret; + + i2c_set_clientdata(client, atc260x); + + atc260x->regmap = devm_regmap_init_i2c(client, ®map_cfg); + if (IS_ERR(atc260x->regmap)) { + ret = PTR_ERR(atc260x->regmap); + dev_err(&client->dev, "failed to init regmap: %d\n", ret); + return ret; + } + + return atc260x_device_probe(atc260x); +} + +const struct of_device_id atc260x_i2c_of_match[] = { + { .compatible = "actions,atc2603c", .data = (void *)ATC2603C }, + { .compatible = "actions,atc2609a", .data = (void *)ATC2609A }, + { } +}; +MODULE_DEVICE_TABLE(of, atc260x_i2c_of_match); + +static struct i2c_driver atc260x_i2c_driver = { + .driver = { + .name = "atc260x", + .of_match_table = of_match_ptr(atc260x_i2c_of_match), + }, + .probe = atc260x_i2c_probe, +}; +module_i2c_driver(atc260x_i2c_driver); + +MODULE_DESCRIPTION("ATC260x PMICs I2C bus interface"); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_AUTHOR("Cristian Ciocaltea "); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/atc260x/atc2603c.h b/include/linux/mfd/atc260x/atc2603c.h new file mode 100644 index 000000000000..07ac640ef3e1 --- /dev/null +++ b/include/linux/mfd/atc260x/atc2603c.h @@ -0,0 +1,281 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * ATC2603C PMIC register definitions + * + * Copyright (C) 2020 Cristian Ciocaltea + */ + +#ifndef __LINUX_MFD_ATC260X_ATC2603C_H +#define __LINUX_MFD_ATC260X_ATC2603C_H + +enum atc2603c_irq_def { + ATC2603C_IRQ_AUDIO = 0, + ATC2603C_IRQ_OV, + ATC2603C_IRQ_OC, + ATC2603C_IRQ_OT, + ATC2603C_IRQ_UV, + ATC2603C_IRQ_ALARM, + ATC2603C_IRQ_ONOFF, + ATC2603C_IRQ_SGPIO, + ATC2603C_IRQ_IR, + ATC2603C_IRQ_REMCON, + ATC2603C_IRQ_POWER_IN, +}; + +/* PMU Registers */ +#define ATC2603C_PMU_SYS_CTL0 0x00 +#define ATC2603C_PMU_SYS_CTL1 0x01 +#define ATC2603C_PMU_SYS_CTL2 0x02 +#define ATC2603C_PMU_SYS_CTL3 0x03 +#define ATC2603C_PMU_SYS_CTL4 0x04 +#define ATC2603C_PMU_SYS_CTL5 0x05 +#define ATC2603C_PMU_SYS_CTL6 0x06 +#define ATC2603C_PMU_SYS_CTL7 0x07 +#define ATC2603C_PMU_SYS_CTL8 0x08 +#define ATC2603C_PMU_SYS_CTL9 0x09 +#define ATC2603C_PMU_BAT_CTL0 0x0A +#define ATC2603C_PMU_BAT_CTL1 0x0B +#define ATC2603C_PMU_VBUS_CTL0 0x0C +#define ATC2603C_PMU_VBUS_CTL1 0x0D +#define ATC2603C_PMU_WALL_CTL0 0x0E +#define ATC2603C_PMU_WALL_CTL1 0x0F +#define ATC2603C_PMU_SYS_PENDING 0x10 +#define ATC2603C_PMU_DC1_CTL0 0x11 +#define ATC2603C_PMU_DC1_CTL1 0x12 // Undocumented +#define ATC2603C_PMU_DC1_CTL2 0x13 // Undocumented +#define ATC2603C_PMU_DC2_CTL0 0x14 +#define ATC2603C_PMU_DC2_CTL1 0x15 // Undocumented +#define ATC2603C_PMU_DC2_CTL2 0x16 // Undocumented +#define ATC2603C_PMU_DC3_CTL0 0x17 +#define ATC2603C_PMU_DC3_CTL1 0x18 // Undocumented +#define ATC2603C_PMU_DC3_CTL2 0x19 // Undocumented +#define ATC2603C_PMU_DC4_CTL0 0x1A // Undocumented +#define ATC2603C_PMU_DC4_CTL1 0x1B // Undocumented +#define ATC2603C_PMU_DC5_CTL0 0x1C // Undocumented +#define ATC2603C_PMU_DC5_CTL1 0x1D // Undocumented +#define ATC2603C_PMU_LDO1_CTL 0x1E +#define ATC2603C_PMU_LDO2_CTL 0x1F +#define ATC2603C_PMU_LDO3_CTL 0x20 +#define ATC2603C_PMU_LDO4_CTL 0x21 // Undocumented +#define ATC2603C_PMU_LDO5_CTL 0x22 +#define ATC2603C_PMU_LDO6_CTL 0x23 +#define ATC2603C_PMU_LDO7_CTL 0x24 +#define ATC2603C_PMU_LDO8_CTL 0x25 // Undocumented +#define ATC2603C_PMU_LDO9_CTL 0x26 // Undocumented +#define ATC2603C_PMU_LDO10_CTL 0x27 // Undocumented +#define ATC2603C_PMU_LDO11_CTL 0x28 +#define ATC2603C_PMU_SWITCH_CTL 0x29 +#define ATC2603C_PMU_OV_CTL0 0x2A +#define ATC2603C_PMU_OV_CTL1 0x2B +#define ATC2603C_PMU_OV_STATUS 0x2C +#define ATC2603C_PMU_OV_EN 0x2D +#define ATC2603C_PMU_OV_INT_EN 0x2E +#define ATC2603C_PMU_OC_CTL 0x2F +#define ATC2603C_PMU_OC_STATUS 0x30 +#define ATC2603C_PMU_OC_EN 0x31 +#define ATC2603C_PMU_OC_INT_EN 0x32 +#define ATC2603C_PMU_UV_CTL0 0x33 +#define ATC2603C_PMU_UV_CTL1 0x34 +#define ATC2603C_PMU_UV_STATUS 0x35 +#define ATC2603C_PMU_UV_EN 0x36 +#define ATC2603C_PMU_UV_INT_EN 0x37 +#define ATC2603C_PMU_OT_CTL 0x38 +#define ATC2603C_PMU_CHARGER_CTL0 0x39 +#define ATC2603C_PMU_CHARGER_CTL1 0x3A +#define ATC2603C_PMU_CHARGER_CTL2 0x3B +#define ATC2603C_PMU_BAKCHARGER_CTL 0x3C // Undocumented +#define ATC2603C_PMU_APDS_CTL 0x3D +#define ATC2603C_PMU_AUXADC_CTL0 0x3E +#define ATC2603C_PMU_AUXADC_CTL1 0x3F +#define ATC2603C_PMU_BATVADC 0x40 +#define ATC2603C_PMU_BATIADC 0x41 +#define ATC2603C_PMU_WALLVADC 0x42 +#define ATC2603C_PMU_WALLIADC 0x43 +#define ATC2603C_PMU_VBUSVADC 0x44 +#define ATC2603C_PMU_VBUSIADC 0x45 +#define ATC2603C_PMU_SYSPWRADC 0x46 +#define ATC2603C_PMU_REMCONADC 0x47 +#define ATC2603C_PMU_SVCCADC 0x48 +#define ATC2603C_PMU_CHGIADC 0x49 +#define ATC2603C_PMU_IREFADC 0x4A +#define ATC2603C_PMU_BAKBATADC 0x4B +#define ATC2603C_PMU_ICTEMPADC 0x4C +#define ATC2603C_PMU_AUXADC0 0x4D +#define ATC2603C_PMU_AUXADC1 0x4E +#define ATC2603C_PMU_AUXADC2 0x4F +#define ATC2603C_PMU_ICMADC 0x50 +#define ATC2603C_PMU_BDG_CTL 0x51 // Undocumented +#define ATC2603C_RTC_CTL 0x52 +#define ATC2603C_RTC_MSALM 0x53 +#define ATC2603C_RTC_HALM 0x54 +#define ATC2603C_RTC_YMDALM 0x55 +#define ATC2603C_RTC_MS 0x56 +#define ATC2603C_RTC_H 0x57 +#define ATC2603C_RTC_DC 0x58 +#define ATC2603C_RTC_YMD 0x59 +#define ATC2603C_EFUSE_DAT 0x5A // Undocumented +#define ATC2603C_EFUSECRTL1 0x5B // Undocumented +#define ATC2603C_EFUSECRTL2 0x5C // Undocumented +#define ATC2603C_PMU_FW_USE0 0x5D // Undocumented +#define ATC2603C_PMU_FW_USE1 0x5E // Undocumented +#define ATC2603C_PMU_FW_USE2 0x5F // Undocumented +#define ATC2603C_PMU_FW_USE3 0x60 // Undocumented +#define ATC2603C_PMU_FW_USE4 0x61 // Undocumented +#define ATC2603C_PMU_ABNORMAL_STATUS 0x62 +#define ATC2603C_PMU_WALL_APDS_CTL 0x63 +#define ATC2603C_PMU_REMCON_CTL0 0x64 +#define ATC2603C_PMU_REMCON_CTL1 0x65 +#define ATC2603C_PMU_MUX_CTL0 0x66 +#define ATC2603C_PMU_SGPIO_CTL0 0x67 +#define ATC2603C_PMU_SGPIO_CTL1 0x68 +#define ATC2603C_PMU_SGPIO_CTL2 0x69 +#define ATC2603C_PMU_SGPIO_CTL3 0x6A +#define ATC2603C_PMU_SGPIO_CTL4 0x6B +#define ATC2603C_PWMCLK_CTL 0x6C +#define ATC2603C_PWM0_CTL 0x6D +#define ATC2603C_PWM1_CTL 0x6E +#define ATC2603C_PMU_ADC_DBG0 0x70 +#define ATC2603C_PMU_ADC_DBG1 0x71 +#define ATC2603C_PMU_ADC_DBG2 0x72 +#define ATC2603C_PMU_ADC_DBG3 0x73 +#define ATC2603C_PMU_ADC_DBG4 0x74 +#define ATC2603C_IRC_CTL 0x80 +#define ATC2603C_IRC_STAT 0x81 +#define ATC2603C_IRC_CC 0x82 +#define ATC2603C_IRC_KDC 0x83 +#define ATC2603C_IRC_WK 0x84 +#define ATC2603C_IRC_RCC 0x85 +#define ATC2603C_IRC_FILTER 0x86 + +/* AUDIO_OUT Registers */ +#define ATC2603C_AUDIOINOUT_CTL 0xA0 +#define ATC2603C_AUDIO_DEBUGOUTCTL 0xA1 +#define ATC2603C_DAC_DIGITALCTL 0xA2 +#define ATC2603C_DAC_VOLUMECTL0 0xA3 +#define ATC2603C_DAC_ANALOG0 0xA4 +#define ATC2603C_DAC_ANALOG1 0xA5 +#define ATC2603C_DAC_ANALOG2 0xA6 +#define ATC2603C_DAC_ANALOG3 0xA7 + +/* AUDIO_IN Registers */ +#define ATC2603C_ADC_DIGITALCTL 0xA8 +#define ATC2603C_ADC_HPFCTL 0xA9 +#define ATC2603C_ADC_CTL 0xAA +#define ATC2603C_AGC_CTL0 0xAB +#define ATC2603C_AGC_CTL1 0xAC // Undocumented +#define ATC2603C_AGC_CTL2 0xAD +#define ATC2603C_ADC_ANALOG0 0xAE +#define ATC2603C_ADC_ANALOG1 0xAF + +/* PCM_IF Registers */ +#define ATC2603C_PCM0_CTL 0xB0 // Undocumented +#define ATC2603C_PCM1_CTL 0xB1 // Undocumented +#define ATC2603C_PCM2_CTL 0xB2 // Undocumented +#define ATC2603C_PCMIF_CTL 0xB3 // Undocumented + +/* CMU_CONTROL Registers */ +#define ATC2603C_CMU_DEVRST 0xC1 // Undocumented + +/* INTS Registers */ +#define ATC2603C_INTS_PD 0xC8 +#define ATC2603C_INTS_MSK 0xC9 + +/* MFP Registers */ +#define ATC2603C_MFP_CTL 0xD0 +#define ATC2603C_PAD_VSEL 0xD1 // Undocumented +#define ATC2603C_GPIO_OUTEN 0xD2 +#define ATC2603C_GPIO_INEN 0xD3 +#define ATC2603C_GPIO_DAT 0xD4 +#define ATC2603C_PAD_DRV 0xD5 +#define ATC2603C_PAD_EN 0xD6 +#define ATC2603C_DEBUG_SEL 0xD7 // Undocumented +#define ATC2603C_DEBUG_IE 0xD8 // Undocumented +#define ATC2603C_DEBUG_OE 0xD9 // Undocumented +#define ATC2603C_BIST_START 0x0A // Undocumented +#define ATC2603C_BIST_RESULT 0x0B // Undocumented +#define ATC2603C_CHIP_VER 0xDC + +/* TWSI Registers */ +#define ATC2603C_SADDR 0xFF + +/* PMU_SYS_CTL0 Register Mask Bits */ +#define ATC2603C_PMU_SYS_CTL0_IR_WK_EN BIT(5) +#define ATC2603C_PMU_SYS_CTL0_RESET_WK_EN BIT(6) +#define ATC2603C_PMU_SYS_CTL0_HDSW_WK_EN BIT(7) +#define ATC2603C_PMU_SYS_CTL0_ALARM_WK_EN BIT(8) +#define ATC2603C_PMU_SYS_CTL0_REM_CON_WK_EN BIT(9) +#define ATC2603C_PMU_SYS_CTL0_RESTART_EN BIT(10) +#define ATC2603C_PMU_SYS_CTL0_SGPIOIRQ_WK_EN BIT(11) +#define ATC2603C_PMU_SYS_CTL0_ONOFF_SHORT_WK_EN BIT(12) +#define ATC2603C_PMU_SYS_CTL0_ONOFF_LONG_WK_EN BIT(13) +#define ATC2603C_PMU_SYS_CTL0_WALL_WK_EN BIT(14) +#define ATC2603C_PMU_SYS_CTL0_USB_WK_EN BIT(15) +#define ATC2603C_PMU_SYS_CTL0_WK_ALL (GENMASK(15, 5) & (~BIT(10))) + +/* PMU_SYS_CTL1 Register Mask Bits */ +#define ATC2603C_PMU_SYS_CTL1_EN_S1 BIT(0) +#define ATC2603C_PMU_SYS_CTL1_LB_S4_EN BIT(2) +#define ATC2603C_PMU_SYS_CTL1_LB_S4 GENMASK(4, 3) +#define ATC2603C_PMU_SYS_CTL1_LB_S4_3_1V BIT(4) +#define ATC2603C_PMU_SYS_CTL1_IR_WK_FLAG BIT(5) +#define ATC2603C_PMU_SYS_CTL1_RESET_WK_FLAG BIT(6) +#define ATC2603C_PMU_SYS_CTL1_HDSW_WK_FLAG BIT(7) +#define ATC2603C_PMU_SYS_CTL1_ALARM_WK_FLAG BIT(8) +#define ATC2603C_PMU_SYS_CTL1_REM_CON_WK_FLAG BIT(9) +#define ATC2603C_PMU_SYS_CTL1_ONOFF_PRESS_RESET_IRQ_PD BIT(10) +#define ATC2603C_PMU_SYS_CTL1_SGPIOIRQ_WK_FLAG BIT(11) +#define ATC2603C_PMU_SYS_CTL1_ONOFF_SHORT_WK_FLAG BIT(12) +#define ATC2603C_PMU_SYS_CTL1_ONOFF_LONG_WK_FLAG BIT(13) +#define ATC2603C_PMU_SYS_CTL1_WALL_WK_FLAG BIT(14) +#define ATC2603C_PMU_SYS_CTL1_USB_WK_FLAG BIT(15) + +/* PMU_SYS_CTL2 Register Mask Bits */ +#define ATC2603C_PMU_SYS_CTL2_PMU_A_EN BIT(0) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_INT_EN BIT(1) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_PD BIT(2) +#define ATC2603C_PMU_SYS_CTL2_S2TIMER GENMASK(5, 3) +#define ATC2603C_PMU_SYS_CTL2_S2_TIMER_EN BIT(6) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL GENMASK(8, 7) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_RESET_EN BIT(9) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_TIME GENMASK(11, 10) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_INT_EN BIT(12) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_LONG_PRESS BIT(13) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_SHORT_PRESS BIT(14) +#define ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS BIT(15) + +/* PMU_SYS_CTL3 Register Mask Bits */ +#define ATC2603C_PMU_SYS_CTL3_S2S3TOS1_TIMER GENMASK(8, 7) +#define ATC2603C_PMU_SYS_CTL3_S2S3TOS1_TIMER_EN BIT(9) +#define ATC2603C_PMU_SYS_CTL3_S3_TIMER GENMASK(12, 10) +#define ATC2603C_PMU_SYS_CTL3_S3_TIMER_EN BIT(13) +#define ATC2603C_PMU_SYS_CTL3_EN_S3 BIT(14) +#define ATC2603C_PMU_SYS_CTL3_EN_S2 BIT(15) + +/* PMU_SYS_CTL5 Register Mask Bits */ +#define ATC2603C_PMU_SYS_CTL5_WALLWKDTEN BIT(7) +#define ATC2603C_PMU_SYS_CTL5_VBUSWKDTEN BIT(8) +#define ATC2603C_PMU_SYS_CTL5_REMCON_DECT_EN BIT(9) +#define ATC2603C_PMU_SYS_CTL5_ONOFF_8S_SEL BIT(10) + +/* INTS_MSK Register Mask Bits */ +#define ATC2603C_INTS_MSK_AUDIO BIT(0) +#define ATC2603C_INTS_MSK_OV BIT(1) +#define ATC2603C_INTS_MSK_OC BIT(2) +#define ATC2603C_INTS_MSK_OT BIT(3) +#define ATC2603C_INTS_MSK_UV BIT(4) +#define ATC2603C_INTS_MSK_ALARM BIT(5) +#define ATC2603C_INTS_MSK_ONOFF BIT(6) +#define ATC2603C_INTS_MSK_SGPIO BIT(7) +#define ATC2603C_INTS_MSK_IR BIT(8) +#define ATC2603C_INTS_MSK_REMCON BIT(9) +#define ATC2603C_INTS_MSK_POWERIN BIT(10) + +/* CMU_DEVRST Register Mask Bits */ +#define ATC2603C_CMU_DEVRST_MFP BIT(1) +#define ATC2603C_CMU_DEVRST_INTS BIT(2) +#define ATC2603C_CMU_DEVRST_AUDIO BIT(4) + +/* PAD_EN Register Mask Bits */ +#define ATC2603C_PAD_EN_EXTIRQ BIT(0) + +#endif /* __LINUX_MFD_ATC260X_ATC2603C_H */ diff --git a/include/linux/mfd/atc260x/atc2609a.h b/include/linux/mfd/atc260x/atc2609a.h new file mode 100644 index 000000000000..b957d7bd73e9 --- /dev/null +++ b/include/linux/mfd/atc260x/atc2609a.h @@ -0,0 +1,308 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * ATC2609A PMIC register definitions + * + * Copyright (C) 2019 Manivannan Sadhasivam + */ + +#ifndef __LINUX_MFD_ATC260X_ATC2609A_H +#define __LINUX_MFD_ATC260X_ATC2609A_H + +enum atc2609a_irq_def { + ATC2609A_IRQ_AUDIO = 0, + ATC2609A_IRQ_OV, + ATC2609A_IRQ_OC, + ATC2609A_IRQ_OT, + ATC2609A_IRQ_UV, + ATC2609A_IRQ_ALARM, + ATC2609A_IRQ_ONOFF, + ATC2609A_IRQ_WKUP, + ATC2609A_IRQ_IR, + ATC2609A_IRQ_REMCON, + ATC2609A_IRQ_POWER_IN, +}; + +/* PMU Registers */ +#define ATC2609A_PMU_SYS_CTL0 0x00 +#define ATC2609A_PMU_SYS_CTL1 0x01 +#define ATC2609A_PMU_SYS_CTL2 0x02 +#define ATC2609A_PMU_SYS_CTL3 0x03 +#define ATC2609A_PMU_SYS_CTL4 0x04 +#define ATC2609A_PMU_SYS_CTL5 0x05 +#define ATC2609A_PMU_SYS_CTL6 0x06 +#define ATC2609A_PMU_SYS_CTL7 0x07 +#define ATC2609A_PMU_SYS_CTL8 0x08 +#define ATC2609A_PMU_SYS_CTL9 0x09 +#define ATC2609A_PMU_BAT_CTL0 0x0A +#define ATC2609A_PMU_BAT_CTL1 0x0B +#define ATC2609A_PMU_VBUS_CTL0 0x0C +#define ATC2609A_PMU_VBUS_CTL1 0x0D +#define ATC2609A_PMU_WALL_CTL0 0x0E +#define ATC2609A_PMU_WALL_CTL1 0x0F +#define ATC2609A_PMU_SYS_PENDING 0x10 +#define ATC2609A_PMU_APDS_CTL0 0x11 +#define ATC2609A_PMU_APDS_CTL1 0x12 +#define ATC2609A_PMU_APDS_CTL2 0x13 +#define ATC2609A_PMU_CHARGER_CTL 0x14 +#define ATC2609A_PMU_BAKCHARGER_CTL 0x15 +#define ATC2609A_PMU_SWCHG_CTL0 0x16 +#define ATC2609A_PMU_SWCHG_CTL1 0x17 +#define ATC2609A_PMU_SWCHG_CTL2 0x18 +#define ATC2609A_PMU_SWCHG_CTL3 0x19 +#define ATC2609A_PMU_SWCHG_CTL4 0x1A +#define ATC2609A_PMU_DC_OSC 0x1B +#define ATC2609A_PMU_DC0_CTL0 0x1C +#define ATC2609A_PMU_DC0_CTL1 0x1D +#define ATC2609A_PMU_DC0_CTL2 0x1E +#define ATC2609A_PMU_DC0_CTL3 0x1F +#define ATC2609A_PMU_DC0_CTL4 0x20 +#define ATC2609A_PMU_DC0_CTL5 0x21 +#define ATC2609A_PMU_DC0_CTL6 0x22 +#define ATC2609A_PMU_DC1_CTL0 0x23 +#define ATC2609A_PMU_DC1_CTL1 0x24 +#define ATC2609A_PMU_DC1_CTL2 0x25 +#define ATC2609A_PMU_DC1_CTL3 0x26 +#define ATC2609A_PMU_DC1_CTL4 0x27 +#define ATC2609A_PMU_DC1_CTL5 0x28 +#define ATC2609A_PMU_DC1_CTL6 0x29 +#define ATC2609A_PMU_DC2_CTL0 0x2A +#define ATC2609A_PMU_DC2_CTL1 0x2B +#define ATC2609A_PMU_DC2_CTL2 0x2C +#define ATC2609A_PMU_DC2_CTL3 0x2D +#define ATC2609A_PMU_DC2_CTL4 0x2E +#define ATC2609A_PMU_DC2_CTL5 0x2F +#define ATC2609A_PMU_DC2_CTL6 0x30 +#define ATC2609A_PMU_DC3_CTL0 0x31 +#define ATC2609A_PMU_DC3_CTL1 0x32 +#define ATC2609A_PMU_DC3_CTL2 0x33 +#define ATC2609A_PMU_DC3_CTL3 0x34 +#define ATC2609A_PMU_DC3_CTL4 0x35 +#define ATC2609A_PMU_DC3_CTL5 0x36 +#define ATC2609A_PMU_DC3_CTL6 0x37 +#define ATC2609A_PMU_DC_ZR 0x38 +#define ATC2609A_PMU_LDO0_CTL0 0x39 +#define ATC2609A_PMU_LDO0_CTL1 0x3A +#define ATC2609A_PMU_LDO1_CTL0 0x3B +#define ATC2609A_PMU_LDO1_CTL1 0x3C +#define ATC2609A_PMU_LDO2_CTL0 0x3D +#define ATC2609A_PMU_LDO2_CTL1 0x3E +#define ATC2609A_PMU_LDO3_CTL0 0x3F +#define ATC2609A_PMU_LDO3_CTL1 0x40 +#define ATC2609A_PMU_LDO4_CTL0 0x41 +#define ATC2609A_PMU_LDO4_CTL1 0x42 +#define ATC2609A_PMU_LDO5_CTL0 0x43 +#define ATC2609A_PMU_LDO5_CTL1 0x44 +#define ATC2609A_PMU_LDO6_CTL0 0x45 +#define ATC2609A_PMU_LDO6_CTL1 0x46 +#define ATC2609A_PMU_LDO7_CTL0 0x47 +#define ATC2609A_PMU_LDO7_CTL1 0x48 +#define ATC2609A_PMU_LDO8_CTL0 0x49 +#define ATC2609A_PMU_LDO8_CTL1 0x4A +#define ATC2609A_PMU_LDO9_CTL 0x4B +#define ATC2609A_PMU_OV_INT_EN 0x4C +#define ATC2609A_PMU_OV_STATUS 0x4D +#define ATC2609A_PMU_UV_INT_EN 0x4E +#define ATC2609A_PMU_UV_STATUS 0x4F +#define ATC2609A_PMU_OC_INT_EN 0x50 +#define ATC2609A_PMU_OC_STATUS 0x51 +#define ATC2609A_PMU_OT_CTL 0x52 +#define ATC2609A_PMU_CM_CTL0 0x53 +#define ATC2609A_PMU_FW_USE0 0x54 +#define ATC2609A_PMU_FW_USE1 0x55 +#define ATC2609A_PMU_ADC12B_I 0x56 +#define ATC2609A_PMU_ADC12B_V 0x57 +#define ATC2609A_PMU_ADC12B_DUMMY 0x58 +#define ATC2609A_PMU_AUXADC_CTL0 0x59 +#define ATC2609A_PMU_AUXADC_CTL1 0x5A +#define ATC2609A_PMU_BATVADC 0x5B +#define ATC2609A_PMU_BATIADC 0x5C +#define ATC2609A_PMU_WALLVADC 0x5D +#define ATC2609A_PMU_WALLIADC 0x5E +#define ATC2609A_PMU_VBUSVADC 0x5F +#define ATC2609A_PMU_VBUSIADC 0x60 +#define ATC2609A_PMU_SYSPWRADC 0x61 +#define ATC2609A_PMU_REMCONADC 0x62 +#define ATC2609A_PMU_SVCCADC 0x63 +#define ATC2609A_PMU_CHGIADC 0x64 +#define ATC2609A_PMU_IREFADC 0x65 +#define ATC2609A_PMU_BAKBATADC 0x66 +#define ATC2609A_PMU_ICTEMPADC 0x67 +#define ATC2609A_PMU_AUXADC0 0x68 +#define ATC2609A_PMU_AUXADC1 0x69 +#define ATC2609A_PMU_AUXADC2 0x6A +#define ATC2609A_PMU_AUXADC3 0x6B +#define ATC2609A_PMU_ICTEMPADC_ADJ 0x6C +#define ATC2609A_PMU_BDG_CTL 0x6D +#define ATC2609A_RTC_CTL 0x6E +#define ATC2609A_RTC_MSALM 0x6F +#define ATC2609A_RTC_HALM 0x70 +#define ATC2609A_RTC_YMDALM 0x71 +#define ATC2609A_RTC_MS 0x72 +#define ATC2609A_RTC_H 0x73 +#define ATC2609A_RTC_DC 0x74 +#define ATC2609A_RTC_YMD 0x75 +#define ATC2609A_EFUSE_DAT 0x76 +#define ATC2609A_EFUSECRTL1 0x77 +#define ATC2609A_EFUSECRTL2 0x78 +#define ATC2609A_PMU_DC4_CTL0 0x79 +#define ATC2609A_PMU_DC4_CTL1 0x7A +#define ATC2609A_PMU_DC4_CTL2 0x7B +#define ATC2609A_PMU_DC4_CTL3 0x7C +#define ATC2609A_PMU_DC4_CTL4 0x7D +#define ATC2609A_PMU_DC4_CTL5 0x7E +#define ATC2609A_PMU_DC4_CTL6 0x7F +#define ATC2609A_PMU_PWR_STATUS 0x80 +#define ATC2609A_PMU_S2_PWR 0x81 +#define ATC2609A_CLMT_CTL0 0x82 +#define ATC2609A_CLMT_DATA0 0x83 +#define ATC2609A_CLMT_DATA1 0x84 +#define ATC2609A_CLMT_DATA2 0x85 +#define ATC2609A_CLMT_DATA3 0x86 +#define ATC2609A_CLMT_ADD0 0x87 +#define ATC2609A_CLMT_ADD1 0x88 +#define ATC2609A_CLMT_OCV_TABLE 0x89 +#define ATC2609A_CLMT_R_TABLE 0x8A +#define ATC2609A_PMU_PWRON_CTL0 0x8D +#define ATC2609A_PMU_PWRON_CTL1 0x8E +#define ATC2609A_PMU_PWRON_CTL2 0x8F +#define ATC2609A_IRC_CTL 0x90 +#define ATC2609A_IRC_STAT 0x91 +#define ATC2609A_IRC_CC 0x92 +#define ATC2609A_IRC_KDC 0x93 +#define ATC2609A_IRC_WK 0x94 +#define ATC2609A_IRC_RCC 0x95 + +/* AUDIO_OUT Registers */ +#define ATC2609A_AUDIOINOUT_CTL 0xA0 +#define ATC2609A_AUDIO_DEBUGOUTCTL 0xA1 +#define ATC2609A_DAC_DIGITALCTL 0xA2 +#define ATC2609A_DAC_VOLUMECTL0 0xA3 +#define ATC2609A_DAC_ANALOG0 0xA4 +#define ATC2609A_DAC_ANALOG1 0xA5 +#define ATC2609A_DAC_ANALOG2 0xA6 +#define ATC2609A_DAC_ANALOG3 0xA7 + +/* AUDIO_IN Registers */ +#define ATC2609A_ADC_DIGITALCTL 0xA8 +#define ATC2609A_ADC_HPFCTL 0xA9 +#define ATC2609A_ADC_CTL 0xAA +#define ATC2609A_AGC_CTL0 0xAB +#define ATC2609A_AGC_CTL1 0xAC +#define ATC2609A_AGC_CTL2 0xAD +#define ATC2609A_ADC_ANALOG0 0xAE +#define ATC2609A_ADC_ANALOG1 0xAF + +/* PCM_IF Registers */ +#define ATC2609A_PCM0_CTL 0xB0 +#define ATC2609A_PCM1_CTL 0xB1 +#define ATC2609A_PCM2_CTL 0xB2 +#define ATC2609A_PCMIF_CTL 0xB3 + +/* CMU_CONTROL Registers */ +#define ATC2609A_CMU_DEVRST 0xC1 + +/* INTS Registers */ +#define ATC2609A_INTS_PD 0xC8 +#define ATC2609A_INTS_MSK 0xC9 + +/* MFP Registers */ +#define ATC2609A_MFP_CTL 0xD0 +#define ATC2609A_PAD_VSEL 0xD1 +#define ATC2609A_GPIO_OUTEN 0xD2 +#define ATC2609A_GPIO_INEN 0xD3 +#define ATC2609A_GPIO_DAT 0xD4 +#define ATC2609A_PAD_DRV 0xD5 +#define ATC2609A_PAD_EN 0xD6 +#define ATC2609A_DEBUG_SEL 0xD7 +#define ATC2609A_DEBUG_IE 0xD8 +#define ATC2609A_DEBUG_OE 0xD9 +#define ATC2609A_CHIP_VER 0xDC + +/* PWSI Registers */ +#define ATC2609A_PWSI_CTL 0xF0 +#define ATC2609A_PWSI_STATUS 0xF1 + +/* TWSI Registers */ +#define ATC2609A_SADDR 0xFF + +/* PMU_SYS_CTL0 Register Mask Bits */ +#define ATC2609A_PMU_SYS_CTL0_IR_WK_EN BIT(5) +#define ATC2609A_PMU_SYS_CTL0_RESET_WK_EN BIT(6) +#define ATC2609A_PMU_SYS_CTL0_HDSW_WK_EN BIT(7) +#define ATC2609A_PMU_SYS_CTL0_ALARM_WK_EN BIT(8) +#define ATC2609A_PMU_SYS_CTL0_REM_CON_WK_EN BIT(9) +#define ATC2609A_PMU_SYS_CTL0_RESTART_EN BIT(10) +#define ATC2609A_PMU_SYS_CTL0_WKIRQ_WK_EN BIT(11) +#define ATC2609A_PMU_SYS_CTL0_ONOFF_SHORT_WK_EN BIT(12) +#define ATC2609A_PMU_SYS_CTL0_ONOFF_LONG_WK_EN BIT(13) +#define ATC2609A_PMU_SYS_CTL0_WALL_WK_EN BIT(14) +#define ATC2609A_PMU_SYS_CTL0_USB_WK_EN BIT(15) +#define ATC2609A_PMU_SYS_CTL0_WK_ALL (GENMASK(15, 5) & (~BIT(10))) + +/* PMU_SYS_CTL1 Register Mask Bits */ +#define ATC2609A_PMU_SYS_CTL1_EN_S1 BIT(0) +#define ATC2609A_PMU_SYS_CTL1_LB_S4_EN BIT(2) +#define ATC2609A_PMU_SYS_CTL1_LB_S4 GENMASK(4, 3) +#define ATC2609A_PMU_SYS_CTL1_LB_S4_3_1V BIT(4) +#define ATC2609A_PMU_SYS_CTL1_IR_WK_FLAG BIT(5) +#define ATC2609A_PMU_SYS_CTL1_RESET_WK_FLAG BIT(6) +#define ATC2609A_PMU_SYS_CTL1_HDSW_WK_FLAG BIT(7) +#define ATC2609A_PMU_SYS_CTL1_ALARM_WK_FLAG BIT(8) +#define ATC2609A_PMU_SYS_CTL1_REM_CON_WK_FLAG BIT(9) +#define ATC2609A_PMU_SYS_CTL1_RESTART_WK_FLAG BIT(10) +#define ATC2609A_PMU_SYS_CTL1_WKIRQ_WK_FLAG BIT(11) +#define ATC2609A_PMU_SYS_CTL1_ONOFF_SHORT_WK_FLAG BIT(12) +#define ATC2609A_PMU_SYS_CTL1_ONOFF_LONG_WK_FLAG BIT(13) +#define ATC2609A_PMU_SYS_CTL1_WALL_WK_FLAG BIT(14) +#define ATC2609A_PMU_SYS_CTL1_USB_WK_FLAG BIT(15) + +/* PMU_SYS_CTL2 Register Mask Bits */ +#define ATC2609A_PMU_SYS_CTL2_PMU_A_EN BIT(0) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_INT_EN BIT(1) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_PD BIT(2) +#define ATC2609A_PMU_SYS_CTL2_S2TIMER GENMASK(5, 3) +#define ATC2609A_PMU_SYS_CTL2_S2_TIMER_EN BIT(6) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL GENMASK(8, 7) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_EN BIT(9) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_TIME GENMASK(11, 10) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_LSP_INT_EN BIT(12) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_LONG_PRESS BIT(13) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_SHORT_PRESS BIT(14) +#define ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS BIT(15) + +/* PMU_SYS_CTL3 Register Mask Bits */ +#define ATC2609A_PMU_SYS_CTL3_S2S3TOS1_TIMER GENMASK(8, 7) +#define ATC2609A_PMU_SYS_CTL3_S2S3TOS1_TIMER_EN BIT(9) +#define ATC2609A_PMU_SYS_CTL3_S3_TIMER GENMASK(12, 10) +#define ATC2609A_PMU_SYS_CTL3_S3_TIMER_EN BIT(13) +#define ATC2609A_PMU_SYS_CTL3_EN_S3 BIT(14) +#define ATC2609A_PMU_SYS_CTL3_EN_S2 BIT(15) + +/* PMU_SYS_CTL5 Register Mask Bits */ +#define ATC2609A_PMU_SYS_CTL5_WALLWKDTEN BIT(7) +#define ATC2609A_PMU_SYS_CTL5_VBUSWKDTEN BIT(8) +#define ATC2609A_PMU_SYS_CTL5_REMCON_DECT_EN BIT(9) +#define ATC2609A_PMU_SYS_CTL5_ONOFF_8S_SEL BIT(10) + +/* INTS_MSK Register Mask Bits */ +#define ATC2609A_INTS_MSK_AUDIO BIT(0) +#define ATC2609A_INTS_MSK_OV BIT(1) +#define ATC2609A_INTS_MSK_OC BIT(2) +#define ATC2609A_INTS_MSK_OT BIT(3) +#define ATC2609A_INTS_MSK_UV BIT(4) +#define ATC2609A_INTS_MSK_ALARM BIT(5) +#define ATC2609A_INTS_MSK_ONOFF BIT(6) +#define ATC2609A_INTS_MSK_WKUP BIT(7) +#define ATC2609A_INTS_MSK_IR BIT(8) +#define ATC2609A_INTS_MSK_REMCON BIT(9) +#define ATC2609A_INTS_MSK_POWERIN BIT(10) + +/* CMU_DEVRST Register Mask Bits */ +#define ATC2609A_CMU_DEVRST_AUDIO BIT(0) +#define ATC2609A_CMU_DEVRST_MFP BIT(1) +#define ATC2609A_CMU_DEVRST_INTS BIT(2) + +/* PAD_EN Register Mask Bits */ +#define ATC2609A_PAD_EN_EXTIRQ BIT(0) + +#endif /* __LINUX_MFD_ATC260X_ATC2609A_H */ diff --git a/include/linux/mfd/atc260x/core.h b/include/linux/mfd/atc260x/core.h new file mode 100644 index 000000000000..777b6c345d44 --- /dev/null +++ b/include/linux/mfd/atc260x/core.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Core MFD defines for ATC260x PMICs + * + * Copyright (C) 2019 Manivannan Sadhasivam + * Copyright (C) 2020 Cristian Ciocaltea + */ + +#ifndef __LINUX_MFD_ATC260X_CORE_H +#define __LINUX_MFD_ATC260X_CORE_H + +#include +#include + +enum atc260x_type { + ATC2603A = 0, + ATC2603C, + ATC2609A, +}; + +enum atc260x_ver { + ATC260X_A = 0, + ATC260X_B, + ATC260X_C, + ATC260X_D, + ATC260X_E, + ATC260X_F, + ATC260X_G, + ATC260X_H, +}; + +struct atc260x { + struct device *dev; + + struct regmap *regmap; + const struct regmap_irq_chip *regmap_irq_chip; + struct regmap_irq_chip_data *irq_data; + + struct mutex *regmap_mutex; /* mutex for custom regmap locking */ + + const struct mfd_cell *cells; + int nr_cells; + int irq; + + enum atc260x_type ic_type; + enum atc260x_ver ic_ver; + const char *type_name; + unsigned int rev_reg; + + const struct atc260x_init_regs *init_regs; /* regs for device init */ +}; + +struct regmap_config; + +int atc260x_match_device(struct atc260x *atc260x, struct regmap_config *regmap_cfg); +int atc260x_device_probe(struct atc260x *atc260x); + +#endif /* __LINUX_MFD_ATC260X_CORE_H */ From patchwork Tue Jan 26 09:56:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 371918 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E76FC433DB for ; Tue, 26 Jan 2021 09:58:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DF59D2255F for ; Tue, 26 Jan 2021 09:58:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391364AbhAZJ6f (ORCPT ); Tue, 26 Jan 2021 04:58:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391744AbhAZJ5Y (ORCPT ); Tue, 26 Jan 2021 04:57:24 -0500 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with 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bh=GySJjpfefsNkWLU93YJjB76kZdXclficIG0DNh+a2+c=; b=BVEJGf2p+nWkKWOrs6V0M4kQhzrcnGQjwFCMH3nUZZ5cyagl3PPWvrOrSf8jBk9zf5 0npkJPEKGg1ubIC+/kRzGRK/1u7m6D5sap0LsS/c21ykpqJFT1S4Ii1n8/eYh+D8bf3G 16Hn2rQKMBsL6dWOJQi603JmW+P3H4yBI/na4FIwbMfBkkpHV+AxDPavj5jWrHhkKC5Z EqCyn9OWTpwiT4zbLmI2+0bjryWkJqcK3k0cIj+pqHdu5sX6yEnu2Sz4Yiiu2pMHxCDI wSld+SA1UycZoEv38kwBiJJ9I4LnUQniSYGaPYDxmYVxCGF3YDi+YQgQuBnasiDjcn2X 69Vw== X-Gm-Message-State: AOAM531oFqohwuE6wJM4ytmEMPHriSLopboRXC1FpQjvMDVNYvDpuzGU 7/9IHnKw5h/SL/XOamQLVjM= X-Google-Smtp-Source: ABdhPJwHKIWhQdEvlneIggADSIxohq/qc6srqIyGBtQ9QW7CDygx+Yjire2ATNwmzJCt37rZDF14nQ== X-Received: by 2002:a05:6402:b07:: with SMTP id bm7mr4015392edb.104.1611654970520; Tue, 26 Jan 2021 01:56:10 -0800 (PST) Received: from localhost.localdomain ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id h12sm11648310edb.16.2021.01.26.01.56.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 01:56:09 -0800 (PST) From: Cristian Ciocaltea To: Lee Jones , Mark Brown , Rob Herring , Dmitry Torokhov , Sebastian Reichel Cc: Manivannan Sadhasivam , Liam Girdwood , =?utf-8?q?Andreas_F=C3=A4rber?= , Linus Walleij , linux-actions@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v7 4/5] input: atc260x: Add onkey driver for ATC260x PMICs Date: Tue, 26 Jan 2021 11:56:00 +0200 Message-Id: <36d74cbc50124541a234f835398d3f476e1f64a2.1611653995.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org The Actions Semi ATC260x PMICs are able to manage an onkey button. This driver exposes the ATC260x onkey as an input device. It can also be configured to force a system reset on a long key-press with an adjustable duration. The currently supported chip variants are ATC2603C and ATC2609A. Signed-off-by: Cristian Ciocaltea Acked-by: Dmitry Torokhov --- Changes in v7: - None Changes in v6: - None Changes in v5: - None Changes in v4: - Added Acked-by from Dmitry Changes in v3: - Integrated Dmitry's review: * Dropped the logic around the check for 'pdev->dev.of_node' * Renamed 'ret' variable in 'atc260x_onkey_probe()' to 'error' * Used 'dev_dbg' instead of 'dev_info' on status KEY_RESET_DISABLED * Dropped 'input_dev->evbit[0] = BIT_MASK(EV_KEY);' * Removed IRQF_TRIGGER_HIGH flag on 'devm_request_threaded_irq()' * Implemented open/close to mitigate the racing issue in 'atc260x_onkey_remove()' which has been dropped now - Removed the unnecessary driver compatibles - Used 'reset-time-sec' property of the parent device instead of 'actions,reset-time-sec' of now obsolete and removed 'onkey' DT node drivers/input/misc/Kconfig | 11 ++ drivers/input/misc/Makefile | 2 +- drivers/input/misc/atc260x-onkey.c | 305 +++++++++++++++++++++++++++++ 3 files changed, 317 insertions(+), 1 deletion(-) create mode 100644 drivers/input/misc/atc260x-onkey.c diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index ad1b6c90bc4d..7237dc440b98 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -94,6 +94,17 @@ config INPUT_ARIZONA_HAPTICS To compile this driver as a module, choose M here: the module will be called arizona-haptics. +config INPUT_ATC260X_ONKEY + tristate "Actions Semi ATC260x PMIC ONKEY" + depends on MFD_ATC260X + help + Support the ONKEY of ATC260x PMICs as an input device reporting + power button status. ONKEY can be used to wakeup from low power + modes and force a reset on long press. + + To compile this driver as a module, choose M here: the + module will be called atc260x-onkey. + config INPUT_ATMEL_CAPTOUCH tristate "Atmel Capacitive Touch Button Driver" depends on OF || COMPILE_TEST diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 7f202ba8f775..46db664a8bc4 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_INPUT_ADXL34X_SPI) += adxl34x-spi.o obj-$(CONFIG_INPUT_APANEL) += apanel.o obj-$(CONFIG_INPUT_ARIEL_PWRBUTTON) += ariel-pwrbutton.o obj-$(CONFIG_INPUT_ARIZONA_HAPTICS) += arizona-haptics.o +obj-$(CONFIG_INPUT_ATC260X_ONKEY) += atc260x-onkey.o obj-$(CONFIG_INPUT_ATI_REMOTE2) += ati_remote2.o obj-$(CONFIG_INPUT_ATLAS_BTNS) += atlas_btns.o obj-$(CONFIG_INPUT_ATMEL_CAPTOUCH) += atmel_captouch.o @@ -86,4 +87,3 @@ obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o obj-$(CONFIG_INPUT_XEN_KBDDEV_FRONTEND) += xen-kbdfront.o obj-$(CONFIG_INPUT_YEALINK) += yealink.o obj-$(CONFIG_INPUT_IDEAPAD_SLIDEBAR) += ideapad_slidebar.o - diff --git a/drivers/input/misc/atc260x-onkey.c b/drivers/input/misc/atc260x-onkey.c new file mode 100644 index 000000000000..999aabf9dcbd --- /dev/null +++ b/drivers/input/misc/atc260x-onkey.c @@ -0,0 +1,305 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Onkey driver for Actions Semi ATC260x PMICs. + * + * Copyright (c) 2020 Cristian Ciocaltea + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* <2s for short press, >2s for long press */ +#define KEY_PRESS_TIME_SEC 2 + +/* Driver internals */ +enum atc260x_onkey_reset_status { + KEY_RESET_HW_DEFAULT, + KEY_RESET_DISABLED, + KEY_RESET_USER_SEL, +}; + +struct atc260x_onkey_params { + u32 reg_int_ctl; + u32 kdwn_state_bm; + u32 long_int_pnd_bm; + u32 short_int_pnd_bm; + u32 kdwn_int_pnd_bm; + u32 press_int_en_bm; + u32 kdwn_int_en_bm; + u32 press_time_bm; + u32 reset_en_bm; + u32 reset_time_bm; +}; + +struct atc260x_onkey { + struct atc260x *atc260x; + const struct atc260x_onkey_params *params; + struct input_dev *input_dev; + struct delayed_work work; + int irq; +}; + +static const struct atc260x_onkey_params atc2603c_onkey_params = { + .reg_int_ctl = ATC2603C_PMU_SYS_CTL2, + .long_int_pnd_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_LONG_PRESS, + .short_int_pnd_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_SHORT_PRESS, + .kdwn_int_pnd_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_PD, + .press_int_en_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_INT_EN, + .kdwn_int_en_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_INT_EN, + .kdwn_state_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS, + .press_time_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_TIME, + .reset_en_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_RESET_EN, + .reset_time_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL, +}; + +static const struct atc260x_onkey_params atc2609a_onkey_params = { + .reg_int_ctl = ATC2609A_PMU_SYS_CTL2, + .long_int_pnd_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_LONG_PRESS, + .short_int_pnd_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_SHORT_PRESS, + .kdwn_int_pnd_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_PD, + .press_int_en_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_LSP_INT_EN, + .kdwn_int_en_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_INT_EN, + .kdwn_state_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS, + .press_time_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_TIME, + .reset_en_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_EN, + .reset_time_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL, +}; + +static int atc2603x_onkey_hw_init(struct atc260x_onkey *onkey, + enum atc260x_onkey_reset_status reset_status, + u32 reset_time, u32 press_time) +{ + u32 reg_bm, reg_val; + + reg_bm = onkey->params->long_int_pnd_bm | + onkey->params->short_int_pnd_bm | + onkey->params->kdwn_int_pnd_bm | + onkey->params->press_int_en_bm | + onkey->params->kdwn_int_en_bm; + + reg_val = reg_bm | press_time; + reg_bm |= onkey->params->press_time_bm; + + if (reset_status == KEY_RESET_DISABLED) { + reg_bm |= onkey->params->reset_en_bm; + } else if (reset_status == KEY_RESET_USER_SEL) { + reg_bm |= onkey->params->reset_en_bm | + onkey->params->reset_time_bm; + reg_val |= onkey->params->reset_en_bm | reset_time; + } + + return regmap_update_bits(onkey->atc260x->regmap, + onkey->params->reg_int_ctl, reg_bm, reg_val); +} + +static void atc260x_onkey_query(struct atc260x_onkey *onkey) +{ + u32 reg_bits; + int ret, key_down; + + ret = regmap_read(onkey->atc260x->regmap, + onkey->params->reg_int_ctl, &key_down); + if (ret) { + key_down = 1; + dev_err(onkey->atc260x->dev, + "Failed to read onkey status: %d\n", ret); + } else { + key_down &= onkey->params->kdwn_state_bm; + } + + /* + * The hardware generates interrupt only when the onkey pin is + * asserted. Hence, the deassertion of the pin is simulated through + * work queue. + */ + if (key_down) { + schedule_delayed_work(&onkey->work, msecs_to_jiffies(200)); + return; + } + + /* + * The key-down status bit is cleared when the On/Off button + * is released. + */ + input_report_key(onkey->input_dev, KEY_POWER, 0); + input_sync(onkey->input_dev); + + reg_bits = onkey->params->long_int_pnd_bm | + onkey->params->short_int_pnd_bm | + onkey->params->kdwn_int_pnd_bm | + onkey->params->press_int_en_bm | + onkey->params->kdwn_int_en_bm; + + /* Clear key press pending events and enable key press interrupts. */ + regmap_update_bits(onkey->atc260x->regmap, onkey->params->reg_int_ctl, + reg_bits, reg_bits); +} + +static void atc260x_onkey_work(struct work_struct *work) +{ + struct atc260x_onkey *onkey = container_of(work, struct atc260x_onkey, + work.work); + atc260x_onkey_query(onkey); +} + +static irqreturn_t atc260x_onkey_irq(int irq, void *data) +{ + struct atc260x_onkey *onkey = data; + int ret; + + /* Disable key press interrupts. */ + ret = regmap_update_bits(onkey->atc260x->regmap, + onkey->params->reg_int_ctl, + onkey->params->press_int_en_bm | + onkey->params->kdwn_int_en_bm, 0); + if (ret) + dev_err(onkey->atc260x->dev, + "Failed to disable interrupts: %d\n", ret); + + input_report_key(onkey->input_dev, KEY_POWER, 1); + input_sync(onkey->input_dev); + + atc260x_onkey_query(onkey); + + return IRQ_HANDLED; +} + +static int atc260x_onkey_open(struct input_dev *dev) +{ + struct atc260x_onkey *onkey = input_get_drvdata(dev); + + enable_irq(onkey->irq); + + return 0; +} + +static void atc260x_onkey_close(struct input_dev *dev) +{ + struct atc260x_onkey *onkey = input_get_drvdata(dev); + + disable_irq(onkey->irq); + cancel_delayed_work_sync(&onkey->work); +} + +static int atc260x_onkey_probe(struct platform_device *pdev) +{ + struct atc260x *atc260x = dev_get_drvdata(pdev->dev.parent); + struct atc260x_onkey *onkey; + struct input_dev *input_dev; + enum atc260x_onkey_reset_status reset_status; + u32 press_time = KEY_PRESS_TIME_SEC, reset_time = 0; + int val, error; + + onkey = devm_kzalloc(&pdev->dev, sizeof(*onkey), GFP_KERNEL); + if (!onkey) + return -ENOMEM; + + error = device_property_read_u32(pdev->dev.parent, + "reset-time-sec", &val); + if (error) { + reset_status = KEY_RESET_HW_DEFAULT; + } else if (val) { + if (val < 6 || val > 12) { + dev_err(&pdev->dev, "reset-time-sec out of range\n"); + return -EINVAL; + } + + reset_status = KEY_RESET_USER_SEL; + reset_time = (val - 6) / 2; + } else { + reset_status = KEY_RESET_DISABLED; + dev_dbg(&pdev->dev, "Disabled reset on long-press\n"); + } + + switch (atc260x->ic_type) { + case ATC2603C: + onkey->params = &atc2603c_onkey_params; + press_time = FIELD_PREP(ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_TIME, + press_time); + reset_time = FIELD_PREP(ATC2603C_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL, + reset_time); + break; + case ATC2609A: + onkey->params = &atc2609a_onkey_params; + press_time = FIELD_PREP(ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_TIME, + press_time); + reset_time = FIELD_PREP(ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL, + reset_time); + break; + default: + dev_err(&pdev->dev, + "OnKey not supported for ATC260x PMIC type: %u\n", + atc260x->ic_type); + return -EINVAL; + } + + input_dev = devm_input_allocate_device(&pdev->dev); + if (!input_dev) { + dev_err(&pdev->dev, "Failed to allocate input device\n"); + return -ENOMEM; + } + + onkey->input_dev = input_dev; + onkey->atc260x = atc260x; + + input_dev->name = "atc260x-onkey"; + input_dev->phys = "atc260x-onkey/input0"; + input_dev->open = atc260x_onkey_open; + input_dev->close = atc260x_onkey_close; + + input_set_capability(input_dev, EV_KEY, KEY_POWER); + input_set_drvdata(input_dev, onkey); + + INIT_DELAYED_WORK(&onkey->work, atc260x_onkey_work); + + onkey->irq = platform_get_irq(pdev, 0); + if (onkey->irq < 0) + return onkey->irq; + + error = devm_request_threaded_irq(&pdev->dev, onkey->irq, NULL, + atc260x_onkey_irq, IRQF_ONESHOT, + dev_name(&pdev->dev), onkey); + if (error) { + dev_err(&pdev->dev, + "Failed to register IRQ %d: %d\n", onkey->irq, error); + return error; + } + + /* Keep IRQ disabled until atc260x_onkey_open() is called. */ + disable_irq(onkey->irq); + + error = input_register_device(input_dev); + if (error) { + dev_err(&pdev->dev, + "Failed to register input device: %d\n", error); + return error; + } + + error = atc2603x_onkey_hw_init(onkey, reset_status, + reset_time, press_time); + if (error) + return error; + + device_init_wakeup(&pdev->dev, true); + + return 0; +} + +static struct platform_driver atc260x_onkey_driver = { + .probe = atc260x_onkey_probe, + .driver = { + .name = "atc260x-onkey", + }, +}; + +module_platform_driver(atc260x_onkey_driver); + +MODULE_DESCRIPTION("Onkey driver for ATC260x PMICs"); +MODULE_AUTHOR("Cristian Ciocaltea "); +MODULE_LICENSE("GPL"); From patchwork Tue Jan 26 09:56:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 371916 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A542EC433DB for ; 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Tue, 26 Jan 2021 01:56:12 -0800 (PST) Received: from localhost.localdomain ([188.24.159.61]) by smtp.gmail.com with ESMTPSA id h12sm11648310edb.16.2021.01.26.01.56.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Jan 2021 01:56:11 -0800 (PST) From: Cristian Ciocaltea To: Lee Jones , Mark Brown , Rob Herring , Dmitry Torokhov , Sebastian Reichel Cc: Manivannan Sadhasivam , Liam Girdwood , =?utf-8?q?Andreas_F=C3=A4rber?= , Linus Walleij , linux-actions@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v7 5/5] MAINTAINERS: Add entry for ATC260x PMIC Date: Tue, 26 Jan 2021 11:56:01 +0200 Message-Id: <715ac9a4a87dd8f85c57f9e65abfca9769e9e21c.1611653995.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org From: Manivannan Sadhasivam Add MAINTAINERS entry for ATC260x PMIC. Signed-off-by: Manivannan Sadhasivam [cristian: change binding doc file path, add file patterns for onkey and poweroff drivers, fix ordering, add myself as co-maintainer] Signed-off-by: Cristian Ciocaltea --- Changes in v7: - None Changes in v6: - None Changes in v5: - None Changes in v4: - None Changes in v3: - Restored the authorship of the patch to Mani MAINTAINERS | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index cfb47554b951..32c16d13fe28 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2891,6 +2891,18 @@ W: http://www.openaoe.org/ F: Documentation/admin-guide/aoe/ F: drivers/block/aoe/ +ATC260X PMIC MFD DRIVER +M: Manivannan Sadhasivam +M: Cristian Ciocaltea +L: linux-actions@lists.infradead.org +S: Maintained +F: Documentation/devicetree/bindings/mfd/actions,atc260x.yaml +F: drivers/input/misc/atc260x-onkey.c +F: drivers/mfd/atc260* +F: drivers/power/reset/atc260x-poweroff.c +F: drivers/regulator/atc260x-regulator.c +F: include/linux/mfd/atc260x/* + ATHEROS 71XX/9XXX GPIO DRIVER M: Alban Bedel S: Maintained