From patchwork Mon Jan 25 23:56:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 370390 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B96A2C43381 for ; Mon, 25 Jan 2021 23:58:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6E77822AAC for ; Mon, 25 Jan 2021 23:58:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732598AbhAYX6Z (ORCPT ); Mon, 25 Jan 2021 18:58:25 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:57924 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732463AbhAYX6I (ORCPT ); Mon, 25 Jan 2021 18:58:08 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10PNvAPj122248; Mon, 25 Jan 2021 17:57:10 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611619030; bh=W3mA6Gr5VSniesCxAOF0B2n9RNZ/SuE/+94mPRQluPI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=iffWKY5NUrEgU3wM9905b4E16ObCP55qW8eZ/EHV+2EvCsp1rocAFtcmI+7JEreUt TrHGnEmTqYsuK6JxeGEL4XzUZy+/orZMn0ZFLcxKtZFreEagdDLi1Q1nzBod5Sl/4u n02IHObORkfZZ752jKTpf4XVaylKbet780oII3CQ= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10PNvAVb019507 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 25 Jan 2021 17:57:10 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 25 Jan 2021 17:57:09 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 25 Jan 2021 17:57:09 -0600 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10PNv9tn035747; Mon, 25 Jan 2021 17:57:09 -0600 Received: from localhost ([10.250.35.71]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 10PNv9sZ117189; Mon, 25 Jan 2021 17:57:09 -0600 From: Suman Anna To: Bjorn Andersson , Rob Herring CC: , , , , Suman Anna Subject: [PATCH 1/2] dt-bindings: hwlock: Update OMAP HwSpinlock binding for AM64x SoCs Date: Mon, 25 Jan 2021 17:56:52 -0600 Message-ID: <20210125235653.24385-2-s-anna@ti.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210125235653.24385-1-s-anna@ti.com> References: <20210125235653.24385-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Update the existing OMAP HwSpinlock binding to include the info for AM64x SoCs. There are some minor IP integration differences between the AM64x SoCs and the previous AM65x and J721E SoC families. A new example is also added showcasing the difference in the IP's presence on the interconnect. Signed-off-by: Suman Anna --- .../bindings/hwlock/ti,omap-hwspinlock.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml index ac35491a6f65..ac146c0d628f 100644 --- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml @@ -14,6 +14,7 @@ properties: enum: - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs + - ti,am64-hwspinlock # for K3 AM64x SoCs reg: maxItems: 1 @@ -74,3 +75,28 @@ examples: }; }; }; + + - | + / { + /* K3 AM64x SoCs */ + model = "Texas Instruments K3 AM642 SoC"; + compatible = "ti,am642-evm", "ti,am642"; + #address-cells = <2>; + #size-cells = <2>; + + bus@f4000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */ + <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */ + <0x00 0x0f000000 0x00 0x0f000000 0x00 0x00c44200>, /* Second peripheral window */ + <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>; /* Third peripheral window */ + + spinlock@2a000000 { + compatible = "ti,am64-hwspinlock"; + reg = <0x00 0x2a000000 0x00 0x1000>; + #hwlock-cells = <1>; + }; + }; + }; From patchwork Mon Jan 25 23:56:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 371011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E34B7C4332D for ; Mon, 25 Jan 2021 23:58:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9B6F522D04 for ; Mon, 25 Jan 2021 23:58:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731921AbhAYX60 (ORCPT ); Mon, 25 Jan 2021 18:58:26 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:57936 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732469AbhAYX6O (ORCPT ); Mon, 25 Jan 2021 18:58:14 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10PNvF4J122260; Mon, 25 Jan 2021 17:57:15 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611619035; bh=u490ZBd71l4VSU5ZzR93uUh3gBx2Qawp9w+Ia8TQfbc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fwrQgHbcXL2VL8GW5qSwSrSmyjJo4F4We1fOR3s4+7Pi7gBWFdlEB6AMtjom0c62K WFEcdnjjwgjyNTx2Ph6kDtdZ2RF+IYOD5OgVMMs+DDi/Uq1vSRs3VqNG/CJ5CUbNDP QaRWyhmEmYr21BTXcbibaiH+PXb/hOfCrs06UccU= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10PNvF6s088368 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 25 Jan 2021 17:57:15 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 25 Jan 2021 17:57:15 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 25 Jan 2021 17:57:14 -0600 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10PNvEsH035804; Mon, 25 Jan 2021 17:57:14 -0600 Received: from localhost ([10.250.35.71]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 10PNvE3t117198; Mon, 25 Jan 2021 17:57:14 -0600 From: Suman Anna To: Bjorn Andersson , Rob Herring CC: , , , , Suman Anna Subject: [PATCH 2/2] hwspinlock: omap: Add support for K3 AM64x SoCs Date: Mon, 25 Jan 2021 17:56:53 -0600 Message-ID: <20210125235653.24385-3-s-anna@ti.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210125235653.24385-1-s-anna@ti.com> References: <20210125235653.24385-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM64x SoC contains a HwSpinlock IP instance in the MAIN domain, and is a minor variant of the IP on the current TI K3 SoCs such as AM64x, J721E or J7200 SoCs. The IP is not built with the K3 safety feature in hardware, and has slightly different integration into the overall SoC. Add the support for this IP through a new compatible. Signed-off-by: Suman Anna --- drivers/hwspinlock/omap_hwspinlock.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/hwspinlock/omap_hwspinlock.c b/drivers/hwspinlock/omap_hwspinlock.c index 3b05560456ea..65dbf1ae3aa7 100644 --- a/drivers/hwspinlock/omap_hwspinlock.c +++ b/drivers/hwspinlock/omap_hwspinlock.c @@ -2,11 +2,12 @@ /* * OMAP hardware spinlock driver * - * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com * * Contact: Simon Que * Hari Kanigeri * Ohad Ben-Cohen + * Suman Anna */ #include @@ -165,6 +166,7 @@ static int omap_hwspinlock_remove(struct platform_device *pdev) static const struct of_device_id omap_hwspinlock_of_match[] = { { .compatible = "ti,omap4-hwspinlock", }, { .compatible = "ti,am654-hwspinlock", }, + { .compatible = "ti,am64-hwspinlock", }, { /* end */ }, }; MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);