From patchwork Fri Mar 2 15:06:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 130544 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1374950lja; Fri, 2 Mar 2018 07:07:53 -0800 (PST) X-Google-Smtp-Source: AG47ELtEdqaA7uOalf22PSJAbwkfRRSoQtytnyuF4J2ZC/PdpFwxpCQ90wIU+78jYm+fKQLnz+8v X-Received: by 2002:a17:902:7046:: with SMTP id h6-v6mr5286341plt.301.1520003273322; Fri, 02 Mar 2018 07:07:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520003273; cv=none; d=google.com; s=arc-20160816; b=K0mJ0A8npoWa8Civ2K+cRXTmgcbZ0V006VBiwz5+GsCE/TlOf6hy8cRM4ZMM7Q13gs s22DKrsAoIEXECL6g/XgTIb/rXg+/Ulaab5XuBR0iI068hJbA2gA+jm4OTrsu1ci3VcW 8C/2YX9jSJLGFPqcYnlaa6ykwEKSmxa3XJunR3qK5yqDirhZU/W5yM4S1A55vjjgutwA zhzx8Kiv0iU8rhXctqoHRcDZmvTX+nxzm+Gw/jH0Myvf3FMrtNrW3z8j8rKOvO0CydbL 4NZza4eiyjJvmIjFornTgY51dc42S357WdfWqujwHNjyp48BeqZilPPih7750AE+pnxF 4S+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=woYMRtZNCBMCfhLphG5adX4pwF1DIPhqP42VvVSHLio=; b=PPe3dwWG8VehQDG7Gs/U1aKl/P5s0mteGIo7l9H78NgGmNyI1QOHgrA/WJXcX87k48 1WLmKb9+LQvJBsq1Usazy+9AjEOxCl3+ydJWikSL+nlhpkyk1RFLx4jbsQmUL9Ihteeg Mot0dO19+nztLfkJ8Q0lByJYA9U50xJuU72I+qy5muWKCUV3YKjPIhC+2D/Grx3URelx qxt1d8mTyj/Ja+e4nOTooi29qv6RkoVsEdDBNbxK4q72H35TMmAXGgXobd/vEl8dghTr 3F8TJi1XPfnSoQ0cJjV8+vwzlH2pw0sZUurmPPdwrwaI/2z7WSladxvMzL03XD8roJO5 +puw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p7si4976076pff.80.2018.03.02.07.07.53; Fri, 02 Mar 2018 07:07:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423507AbeCBPHv (ORCPT + 6 others); Fri, 2 Mar 2018 10:07:51 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:5730 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1423587AbeCBPHu (ORCPT ); Fri, 2 Mar 2018 10:07:50 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 2976B1E0CA7C4; Fri, 2 Mar 2018 23:07:33 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.361.1; Fri, 2 Mar 2018 23:07:26 +0800 From: John Garry To: , , , CC: , , , , Xiaofei Tan , John Garry Subject: [PATCH v2 2/8] scsi: hisi_sas: support the property of signal attenuation for v2 hw Date: Fri, 2 Mar 2018 23:06:16 +0800 Message-ID: <1520003182-26277-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520003182-26277-1-git-send-email-john.garry@huawei.com> References: <1520003182-26277-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Xiaofei Tan The register SAS_PHY_CTRL is configured according to signal quality. The signal quality is calculated by signal attenuation of hardware physical link. It may be different for different PCB layout. So, in order to give better support to new board, this patch add support to reading the devicetree property, hisi-signal-attenuation. Of course, we still keep an default value in driver to adapt old board. Signed-off-by: Xiaofei Tan Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 39 +++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index 4ccb61e..3a0b4ed 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -406,6 +406,17 @@ struct hisi_sas_err_record_v2 { __le32 dma_rx_err_type; }; +struct signal_attenuation_s { + u32 de_emphasis; + u32 preshoot; + u32 boost; +}; + +struct sig_atten_lu_s { + const struct signal_attenuation_s *att; + u32 sas_phy_ctrl; +}; + static const struct hisi_sas_hw_error one_bit_ecc_errors[] = { { .irq_msk = BIT(SAS_ECC_INTR_DQE_ECC_1B_OFF), @@ -1130,9 +1141,16 @@ static void phys_try_accept_stp_links_v2_hw(struct hisi_hba *hisi_hba) } } +static const struct signal_attenuation_s x6000 = {9200, 0, 10476}; +static const struct sig_atten_lu_s sig_atten_lu[] = { + { &x6000, 0x3016a68 }, +}; + static void init_reg_v2_hw(struct hisi_hba *hisi_hba) { struct device *dev = hisi_hba->dev; + u32 sas_phy_ctrl = 0x30b9908; + u32 signal[3]; int i; /* Global registers init */ @@ -1176,9 +1194,28 @@ static void init_reg_v2_hw(struct hisi_hba *hisi_hba) hisi_sas_write32(hisi_hba, AXI_AHB_CLK_CFG, 1); hisi_sas_write32(hisi_hba, HYPER_STREAM_ID_EN_CFG, 1); + /* Get sas_phy_ctrl value to deal with TX FFE issue. */ + if (!device_property_read_u32_array(dev, "hisi-signal-attenuation", + signal, ARRAY_SIZE(signal))) { + for (i = 0; i < ARRAY_SIZE(sig_atten_lu); i++) { + const struct sig_atten_lu_s *lookup = &sig_atten_lu[i]; + const struct signal_attenuation_s *att = lookup->att; + + if ((signal[0] == att->de_emphasis) && + (signal[1] == att->preshoot) && + (signal[2] == att->boost)) { + sas_phy_ctrl = lookup->sas_phy_ctrl; + break; + } + } + + if (i == ARRAY_SIZE(sig_atten_lu)) + dev_warn(dev, "unknown signal attenuation values, using default PHY ctrl config\n"); + } + for (i = 0; i < hisi_hba->n_phy; i++) { hisi_sas_phy_write32(hisi_hba, i, PROG_PHY_LINK_RATE, 0x855); - hisi_sas_phy_write32(hisi_hba, i, SAS_PHY_CTRL, 0x30b9908); + hisi_sas_phy_write32(hisi_hba, i, SAS_PHY_CTRL, sas_phy_ctrl); hisi_sas_phy_write32(hisi_hba, i, SL_TOUT_CFG, 0x7d7d7d7d); hisi_sas_phy_write32(hisi_hba, i, SL_CONTROL, 0x0); hisi_sas_phy_write32(hisi_hba, i, TXID_AUTO, 0x2);