From patchwork Fri Mar 2 09:09:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 130493 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1049663lja; Fri, 2 Mar 2018 01:10:32 -0800 (PST) X-Google-Smtp-Source: AG47ELsitMTl0D9XiQClZTBUyqyTx4ZxbOxuamS0YyKor/4w0HdDTbjC/8uDR7spF1UJ25jkluCJ X-Received: by 10.99.60.72 with SMTP id i8mr2608561pgn.399.1519981831838; Fri, 02 Mar 2018 01:10:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519981831; cv=none; d=google.com; s=arc-20160816; b=Vl1rlzzmDY5P4Dfn4C7Yw4kSflXmMEMJ7MJ7hoslXP4IThwod4X+0QyNS2pRH9XHqE 9UwJVqyKhlkp+b97SN94zXJTOMfjdWGURqzm5JARpAAbfEDxheDER0qPi3+PPT7p1y8T ZnrXHmU02BcVxlveGNkzFLS1VEoxFAESkFy5og0sSGmyplfSsRKgq6x+0y+Zieqzb7qA gW4qXm59RWKLNpVN4kfEPu33Zl+cFj9KMsQd/pIwSN43sNJbX/mUYvVDdqSBcAqxNjSI t1mfMjEA99kqV/h1xiv2TyBfZbt2zKmPXRWAAQ9naKQKIQVfzshEAoT6hQCFnGcADJ8m vdaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:references:in-reply-to:message-id:date:subject :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=LqtGzmPQvOAj7KHtd8ig+4e0WlSFHC1KmxGilxP8m/s=; b=UJwT0sr8XeZ7gAqS4fkCStqKQ8lf/mnaas64E7lOib52UkQ/EB3oxfmBR7X1VYIoag KzG0HbkyikbcBgj/GgsRGt6POe/boZTlbwi59fJxWEq2XriZCU9gf+icps+TuDix+AZ/ lreqWuYbSs+T4FU0hWeo8S4UzF9xEyjaRJiIyamE2xgP6LOhq7iAVshqtyyLv7ATiWIl Rk/ed3fe9jexWCaO88eLI8x2L37hcGGh+qX8zGDBlkGf9nrRZJKcRExcxp8ixMDKEtj9 9Di1+HG/2lTAjyPDn/LrBaHs9GjMBRG8StRjYcNcDm+cvjhylYcSXmAxUPt4XXRq9SNe 3MrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hY3FeSSY; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id s17si3767815pgq.421.2018.03.02.01.10.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:10:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hY3FeSSY; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7AAAB6EE37; Fri, 2 Mar 2018 09:10:00 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id C7A066EE37 for ; Fri, 2 Mar 2018 09:09:57 +0000 (UTC) Received: by mail-lf0-x243.google.com with SMTP id y19so12360715lfd.4 for ; Fri, 02 Mar 2018 01:09:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bVvEDe8oPb7L+aZO6IjaSj07OZzlPiwxkPLUBBkIMso=; b=hY3FeSSYyvmCMY2FIKu+EL40aa5kJPtfipmQP0O2nEkAVvZSp/7CNGM9RqHVvI56oH ineOrINbxQDUKtBBqTFgbT16Ndr8ZnvmgTjTyhMBll03ZPXigdKb6BoB8IG8zUCT4Alj 1NaAbDheKFMJASuEaGY2X4NVg+r4pr9Ih+M7A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bVvEDe8oPb7L+aZO6IjaSj07OZzlPiwxkPLUBBkIMso=; b=SA8Xn+QzmDEuWakgu74qrSuaXfgAQfiHUoDGI/o+tLcynS/z+saEM6LgRpT9NKTFOZ +KFPAGMd96QoV2Lee35xcFkYj2brwU9rJkNMLywOQzkiacoaG2/y+1w8oVyzuG07TOVx nOuj4CbUOyhzxljlPfqaJbHAS7C3+LvmlLurBebdfH9XLxxMONl65Zxa1PJiJ67fPWT1 mFXrPO18FBtl+tMtONkw9SNF8a+bX2TUr4P7VXGkMIUi2JSthyaz+DvwmJYoknWQEsJW gQ6jC5nja8CaM5Q+ZplrlWTarptrUe6CnZRys7LLUmZNgfAv5GmMFXYc6zckxt2BCaud CBeQ== X-Gm-Message-State: AElRT7E68QexGXNJCPdQw9fmxzxsjYj+ed191chG06reak6QGFkP2qVn scv/VY5UckbZJfeGp661v6ngzg== X-Received: by 10.25.142.72 with SMTP id q69mr3586786lfd.82.1519981796034; Fri, 02 Mar 2018 01:09:56 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id c63sm1242729lfg.82.2018.03.02.01.09.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:09:55 -0800 (PST) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Liviu Dudau Subject: [PATCH 1/4] drm/pl111: Make the default BPP a per-variant variable Date: Fri, 2 Mar 2018 10:09:45 +0100 Message-Id: <20180302090948.6399-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180302090948.6399-1-linus.walleij@linaro.org> References: <20180302090948.6399-1-linus.walleij@linaro.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The PL110, Integrator and Versatile boards strongly prefer to use 16 BPP even if other modes are supported, both to keep down memory consumption and also to easier find a good match to supported resolutions with consideration taken to the memory bandwidth of the platforms. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij --- drivers/gpu/drm/pl111/pl111_drm.h | 2 ++ drivers/gpu/drm/pl111/pl111_drv.c | 4 +++- drivers/gpu/drm/pl111/pl111_versatile.c | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 6d0e450e51b1..360fbdd2203c 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -43,6 +43,7 @@ struct drm_minor; * @broken_vblank: the vblank IRQ is broken on this variant * @formats: array of supported pixel formats on this variant * @nformats: the length of the array of supported pixel formats + * @fb_bpp: desired bits per pixel on the default framebuffer */ struct pl111_variant_data { const char *name; @@ -52,6 +53,7 @@ struct pl111_variant_data { bool broken_vblank; const u32 *formats; unsigned int nformats; + unsigned int fb_bpp; }; struct pl111_drm_dev_private { diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 1231905150d0..73d252351438 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -192,7 +192,7 @@ static int pl111_modeset_init(struct drm_device *dev) drm_mode_config_reset(dev); - drm_fb_cma_fbdev_init(dev, 32, 0); + drm_fb_cma_fbdev_init(dev, priv->variant->fb_bpp, 0); drm_kms_helper_poll_init(dev); @@ -341,6 +341,7 @@ static const struct pl111_variant_data pl110_variant = { .is_pl110 = true, .formats = pl110_pixel_formats, .nformats = ARRAY_SIZE(pl110_pixel_formats), + .fb_bpp = 16, }; /* RealView, Versatile Express etc use this modern variant */ @@ -365,6 +366,7 @@ static const struct pl111_variant_data pl111_variant = { .name = "PL111", .formats = pl111_pixel_formats, .nformats = ARRAY_SIZE(pl111_pixel_formats), + .fb_bpp = 32, }; static const struct amba_id pl111_id_table[] = { diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index 11024ad64181..9825f6d52788 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -241,6 +241,7 @@ static const struct pl111_variant_data pl110_integrator = { .broken_vblank = true, .formats = pl110_integrator_pixel_formats, .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats), + .fb_bpp = 16, }; /* @@ -253,6 +254,7 @@ static const struct pl111_variant_data pl110_versatile = { .external_bgr = true, .formats = pl110_versatile_pixel_formats, .nformats = ARRAY_SIZE(pl110_versatile_pixel_formats), + .fb_bpp = 16, }; int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) From patchwork Fri Mar 2 09:09:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 130490 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1049287lja; Fri, 2 Mar 2018 01:10:04 -0800 (PST) X-Google-Smtp-Source: AG47ELupbXt/RPFPhEo2lqv84Ejb/UF/xgBIXr+4MD5Gklyv7ZYMmNfZnRbFGIeAfOdqTDhUSCOr X-Received: by 10.101.75.140 with SMTP id t12mr4118278pgq.442.1519981804490; Fri, 02 Mar 2018 01:10:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519981804; cv=none; d=google.com; s=arc-20160816; b=a0wYFllbz7ZZ0rygIsAklpUD14BSM4nv/Mw7i7Yc8YKPhqA9kd5rw58FE/d/ioSErq rcE+V5zO9ux4rMalfIlzR5ibDu70Pt/BqE5ARUGnjoyGBOYplzG70UxLkHsR7DQuGkhe KUWfsLRBwUxRiQX2f8n962N9ZniKFl9jb2LVq0nYrMy/YzwS67WFBZFWuKztozuZQNAS KDN8hIewe3T/5M7r5IqgDoViqQ483MWmu0M6+7Tp3/XZGiwv2qf2H8bKhHlSa/ygn2ba C+WbOIV4C3M3pCWknl1HC4PKhr10S01VNzQ8p9SD4nbRYnZkP3uLpyTZ9f3a58cnOFQ4 gS7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:references:in-reply-to:message-id:date:subject :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=zGzBe9fqBCPRP3CaZXFRrbsSJHpqz/o8BRvMEDjcqxc=; b=h1wwooyxMUkEySirFmpnZ8cfahvfbcNUhZCsg/kKjtMhSrEss9x9ifH2q41MF0KVKM bbt/HQ8oUqLXfVmV1qBHKnvWBnI/D+WFWdgJFbon+MYw8oLjXp4uy9XXLOaci0QbPgcA Wqw7PDAWFsfDQ4mmdEYrNgJUXKMtz0Ju5g4ZMDTG6Naj4gui8n0mECEQ7vB23VK90sPi mMXSYmRrDJcd3R3c6a4D6mYpZdgVXuAN1dSoQU8L77SdrTfPNtzpzNBE6Zbjmitl2YJa lzy/RqncOmSWo1BY/yR08p+MvYFlu7db6UF1uz7/SBa92w8TOStq0qwvVP6jMoBAAXGa S2TQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=N2kG9vu8; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id c18si4551504pfe.335.2018.03.02.01.10.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:10:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=N2kG9vu8; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B93F66EE3C; Fri, 2 Mar 2018 09:10:01 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id E01286EE37 for ; Fri, 2 Mar 2018 09:09:59 +0000 (UTC) Received: by mail-lf0-x243.google.com with SMTP id i80so12370120lfg.5 for ; Fri, 02 Mar 2018 01:09:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=u3n+EdmT5VELmcOq1OsBnkTNl1hKW93SNHbVcS57YBE=; b=N2kG9vu8cgIgoDnLxCOPemcOxQu9GIV0CQbmcSEKWVNHEYbtPo7LnLih0RfwszJVNv NswRW9d2n9EkG0uWIU9d1CCs7Qvcg7qDcqsoUlzEWwmBmd+moL4zeNGvASHMWlTPGzxH BsWtOgKHfdixKouxcmBi8Igc1Z0ncq4Y28VAQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=u3n+EdmT5VELmcOq1OsBnkTNl1hKW93SNHbVcS57YBE=; b=ZKxIX1G18J57EtOAAjLvEkjWFJnp7iqRHOiF5OC7xb2HNzfZikVCCTGIy3DvEWyu1p k/BSXIKMH2iUcENTVL5Z/Ok9ap3cBlbkdwWCAbGrCoHZWU3kHfgft1ydL9sxrhHn7IBR nbbW4rX69mKNmpvmDzaiXG/WeWle1qxoPkkL3x51XKN0JC2OkkdbwgzWZ9OmU6MvBNLP Y4dKMzMzx4w5b1iQmxd/PgxLPubtht+67pdsQ6eA5zYwDxNb+QR9V83pGPEUCKmd4qhx GFD1BtcMB1Y/GFwnpKoeP43FvOTQksIImsAv98Xs5XEWAfWaKKIRZ8RKDI05tEofJBlQ +mFw== X-Gm-Message-State: AElRT7EVvaXAgOKjQoqnW6EG5NOzzAFodM+ZaHt56CRnJwUwxtl6AYEh L7EEEzH0VLnxl0YUxFQMcKLkbw== X-Received: by 10.25.181.147 with SMTP id g19mr3653832lfk.47.1519981798210; Fri, 02 Mar 2018 01:09:58 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id c63sm1242729lfg.82.2018.03.02.01.09.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:09:57 -0800 (PST) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Liviu Dudau Subject: [PATCH 2/4] drm/pl111: Use max memory bandwidth for resolution Date: Fri, 2 Mar 2018 10:09:46 +0100 Message-Id: <20180302090948.6399-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180302090948.6399-1-linus.walleij@linaro.org> References: <20180302090948.6399-1-linus.walleij@linaro.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We were previously selecting 1024x768 and 32BPP as the default set-up for the PL111 consumers. This does not work on elder systems: the device tree bindings support a property "max-memory-bandwidth" in bytes/second that states that if you exceed this the memory bus will saturate. The result is flickering and unstable images. Parse the "max-memory-bandwidth" and respect it when intializing the driver. On the RealView PB11MP, Versatile and Integrator/CP we get a nice console as default with this code. Signed-off-by: Linus Walleij Reviewed-by: Eric Anholt --- ChangeLog v2->v3: - Account for the case where there is no bandwidth limitation so priv->memory_bw is zero. Then just accept any modes. ChangeLog v1->v2: - Exploit the new .mode_valid() callback we added to the simple KMS helper. - Use the hardcoded bits per pixel per variant instead of trying to be heuristic about this setting for now. --- drivers/gpu/drm/pl111/pl111_display.c | 36 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/pl111/pl111_drm.h | 1 + drivers/gpu/drm/pl111/pl111_drv.c | 6 ++++++ 3 files changed, 43 insertions(+) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index d75923896609..577e61950e16 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -50,6 +50,41 @@ irqreturn_t pl111_irq(int irq, void *data) return status; } +static enum drm_mode_status +pl111_mode_valid(struct drm_crtc *crtc, + const struct drm_display_mode *mode) +{ + struct drm_device *drm = crtc->dev; + struct pl111_drm_dev_private *priv = drm->dev_private; + u32 cpp = priv->variant->fb_bpp / 8; + u64 bw; + + /* + * We use the pixelclock to also account for interlaced modes, the + * resulting bandwidth is in bytes per second. + */ + bw = mode->clock * 1000; /* In Hz */ + bw = bw * mode->hdisplay * mode->vdisplay * cpp; + bw = div_u64(bw, mode->htotal * mode->vtotal); + + /* + * If no bandwidth constraints, anything goes, else + * check if we are too fast. + */ + if (priv->memory_bw && (bw > priv->memory_bw)) { + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu too fast\n", + mode->hdisplay, mode->vdisplay, + mode->clock * 1000, cpp, bw); + + return MODE_BAD; + } + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu bytes/s OK\n", + mode->hdisplay, mode->vdisplay, + mode->clock * 1000, cpp, bw); + + return MODE_OK; +} + static int pl111_display_check(struct drm_simple_display_pipe *pipe, struct drm_plane_state *pstate, struct drm_crtc_state *cstate) @@ -344,6 +379,7 @@ static int pl111_display_prepare_fb(struct drm_simple_display_pipe *pipe, } static const struct drm_simple_display_pipe_funcs pl111_display_funcs = { + .mode_valid = pl111_mode_valid, .check = pl111_display_check, .enable = pl111_display_enable, .disable = pl111_display_disable, diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 360fbdd2203c..70b092670c04 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -65,6 +65,7 @@ struct pl111_drm_dev_private { struct drm_simple_display_pipe pipe; void *regs; + u32 memory_bw; u32 ienb; u32 ctrl; /* The pixel clock (a reference to our clock divider off of CLCDCLK). */ diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 73d252351438..b469aa317d9d 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -262,6 +262,12 @@ static int pl111_amba_probe(struct amba_device *amba_dev, drm->dev_private = priv; priv->variant = variant; + if (of_property_read_u32(dev->of_node, "max-memory-bandwidth", + &priv->memory_bw)) { + dev_info(dev, "no max memory bandwidth specified, assume unlimited\n"); + priv->memory_bw = 0; + } + /* The two variants swap this register */ if (variant->is_pl110) { priv->ienb = CLCD_PL110_IENB; From patchwork Fri Mar 2 09:09:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 130494 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1049729lja; 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[131.252.210.177]) by mx.google.com with ESMTPS id b9si3734379pgn.443.2018.03.02.01.10.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:10:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HduWYQr0; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 500A36EE2B; Fri, 2 Mar 2018 09:10:03 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 39CCC6EE3D for ; Fri, 2 Mar 2018 09:10:02 +0000 (UTC) Received: by mail-lf0-x244.google.com with SMTP id r80so12306166lfe.13 for ; Fri, 02 Mar 2018 01:10:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SX3+n951lztIyX7CAOQq03/c0G9f0HcWHv0IM4FGvRQ=; b=HduWYQr03C5JIHRT50TtpZBj99fRbzJ9EeO9LYvC4++W01nkPgJp71LnrAH5Ne+wda eVv4CQsAgmNrWlDA0LesVzgKZ2FqIQHO92A+0kkr/W2S52HKt9AaDKerVHf6j2liRV/g PxfG1uLurm4evf//gOCD5msOdjxHZGrOCNcTw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SX3+n951lztIyX7CAOQq03/c0G9f0HcWHv0IM4FGvRQ=; b=LAVj/3iXh4UlFQnOeaAeQtKRiLwwb5hEDqgYn4BUBwrkhaZB6o3Fxc4iLYIq6EgQEJ TInm62/swIdiXs/L63ritEzEiypjJjAd0MosIJQRPHNtuMIVUNPcq61Hw3Styrazdcf8 h7UXAgsLwpxcr/0XgXWYHLjOVPNB/iQo94lOCRdIWPEWxcsUmWF2eF7JYDvO9JadKl2V 5/C2VkhtOjiqf69Gs50SsyytYe/q+VeyzCDTht+5HHNs4NIJ/FWRrYj6shHb5kDSKdc9 ZLyiCtlR52DlWduUe5IAzDuJD2kHeBQLQExftMApfGejTXyS/HKhrUtVyuepR6bEfVxK kIAw== X-Gm-Message-State: AElRT7FWTiyzha984/cAh4VUIvqCXLdeuzzC6cxCTllLF9bijiAtJgRd vCrBcMduhOzhKkW5Jd3VLlw3Kw== X-Received: by 10.46.87.72 with SMTP id r8mr3507658ljd.93.1519981800587; Fri, 02 Mar 2018 01:10:00 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id c63sm1242729lfg.82.2018.03.02.01.09.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:09:59 -0800 (PST) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Liviu Dudau Subject: [PATCH 3/4] drm/pl111: Handle the RealView variant separately Date: Fri, 2 Mar 2018 10:09:47 +0100 Message-Id: <20180302090948.6399-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180302090948.6399-1-linus.walleij@linaro.org> References: <20180302090948.6399-1-linus.walleij@linaro.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We want to cut down the default bpp to 16 on the RealView so we can have a 1024x768 framebuffer console by default. The memory bandwidth limitations makes this not work with the PL111 default of 32bpp. This builds on top of the earlier patches making the framebuffer default bpp a per-variant variable. Signed-off-by: Linus Walleij Reviewed-by: Eric Anholt --- drivers/gpu/drm/pl111/pl111_versatile.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index 9825f6d52788..f15391d994b6 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -230,6 +230,23 @@ static const u32 pl110_versatile_pixel_formats[] = { DRM_FORMAT_XRGB1555, }; +static const u32 pl111_realview_pixel_formats[] = { + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_BGR565, + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR1555, + DRM_FORMAT_XBGR1555, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, + DRM_FORMAT_ABGR4444, + DRM_FORMAT_XBGR4444, + DRM_FORMAT_ARGB4444, + DRM_FORMAT_XRGB4444, +}; + /* * The Integrator variant is a PL110 with a bunch of broken, or not * yet implemented features @@ -257,6 +274,18 @@ static const struct pl111_variant_data pl110_versatile = { .fb_bpp = 16, }; +/* + * RealView PL111 variant, the only real difference from the vanilla + * PL111 is that we select 16bpp framebuffer by default to be able + * to get 1024x768 without saturating the memory bus. + */ +static const struct pl111_variant_data pl111_realview = { + .name = "PL111 RealView", + .formats = pl111_realview_pixel_formats, + .nformats = ARRAY_SIZE(pl111_realview_pixel_formats), + .fb_bpp = 16, +}; + int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) { const struct of_device_id *clcd_id; @@ -306,6 +335,7 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) case REALVIEW_CLCD_PBA8: case REALVIEW_CLCD_PBX: versatile_syscon_map = map; + priv->variant = &pl111_realview; priv->variant_display_enable = pl111_realview_clcd_enable; priv->variant_display_disable = pl111_realview_clcd_disable; dev_info(dev, "set up callbacks for RealView PL111\n"); From patchwork Fri Mar 2 09:09:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 130491 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1049423lja; Fri, 2 Mar 2018 01:10:13 -0800 (PST) X-Google-Smtp-Source: AG47ELtc1kUntH5snUFbkJhObNo4c/bAO1CTfMIs34DTSBgrFDPsZoexVUkx+Riq9bo6qlhQwDzF X-Received: by 10.99.184.1 with SMTP id p1mr3975068pge.96.1519981813760; Fri, 02 Mar 2018 01:10:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519981813; cv=none; d=google.com; s=arc-20160816; b=T7S1v0pwbndN+zndtQSX8koekZbUeeenYIJhpC2CkPSYVoKQSuV7zcH4nRUUH4Yl5L IfJYuVHs6DNYhFI8BUe6GVF6ZxZqJ15rgDwk6RaAdG3NDUbxtagkbMLAORCn01wz3Hk/ bN119AUGf3FmrPDqsYeL53lBsDwOEUVuLI0rclAE5ha/QnrTn7CsoHmxy/09JWYd5TD/ eQEiQrI91td0pt44vORpIAqlJFOazHVrQpBMRRxeTQmRwYBqRea/gKDv+3xZDSiCP7LJ 0e6pBoIu5gC3G5EFXY0t8PCvMuEX4fRQx7rzux3JV5GNOUAR3wMnEoCg6r1L6oanTcBx obOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:references:in-reply-to:message-id:date:subject :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=AU3Tp/nkJzP5va+VBoA+qMeNBO2Cvj+Ss9mtVkCRq5s=; b=tJau2SkPFVxDYwmMnM8cFFUR1cgGUVLInNrE0qWc5Y9xWTo22W5GPxisoxuGm+pq5J LlOswv3PNxAuyrSL1oWAcX/fMyZxkWbWyyjgG/60NJJpDGRN40gWeGDGkmhOx2KNiq2C 6TDETTotqmL+UF8U8gs5koF1F2IXwGinRakLCyRSgrvDp0Fl8RekWI92qRG+O4TUFqzz EVFJAY5WMCL9baPLoDs3r6PDvZs1lu2Moff4rwokcWyr7qd02lIbIbZTOvTUUPI5YYKj 3Qx7ZiBZRo6gDoY5rVpR8pLobWdQZ8L5XxbKnJzpvHuWsY33jldJD982uH9nqgHb6T18 xrZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=b5Hmjw+k; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id y12-v6si4491200plk.705.2018.03.02.01.10.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:10:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=b5Hmjw+k; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 928B96EE2E; Fri, 2 Mar 2018 09:10:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 787BF6EE39 for ; Fri, 2 Mar 2018 09:10:04 +0000 (UTC) Received: by mail-lf0-x243.google.com with SMTP id o145so12334974lff.0 for ; Fri, 02 Mar 2018 01:10:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LTGK5jTt3isKPMEcnlRJHK+m1wVYOHqYseuZghWiwV0=; b=b5Hmjw+k/auzZOr+t1xexCplNvNYpYwnDfefCCFsbuvl7VuX9o4XUGC1HJX0LpHj+X 7kf8YfsWpzCaiV2wAkWoYtxmeLECjSGXp09VaNpIYV0SG5vZTARUNVxDP07+cCsKplK+ sbUdW3rxxvEIhSBwnCsJZC/P1RTuYYOh4WNhM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LTGK5jTt3isKPMEcnlRJHK+m1wVYOHqYseuZghWiwV0=; b=daIH5GL01oP63xTo8hULucNODCk2nVY2eOV49rTSKaforXZ4IP/nTxudLrPhKCDoH8 y8lfD8U6xrqxRB6Ixjnc1oRCgV2IKW6LjEZfIH7IErBlzhwZeelNjnWi/cTENZgqast0 /colhrEjFPjuQEWMLz+1svDpVM61P5oSokKE/+MuP/uYZhlteKcqBxHGVNhdB8jZqv8x uKEyD+va68Ad8lXv6OhUzyLB7EnbWj2NqkRtZxm6XidlJeOesswHJb8PwgaqVcbfeExO 0y2stm5u6Osr3HFoyuWvaAnGrtOfLUl8G/74k/xoArILrza0p79rWEQvcWThrDchWQJ7 jRFg== X-Gm-Message-State: APf1xPBX9zazJRpvV55poTlLESYMhWLGszQwQ1t43YUiU/s0aiENV2mj jZdxyb7Q/jkZJEgFo4Q0yRRnSQ== X-Received: by 10.46.82.16 with SMTP id g16mr3330288ljb.67.1519981802627; Fri, 02 Mar 2018 01:10:02 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id c63sm1242729lfg.82.2018.03.02.01.10.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:10:01 -0800 (PST) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Liviu Dudau Subject: [PATCH 4/4] drm/pl111: Support the Versatile Express Date: Fri, 2 Mar 2018 10:09:48 +0100 Message-Id: <20180302090948.6399-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180302090948.6399-1-linus.walleij@linaro.org> References: <20180302090948.6399-1-linus.walleij@linaro.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pawel Moll , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Versatile Express uses a special configuration controller deeply embedded in the system motherboard FPGA to multiplex the two to three (!) CLCD instances out to the single SiI9022 bridge. Set up an extra file with the logic to probe to the FPGA mux register on the system controller bus, then parse the memory range argument to figure out what path the CLCD signal is actually taking, and set up the mux accordingly. If there is a CLCD instance on the core tile (the daughterboard with the CPUs fitted) then that CLCD instance will take precedence since it can address all memory. Scale down the Versatile Express to 16BPP so we can support a 1024x768 display despite the bus bandwidth restrictions on this platform. Cc: Liviu Dudau Cc: Pawel Moll Signed-off-by: Linus Walleij --- drivers/gpu/drm/pl111/Makefile | 1 + drivers/gpu/drm/pl111/pl111_drm.h | 3 +- drivers/gpu/drm/pl111/pl111_versatile.c | 48 ++++++++++++++- drivers/gpu/drm/pl111/pl111_vexpress.c | 106 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/pl111/pl111_vexpress.h | 22 +++++++ 5 files changed, 178 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/pl111/pl111_vexpress.c create mode 100644 drivers/gpu/drm/pl111/pl111_vexpress.h diff --git a/drivers/gpu/drm/pl111/Makefile b/drivers/gpu/drm/pl111/Makefile index 9c5e8dba8ac6..19a8189dc54f 100644 --- a/drivers/gpu/drm/pl111/Makefile +++ b/drivers/gpu/drm/pl111/Makefile @@ -3,6 +3,7 @@ pl111_drm-y += pl111_display.o \ pl111_versatile.o \ pl111_drv.o +pl111_drm-$(CONFIG_ARCH_VEXPRESS) += pl111_vexpress.o pl111_drm-$(CONFIG_DEBUG_FS) += pl111_debugfs.o obj-$(CONFIG_DRM_PL111) += pl111_drm.o diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 70b092670c04..e7c5d4a09238 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -64,7 +64,8 @@ struct pl111_drm_dev_private { struct drm_bridge *bridge; struct drm_simple_display_pipe pipe; - void *regs; + void __iomem *clcd_memory; + void __iomem *regs; u32 memory_bw; u32 ienb; u32 ctrl; diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index f15391d994b6..0170c34fb653 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -1,12 +1,14 @@ #include #include #include +#include #include #include #include #include #include #include "pl111_versatile.h" +#include "pl111_vexpress.h" #include "pl111_drm.h" static struct regmap *versatile_syscon_map; @@ -22,6 +24,7 @@ enum versatile_clcd { REALVIEW_CLCD_PB11MP, REALVIEW_CLCD_PBA8, REALVIEW_CLCD_PBX, + VEXPRESS_CLCD_V2M, }; static const struct of_device_id versatile_clcd_of_match[] = { @@ -53,6 +56,10 @@ static const struct of_device_id versatile_clcd_of_match[] = { .compatible = "arm,realview-pbx-syscon", .data = (void *)REALVIEW_CLCD_PBX, }, + { + .compatible = "arm,vexpress-muxfpga", + .data = (void *)VEXPRESS_CLCD_V2M, + }, {}, }; @@ -286,12 +293,26 @@ static const struct pl111_variant_data pl111_realview = { .fb_bpp = 16, }; +/* + * Versatile Express PL111 variant, again we just push the maximum + * BPP to 16 to be able to get 1024x768 without saturating the memory + * bus. The clockdivider also seems broken on the Versatile Express. + */ +static const struct pl111_variant_data pl111_vexpress = { + .name = "PL111 Versatile Express", + .formats = pl111_realview_pixel_formats, + .nformats = ARRAY_SIZE(pl111_realview_pixel_formats), + .fb_bpp = 16, + .broken_clockdivider = true, +}; + int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) { const struct of_device_id *clcd_id; enum versatile_clcd versatile_clcd_type; struct device_node *np; struct regmap *map; + int ret; np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match, &clcd_id); @@ -301,7 +322,25 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) } versatile_clcd_type = (enum versatile_clcd)clcd_id->data; - map = syscon_node_to_regmap(np); + /* Versatile Express special handling */ + if (versatile_clcd_type == VEXPRESS_CLCD_V2M) { + struct platform_device *pdev; + + /* Call into deep Vexpress configuration API */ + pdev = of_find_device_by_node(np); + if (!pdev) { + dev_err(dev, "can't find the sysreg device, deferring\n"); + return -EPROBE_DEFER; + } + map = dev_get_drvdata(&pdev->dev); + if (!map) { + dev_err(dev, "sysreg has not yet probed\n"); + return -EPROBE_DEFER; + } + } else { + map = syscon_node_to_regmap(np); + } + if (IS_ERR(map)) { dev_err(dev, "no Versatile syscon regmap\n"); return PTR_ERR(map); @@ -340,6 +379,13 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) priv->variant_display_disable = pl111_realview_clcd_disable; dev_info(dev, "set up callbacks for RealView PL111\n"); break; + case VEXPRESS_CLCD_V2M: + priv->variant = &pl111_vexpress; + dev_info(dev, "initializing Versatile Express PL111\n"); + ret = pl111_vexpress_clcd_init(dev, priv, map); + if (ret) + return ret; + break; default: dev_info(dev, "unknown Versatile system controller\n"); break; diff --git a/drivers/gpu/drm/pl111/pl111_vexpress.c b/drivers/gpu/drm/pl111/pl111_vexpress.c new file mode 100644 index 000000000000..720244f497fe --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_vexpress.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Versatile Express PL111 handling + * Copyright (C) 2018 Linus Walleij + * + * This module binds to the "arm,vexpress-muxfpga" device on the + * Versatile Express configuration bus and sets up which CLCD instance + * gets muxed out on the DVI bridge. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include "pl111_drm.h" +#include "pl111_vexpress.h" + +#define VEXPRESS_FPGAMUX_MOTHERBOARD 0x00 +#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_1 0x01 +#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_2 0x02 + +static bool daughterboard_muxed = false; +static bool motherboard_muxed = false; + +int pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map) +{ + struct device_node *memory; + u32 val; + int ret; + + /* + * The CLCD on the motherboard has a special memory region and + * does not make use of CMA. We differentiate between the different + * CLCD controllers using this memory region phandle. + */ + memory = of_parse_phandle(dev->of_node, "memory-region", 0); + if (!memory) { + if (motherboard_muxed) { + dev_info(dev, "motherboard CLCD muxed in\n"); + dev_info(dev, "daughterboard takes precedence\n"); + dev_info(dev, "motherboard CLCD will not be muxed out\n"); + } + dev_info(dev, + "DVI muxed to daughterboard 1 (core tile) CLCD\n"); + val = VEXPRESS_FPGAMUX_DAUGHTERBOARD_1; + daughterboard_muxed = true; + } else { + priv->clcd_memory = of_iomap(memory, 0); + if (!priv->clcd_memory) + dev_err(dev, "could not remap CLCD memory\n"); + /* Fall through and try to use CMA */ + if (daughterboard_muxed) { + dev_info(dev, "daughterboard takes precedence\n"); + dev_info(dev, "motherboard CLCD will not be muxed out\n"); + return -ENODEV; + } + dev_info(dev, "DVI muxed to motherboard CLCD\n"); + val = VEXPRESS_FPGAMUX_MOTHERBOARD; + motherboard_muxed = true; + } + + ret = regmap_write(map, 0, val); + if (ret) { + dev_err(dev, "error setting DVI muxmode\n"); + return -ENODEV; + } + + return 0; +} + +/* + * This sets up the regmap pointer that will then be retrieved by + * the detection code in pl111_versatile.c and passed in to the + * pl111_vexpress_clcd_init() function above. + */ +static int vexpress_muxfpga_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *map; + + map = devm_regmap_init_vexpress_config(&pdev->dev); + if (IS_ERR(map)) + return PTR_ERR(map); + dev_set_drvdata(dev, map); + + return 0; +} + +static const struct of_device_id vexpress_muxfpga_match[] = { + { .compatible = "arm,vexpress-muxfpga", } +}; + +static struct platform_driver vexpress_muxfpga_driver = { + .driver = { + .name = "vexpress-muxfpga", + .of_match_table = of_match_ptr(vexpress_muxfpga_match), + }, + .probe = vexpress_muxfpga_probe, +}; + +module_platform_driver(vexpress_muxfpga_driver); diff --git a/drivers/gpu/drm/pl111/pl111_vexpress.h b/drivers/gpu/drm/pl111/pl111_vexpress.h new file mode 100644 index 000000000000..49876417f7b6 --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_vexpress.h @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 + +struct device; +struct pl111_drm_dev_private; +struct regmap; + +#ifdef CONFIG_ARCH_VEXPRESS + +int pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map); + +#else + +static int inline pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map) +{ + return -ENODEV; +} + +#endif