From patchwork Thu Mar 1 17:36:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liviu Dudau X-Patchwork-Id: 130354 Delivered-To: patch@linaro.org Received: by 10.80.172.228 with SMTP id x91csp3081612edc; Thu, 1 Mar 2018 09:36:40 -0800 (PST) X-Google-Smtp-Source: AG47ELttS+NjG/czDIdZ2PP5BZM6t5zesnj758iyKyf3wK3c0o7eGjUvDNCF8TVWyS4nUDfCa7g3 X-Received: by 2002:a17:902:48c8:: with SMTP id u8-v6mr2642106plh.306.1519925800275; Thu, 01 Mar 2018 09:36:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519925800; cv=none; d=google.com; s=arc-20160816; b=Vf8dM9j3Zost1CjjzsVjKdH8XB4EGnoWkWrPvX2PcRVuf76K7RffSks31KkVckoHQZ TqhN8lmYjil8F0Se+fmddLjMGBq4KJG09JbkwTr+NzsW3Oxali0AR7Gk3YqubZ8l4WNF SoDoF9cqD1oPlXzlI95FmlGWk3hmwxNE8SRO8Wm27uYxDvelaFy5opdRscXShnJUNqTH itUlVyBIh0UHb/mqDRZmwRvOW+m4Z5oiBu7tZSFu5N3LYRs2NN+uirqO9cNWJ+2a8A7M 5yCLtsSaSWZgQ6g7PsiJSgyGaPTl7ZI8RTkElLcMC/s8wxhECRCFDmUXTekICjsWHM9z CiXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=bmNr5DsviZvh3Tdc3jZrOktbX7DTbCMEdQgyT6jZq/w=; b=0v1BmXdUm1DTAmjL4V9Cmfmrv1YUhyi2TJQG2bN0TQiDRXOSFby1Qa+4GVDDB5P+Ht KoVXCW3sgiFj0+blWsppogKpg9uQQKdqzx+VIryJ7/vXa58sDtDdE4haxV+XXhlnwUZ+ C8BOdLNErU0Fp17B/gSrMkJFtq6mAJpdoVtPQ5Wt3gHtDqNWPwwtjmmOmmF1U1+CtcKV H1oey4OH2OsLBa7ZBUatKHNtJNXrGC8G7QSnTlnziEE3LbcWchP7l38NBL/PTaeixUV6 e6wRNlthd+y8Vw/R+r5Xoko8d2rIm7Pi0OMHNwfmfMbpDhyu9BK8xGM/GCCqMZxF5JWG RJ4g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id n20si2722388pgv.214.2018.03.01.09.36.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 01 Mar 2018 09:36:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7E7DE6ED24; Thu, 1 Mar 2018 17:36:38 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by gabe.freedesktop.org (Postfix) with ESMTPS id B699F6ED24 for ; Thu, 1 Mar 2018 17:36:37 +0000 (UTC) Received: from e110455-lin.cambridge.arm.com (e110455-lin.cambridge.arm.com [10.2.131.15]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id w21HaXTr004484; Thu, 1 Mar 2018 17:36:33 GMT From: Liviu Dudau To: Brian Starkey Subject: [PATCH] drm/mali-dp: Fix malidp_atomic_commit_hw_done() for event sending. Date: Thu, 1 Mar 2018 17:36:33 +0000 Message-Id: <20180301173633.9506-1-Liviu.Dudau@arm.com> X-Mailer: git-send-email 2.16.2 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Liviu Dudau , Alexandru-Cosmin Gheorghe , Mali DP Maintainers , LKML , DRI devel MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Mali DP hardware has a 'go' bit (config_valid) for making the new scene parameters active at the next page flip. The problem with the current code is that the driver first sets this bit and then proceeds to wait for confirmation from the hardware that the configuration has been updated before arming the vblank event. As config_valid is actually asserted by the hardware after the vblank event, during the prefetch phase, when we get to arming the vblank event we are going to send it at the next vblank, in effect halving the vblank rate from the userspace perspective. Fix it by sending the userspace event from the IRQ handler, when we handle the config_valid interrupt, which syncs with the time when the hardware is active with the new parameters. Reported-by: Alexandru-Cosmin Gheorghe Signed-off-by: Liviu Dudau --- drivers/gpu/drm/arm/malidp_drv.c | 27 ++++++++++++--------------- drivers/gpu/drm/arm/malidp_drv.h | 1 + drivers/gpu/drm/arm/malidp_hw.c | 12 +++++++++--- 3 files changed, 22 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c index d88a3b9d59cc..7be5d48eefd0 100644 --- a/drivers/gpu/drm/arm/malidp_drv.c +++ b/drivers/gpu/drm/arm/malidp_drv.c @@ -185,27 +185,26 @@ static int malidp_set_and_wait_config_valid(struct drm_device *drm) static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state) { - struct drm_pending_vblank_event *event; struct drm_device *drm = state->dev; struct malidp_drm *malidp = drm->dev_private; + malidp->event = malidp->crtc.state->event; + malidp->crtc.state->event = NULL; + + /* + * if we have an event to deliver to userspace, make sure + * the vblank is enabled as we are sending it from the IRQ + * handler. + */ + if (malidp->event) + drm_crtc_vblank_get(&malidp->crtc); + if (malidp->crtc.enabled) { /* only set config_valid if the CRTC is enabled */ - if (malidp_set_and_wait_config_valid(drm)) + if (malidp_set_and_wait_config_valid(drm) < 0) DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n"); } - event = malidp->crtc.state->event; - if (event) { - malidp->crtc.state->event = NULL; - - spin_lock_irq(&drm->event_lock); - if (drm_crtc_vblank_get(&malidp->crtc) == 0) - drm_crtc_arm_vblank_event(&malidp->crtc, event); - else - drm_crtc_send_vblank_event(&malidp->crtc, event); - spin_unlock_irq(&drm->event_lock); - } drm_atomic_helper_commit_hw_done(state); } @@ -232,8 +231,6 @@ static void malidp_atomic_commit_tail(struct drm_atomic_state *state) malidp_atomic_commit_hw_done(state); - drm_atomic_helper_wait_for_vblanks(drm, state); - pm_runtime_put(drm->dev); drm_atomic_helper_cleanup_planes(drm, state); diff --git a/drivers/gpu/drm/arm/malidp_drv.h b/drivers/gpu/drm/arm/malidp_drv.h index e0d12c9fc6b8..c2375bb49619 100644 --- a/drivers/gpu/drm/arm/malidp_drv.h +++ b/drivers/gpu/drm/arm/malidp_drv.h @@ -22,6 +22,7 @@ struct malidp_drm { struct malidp_hw_device *dev; struct drm_crtc crtc; wait_queue_head_t wq; + struct drm_pending_vblank_event *event; atomic_t config_valid; u32 core_id; }; diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c index 2bfb542135ac..8abd335ec313 100644 --- a/drivers/gpu/drm/arm/malidp_hw.c +++ b/drivers/gpu/drm/arm/malidp_hw.c @@ -782,9 +782,15 @@ static irqreturn_t malidp_de_irq(int irq, void *arg) /* first handle the config valid IRQ */ dc_status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS); if (dc_status & hw->map.dc_irq_map.vsync_irq) { - /* we have a page flip event */ - atomic_set(&malidp->config_valid, 1); malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, dc_status); + /* do we have a page flip event? */ + if (malidp->event != NULL) { + spin_lock(&drm->event_lock); + drm_crtc_send_vblank_event(&malidp->crtc, malidp->event); + malidp->event = NULL; + spin_unlock(&drm->event_lock); + } + atomic_set(&malidp->config_valid, 1); ret = IRQ_WAKE_THREAD; } @@ -794,7 +800,7 @@ static irqreturn_t malidp_de_irq(int irq, void *arg) mask = malidp_hw_read(hwdev, MALIDP_REG_MASKIRQ); status &= mask; - if (status & de->vsync_irq) + if ((status & de->vsync_irq) && malidp->crtc.enabled) drm_crtc_handle_vblank(&malidp->crtc); malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, status);