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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id w8sm1769903qts.50.2021.01.20.10.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 10:48:45 -0800 (PST) From: Thara Gopinath To: herbert@gondor.apana.org.au, davem@davemloft.net, bjorn.andersson@linaro.org Cc: ebiggers@google.com, ardb@kernel.org, sivaprak@codeaurora.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/6] drivers: crypto: qce: sha: Restore/save ahash state with custom struct in export/import Date: Wed, 20 Jan 2021 13:48:38 -0500 Message-Id: <20210120184843.3217775-2-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120184843.3217775-1-thara.gopinath@linaro.org> References: <20210120184843.3217775-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Export and import interfaces save and restore partial transformation states. The partial states were being stored and restored in struct sha1_state for sha1/hmac(sha1) transformations and sha256_state for sha256/hmac(sha256) transformations.This led to a bunch of corner cases where improper state was being stored and restored. A few of the corner cases that turned up during testing are: - wrong byte_count restored if export/import is called twice without h/w transaction in between - wrong buflen restored back if the pending buffer length is exactly the block size. - wrong state restored if buffer length is 0. To fix these issues, save and restore the partial transformation state using the newly introduced qce_sha_saved_state struct. This ensures that all the pieces required to properly restart the transformation is captured and restored back Signed-off-by: Thara Gopinath --- v1->v2: - Introduced custom struct qce_sha_saved_state to store and restore partial sha transformation. v1 was re-using qce_sha_reqctx to save and restore partial states and this could lead to potential memcpy issues around pointer copying. drivers/crypto/qce/sha.c | 122 +++++++++++---------------------------- 1 file changed, 34 insertions(+), 88 deletions(-) -- 2.25.1 Reported-by: kernel test robot diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c index 61c418c12345..08aed03e2b59 100644 --- a/drivers/crypto/qce/sha.c +++ b/drivers/crypto/qce/sha.c @@ -12,9 +12,15 @@ #include "core.h" #include "sha.h" -/* crypto hw padding constant for first operation */ -#define SHA_PADDING 64 -#define SHA_PADDING_MASK (SHA_PADDING - 1) +struct qce_sha_saved_state { + u8 pending_buf[QCE_SHA_MAX_BLOCKSIZE]; + u8 partial_digest[QCE_SHA_MAX_DIGESTSIZE]; + __be32 byte_count[2]; + unsigned int pending_buflen; + unsigned int flags; + u64 count; + bool first_blk; +}; static LIST_HEAD(ahash_algs); @@ -139,97 +145,37 @@ static int qce_ahash_init(struct ahash_request *req) static int qce_ahash_export(struct ahash_request *req, void *out) { - struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct qce_sha_reqctx *rctx = ahash_request_ctx(req); - unsigned long flags = rctx->flags; - unsigned int digestsize = crypto_ahash_digestsize(ahash); - unsigned int blocksize = - crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash)); - - if (IS_SHA1(flags) || IS_SHA1_HMAC(flags)) { - struct sha1_state *out_state = out; - - out_state->count = rctx->count; - qce_cpu_to_be32p_array((__be32 *)out_state->state, - rctx->digest, digestsize); - memcpy(out_state->buffer, rctx->buf, blocksize); - } else if (IS_SHA256(flags) || IS_SHA256_HMAC(flags)) { - struct sha256_state *out_state = out; - - out_state->count = rctx->count; - qce_cpu_to_be32p_array((__be32 *)out_state->state, - rctx->digest, digestsize); - memcpy(out_state->buf, rctx->buf, blocksize); - } else { - return -EINVAL; - } - - return 0; -} - -static int qce_import_common(struct ahash_request *req, u64 in_count, - const u32 *state, const u8 *buffer, bool hmac) -{ - struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); - struct qce_sha_reqctx *rctx = ahash_request_ctx(req); - unsigned int digestsize = crypto_ahash_digestsize(ahash); - unsigned int blocksize; - u64 count = in_count; - - blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(ahash)); - rctx->count = in_count; - memcpy(rctx->buf, buffer, blocksize); - - if (in_count <= blocksize) { - rctx->first_blk = 1; - } else { - rctx->first_blk = 0; - /* - * For HMAC, there is a hardware padding done when first block - * is set. Therefore the byte_count must be incremened by 64 - * after the first block operation. - */ - if (hmac) - count += SHA_PADDING; - } + struct qce_sha_saved_state *export_state = out; - rctx->byte_count[0] = (__force __be32)(count & ~SHA_PADDING_MASK); - rctx->byte_count[1] = (__force __be32)(count >> 32); - qce_cpu_to_be32p_array((__be32 *)rctx->digest, (const u8 *)state, - digestsize); - rctx->buflen = (unsigned int)(in_count & (blocksize - 1)); + memcpy(export_state->pending_buf, rctx->buf, rctx->buflen); + memcpy(export_state->partial_digest, rctx->digest, + sizeof(rctx->digest)); + memcpy(export_state->byte_count, rctx->byte_count, 2); + export_state->pending_buflen = rctx->buflen; + export_state->count = rctx->count; + export_state->first_blk = rctx->first_blk; + export_state->flags = rctx->flags; return 0; } static int qce_ahash_import(struct ahash_request *req, const void *in) { - struct qce_sha_reqctx *rctx; - unsigned long flags; - bool hmac; - int ret; - - ret = qce_ahash_init(req); - if (ret) - return ret; - - rctx = ahash_request_ctx(req); - flags = rctx->flags; - hmac = IS_SHA_HMAC(flags); - - if (IS_SHA1(flags) || IS_SHA1_HMAC(flags)) { - const struct sha1_state *state = in; - - ret = qce_import_common(req, state->count, state->state, - state->buffer, hmac); - } else if (IS_SHA256(flags) || IS_SHA256_HMAC(flags)) { - const struct sha256_state *state = in; + struct qce_sha_reqctx *rctx = ahash_request_ctx(req); + struct qce_sha_saved_state *import_state = in; - ret = qce_import_common(req, state->count, state->state, - state->buf, hmac); - } + memset(rctx, 0, sizeof(*rctx)); + rctx->count = import_state->count; + rctx->buflen = import_state->pending_buflen; + rctx->first_blk = import_state->first_blk; + rctx->flags = import_state->flags; + memcpy(rctx->buf, import_state->pending_buf, rctx->buflen); + memcpy(rctx->digest, import_state->partial_digest, + sizeof(rctx->digest)); + memcpy(rctx->byte_count, import_state->byte_count, 2); - return ret; + return 0; } static int qce_ahash_update(struct ahash_request *req) @@ -450,7 +396,7 @@ static const struct qce_ahash_def ahash_def[] = { .drv_name = "sha1-qce", .digestsize = SHA1_DIGEST_SIZE, .blocksize = SHA1_BLOCK_SIZE, - .statesize = sizeof(struct sha1_state), + .statesize = sizeof(struct qce_sha_saved_state), .std_iv = std_iv_sha1, }, { @@ -459,7 +405,7 @@ static const struct qce_ahash_def ahash_def[] = { .drv_name = "sha256-qce", .digestsize = SHA256_DIGEST_SIZE, .blocksize = SHA256_BLOCK_SIZE, - .statesize = sizeof(struct sha256_state), + .statesize = sizeof(struct qce_sha_saved_state), .std_iv = std_iv_sha256, }, { @@ -468,7 +414,7 @@ static const struct qce_ahash_def ahash_def[] = { .drv_name = "hmac-sha1-qce", .digestsize = SHA1_DIGEST_SIZE, .blocksize = SHA1_BLOCK_SIZE, - .statesize = sizeof(struct sha1_state), + .statesize = sizeof(struct qce_sha_saved_state), .std_iv = std_iv_sha1, }, { @@ -477,7 +423,7 @@ static const struct qce_ahash_def ahash_def[] = { .drv_name = "hmac-sha256-qce", .digestsize = SHA256_DIGEST_SIZE, .blocksize = SHA256_BLOCK_SIZE, - .statesize = sizeof(struct sha256_state), + .statesize = sizeof(struct qce_sha_saved_state), .std_iv = std_iv_sha256, }, }; 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id w8sm1769903qts.50.2021.01.20.10.48.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 10:48:46 -0800 (PST) From: Thara Gopinath To: herbert@gondor.apana.org.au, davem@davemloft.net, bjorn.andersson@linaro.org Cc: ebiggers@google.com, ardb@kernel.org, sivaprak@codeaurora.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/6] drivers: crypto: qce: sha: Hold back a block of data to be transferred as part of final Date: Wed, 20 Jan 2021 13:48:39 -0500 Message-Id: <20210120184843.3217775-3-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120184843.3217775-1-thara.gopinath@linaro.org> References: <20210120184843.3217775-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org If the available data to transfer is exactly a multiple of block size, save the last block to be transferred in qce_ahash_final (with the last block bit set) if this is indeed the end of data stream. If not this saved block will be transferred as part of next update. If this block is not held back and if this is indeed the end of data stream, the digest obtained will be wrong since qce_ahash_final will see that rctx->buflen is 0 and return doing nothing which in turn means that a digest will not be copied to the destination result buffer. qce_ahash_final cannot be made to alter this behavior and allowed to proceed if rctx->buflen is 0 because the crypto engine BAM does not allow for zero length transfers. Signed-off-by: Thara Gopinath --- drivers/crypto/qce/sha.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.25.1 Reviewed-by: Bjorn Andersson diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c index 08aed03e2b59..dd263c5e4dd8 100644 --- a/drivers/crypto/qce/sha.c +++ b/drivers/crypto/qce/sha.c @@ -216,6 +216,25 @@ static int qce_ahash_update(struct ahash_request *req) /* calculate how many bytes will be hashed later */ hash_later = total % blocksize; + + /* + * At this point, there is more than one block size of data. If + * the available data to transfer is exactly a multiple of block + * size, save the last block to be transferred in qce_ahash_final + * (with the last block bit set) if this is indeed the end of data + * stream. If not this saved block will be transferred as part of + * next update. If this block is not held back and if this is + * indeed the end of data stream, the digest obtained will be wrong + * since qce_ahash_final will see that rctx->buflen is 0 and return + * doing nothing which in turn means that a digest will not be + * copied to the destination result buffer. qce_ahash_final cannot + * be made to alter this behavior and allowed to proceed if + * rctx->buflen is 0 because the crypto engine BAM does not allow + * for zero length transfers. + */ + if (!hash_later) + hash_later = blocksize; + if (hash_later) { unsigned int src_offset = req->nbytes - hash_later; scatterwalk_map_and_copy(rctx->buf, req->src, src_offset, From patchwork Wed Jan 20 18:48:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 367072 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp726903jam; Wed, 20 Jan 2021 10:52:11 -0800 (PST) X-Google-Smtp-Source: ABdhPJzovnUCVq1B5vqpJyZgU8i+0zNNtNOtdBqFF5Mhr7n1aXZhpRFVLsOdPCfncCFi9m73QnJV X-Received: by 2002:aa7:db49:: with SMTP id n9mr8685625edt.73.1611168731829; Wed, 20 Jan 2021 10:52:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611168731; cv=none; d=google.com; s=arc-20160816; b=sPKBsOl4riJS2hPoTKYfC0YNTB8mBRhvaDdX2f+7ElQrYKQsD3c4RnPqotj3mLTPOk jIPWNUjLFBIE/RNU1vApsIwDM3SSI3zejDDQ0B06gguJZ0W2KV0GDEmpTREn2/MHnhkw BSMZ372DeKGeb64DP29/M7EzeYIMzuQJrqQWM9Mf6LnQxAKZXJIbV8kZ6ehXVfT/FlvO N+qCu4Y5Y9C3X76HYZr1j0C8H6R2osZNeUQhqfCw28ryifEDW9Hnn65a8U/LjUpg0ftG +iJrK8ah1hOLFMrM/5oXmOWg1j1xrd4l/DL3YuPAtj73H0/t5ZFt6DI2brof1lceZ821 lyzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1e7KxCkB9ALHgGjl5vPgq64Nql5G6JqmYVRXhWLnCVk=; b=Lf0OE7VnLFZS5B0lJ94dyBwsxvDRmAL4lZXm/IodLT+AkDovhll9dz0OgjVeter7iX 1aCDxbgsDS41b15IRWA6A25rRNkXQVZ6MeFc1ioL5qEQ6tSaNqAm23PATesvBeOiqgRN A5J22j7zOwK2oBk+JO+QqiMOOw7zi6FyOH/DGWCuCkYfclqn7sLEjKIM0CHdyLX8k57V LMb0q82I+tXb35nB88NgsUyyLIqcV831tQUFVFQQU5JJHMossxo/u+za9UBv12gWlLcb Fxm88A+c1k9rVwpncovS9EQ2GWcnZa3KAwrgcsTTU8YiYmj/HKCN28Qg7WzS4nUBXS6z ZrfA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=o5f0+xX5; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id w8sm1769903qts.50.2021.01.20.10.48.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 10:48:47 -0800 (PST) From: Thara Gopinath To: herbert@gondor.apana.org.au, davem@davemloft.net, bjorn.andersson@linaro.org Cc: ebiggers@google.com, ardb@kernel.org, sivaprak@codeaurora.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/6] drivers: crypto: qce: skcipher: Fix regressions found during fuzz testing Date: Wed, 20 Jan 2021 13:48:40 -0500 Message-Id: <20210120184843.3217775-4-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120184843.3217775-1-thara.gopinath@linaro.org> References: <20210120184843.3217775-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org This patch contains the following fixes for the supported encryption algorithms in the Qualcomm crypto engine(CE) 1. Return unsupported if key1 = key2 for AES XTS algorithm since CE does not support this and the operation causes the engine to hang. 2. Return unsupported if any three keys are same for DES3 algorithms since CE does not support this and the operation causes the engine to hang. 3. Return unsupported for 0 length plain texts since crypto engine BAM dma does not support 0 length data. 4. ECB messages do not have an IV and hence set the ivsize to 0. 5. Ensure that the data passed for ECB/CBC encryption/decryption is blocksize aligned. Otherwise the CE hangs on the operation. 6. Allow messages of length less that 512 bytes for all other encryption algorithms other than AES XTS. The recommendation is only for AES XTS to have data size greater than 512 bytes. Signed-off-by: Thara Gopinath --- v2->v3: - Made the comparison between keys to check if any two keys are same for triple des algorithms constant-time as per Nym Seddon's suggestion. drivers/crypto/qce/skcipher.c | 68 ++++++++++++++++++++++++++++++----- 1 file changed, 60 insertions(+), 8 deletions(-) -- 2.25.1 diff --git a/drivers/crypto/qce/skcipher.c b/drivers/crypto/qce/skcipher.c index a2d3da0ad95f..d78b932441ab 100644 --- a/drivers/crypto/qce/skcipher.c +++ b/drivers/crypto/qce/skcipher.c @@ -167,16 +167,32 @@ static int qce_skcipher_setkey(struct crypto_skcipher *ablk, const u8 *key, struct crypto_tfm *tfm = crypto_skcipher_tfm(ablk); struct qce_cipher_ctx *ctx = crypto_tfm_ctx(tfm); unsigned long flags = to_cipher_tmpl(ablk)->alg_flags; + unsigned int __keylen; int ret; if (!key || !keylen) return -EINVAL; - switch (IS_XTS(flags) ? keylen >> 1 : keylen) { + /* + * AES XTS key1 = key2 not supported by crypto engine. + * Revisit to request a fallback cipher in this case. + */ + if (IS_XTS(flags)) { + __keylen = keylen >> 1; + if (!memcmp(key, key + __keylen, __keylen)) + return -EINVAL; + } else { + __keylen = keylen; + } + switch (__keylen) { case AES_KEYSIZE_128: case AES_KEYSIZE_256: memcpy(ctx->enc_key, key, keylen); break; + case AES_KEYSIZE_192: + break; + default: + return -EINVAL; } ret = crypto_skcipher_setkey(ctx->fallback, key, keylen); @@ -204,12 +220,27 @@ static int qce_des3_setkey(struct crypto_skcipher *ablk, const u8 *key, unsigned int keylen) { struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(ablk); + u32 _key[6]; int err; err = verify_skcipher_des3_key(ablk, key); if (err) return err; + /* + * The crypto engine does not support any two keys + * being the same for triple des algorithms. The + * verify_skcipher_des3_key does not check for all the + * below conditions. Return -ENOKEY in case any two keys + * are the same. Revisit to see if a fallback cipher + * is needed to handle this condition. + */ + memcpy(_key, key, DES3_EDE_KEY_SIZE); + if (!((_key[0] ^ _key[2]) | (_key[1] ^ _key[3])) | + !((_key[2] ^ _key[4]) | (_key[3] ^ _key[5])) | + !((_key[0] ^ _key[4]) | (_key[1] ^ _key[5]))) + return -ENOKEY; + ctx->enc_keylen = keylen; memcpy(ctx->enc_key, key, keylen); return 0; @@ -221,6 +252,7 @@ static int qce_skcipher_crypt(struct skcipher_request *req, int encrypt) struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req); struct qce_alg_template *tmpl = to_cipher_tmpl(tfm); + unsigned int blocksize = crypto_skcipher_blocksize(tfm); int keylen; int ret; @@ -228,14 +260,34 @@ static int qce_skcipher_crypt(struct skcipher_request *req, int encrypt) rctx->flags |= encrypt ? QCE_ENCRYPT : QCE_DECRYPT; keylen = IS_XTS(rctx->flags) ? ctx->enc_keylen >> 1 : ctx->enc_keylen; - /* qce is hanging when AES-XTS request len > QCE_SECTOR_SIZE and - * is not a multiple of it; pass such requests to the fallback + /* CE does not handle 0 length messages */ + if (!req->cryptlen) + return -EINVAL; + + /* + * ECB and CBC algorithms require message lengths to be + * multiples of block size. + * TODO: The spec says AES CBC mode for certain versions + * of crypto engine can handle partial blocks as well. + * Test and enable such messages. + */ + if (IS_ECB(rctx->flags) || IS_CBC(rctx->flags)) + if (!IS_ALIGNED(req->cryptlen, blocksize)) + return -EINVAL; + + /* + * Conditions for requesting a fallback cipher + * AES-192 (not supported by crypto engine (CE)) + * AES-XTS request with len <= 512 byte (not recommended to use CE) + * AES-XTS request with len > QCE_SECTOR_SIZE and + * is not a multiple of it.(Revisit this condition to check if it is + * needed in all versions of CE) */ if (IS_AES(rctx->flags) && - (((keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_256) || - req->cryptlen <= aes_sw_max_len) || - (IS_XTS(rctx->flags) && req->cryptlen > QCE_SECTOR_SIZE && - req->cryptlen % QCE_SECTOR_SIZE))) { + ((keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_256) || + (IS_XTS(rctx->flags) && ((req->cryptlen <= aes_sw_max_len) || + (req->cryptlen > QCE_SECTOR_SIZE && + req->cryptlen % QCE_SECTOR_SIZE))))) { skcipher_request_set_tfm(&rctx->fallback_req, ctx->fallback); skcipher_request_set_callback(&rctx->fallback_req, req->base.flags, @@ -307,7 +359,7 @@ static const struct qce_skcipher_def skcipher_def[] = { .name = "ecb(aes)", .drv_name = "ecb-aes-qce", .blocksize = AES_BLOCK_SIZE, - .ivsize = AES_BLOCK_SIZE, + .ivsize = 0, .min_keysize = AES_MIN_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE, }, From patchwork Wed Jan 20 18:48:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 367075 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp745659jam; Wed, 20 Jan 2021 11:19:31 -0800 (PST) X-Google-Smtp-Source: ABdhPJxz1C9jSCr5wEck/lnIK1yEV3AYeKMQ0N/0OJaOoK70Hu2WQ7El5PTOI1bj8b7G0bImeoJi X-Received: by 2002:a50:9f4d:: with SMTP id b71mr8500022edf.310.1611170371499; Wed, 20 Jan 2021 11:19:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611170371; cv=none; d=google.com; s=arc-20160816; b=Ho3ewTe3qd4YXL1DSFb5A7iLNE8tz9Nuaz36tmvosblyJs0W7KTg7wBtqbEVIEFPxU 3Owivwhk0Pjb9JEWyR8Po0u6SxJo4EbXFDiHE6gWW7TmI6g3ORKmFJ4ytzf/nm8WZNgb Tu//bPSj6YPjPKv5vtO5FeDMzJEM8E8QCq0TbYlm7peRmIMm5ZpqGvQrQ0t7RqJ+9Yq7 Q/tlVXhfpx0qFqnucGZhibbqVPSx5BE+2Z9gmS6LCoBDePMzpuJDdQrTJP7USlp3T762 HisKqRyAZsiNbYaFaRC6dp+ykCKzBtytnbNOSver4XXrRjxSfz/oQ0zcFjoNenP+JtwS tqkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4ckoNO1YJt5QKI0zTcMaiAvFZHq1fWNUxmCXeDkmSik=; b=zBxdbybIaKE7DXc9K8kjLJ2qDa1cJSkcBeYHrCv/EAqasz4/4YdJCMjnCplBS/HGQf cZzCDYjXoxlmjXWhKj+rj6Kbf0mRqYEFOuB7TpbVnrDrcm+D17+NtvE6VGOMZwc9MUIm 2U4KyJAkNheKvUrcHNYcYKjdJU4vCSKh7zF5LUK8NNLM8Xc3Or7HRPptYpRqVwXKx8CX MyKGnBLvyucrF3y7yYGBDtlnPa2Z+utj6F+9wnk6oVT08sbclkBY7o/0HxqWr2nPveLN GNt8wqJBox/WMU033UX+3gP9CbpCAjHlJOdDTA3K2QlIfxkuOn/QaV0uTzp8F7Mb5ffZ si3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sPpCMyU5; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id w8sm1769903qts.50.2021.01.20.10.48.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 10:48:48 -0800 (PST) From: Thara Gopinath To: herbert@gondor.apana.org.au, davem@davemloft.net, bjorn.andersson@linaro.org Cc: ebiggers@google.com, ardb@kernel.org, sivaprak@codeaurora.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/6] drivers: crypto: qce: common: Set data unit size to message length for AES XTS transformation Date: Wed, 20 Jan 2021 13:48:41 -0500 Message-Id: <20210120184843.3217775-5-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120184843.3217775-1-thara.gopinath@linaro.org> References: <20210120184843.3217775-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Set the register REG_ENCR_XTS_DU_SIZE to cryptlen for AES XTS transformation. Anything else causes the engine to return back wrong results. Signed-off-by: Thara Gopinath --- drivers/crypto/qce/common.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.25.1 Acked-by: Bjorn Andersson diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c index a73db2a5637f..f7bc701a4aa2 100644 --- a/drivers/crypto/qce/common.c +++ b/drivers/crypto/qce/common.c @@ -295,15 +295,15 @@ static void qce_xtskey(struct qce_device *qce, const u8 *enckey, { u32 xtskey[QCE_MAX_CIPHER_KEY_SIZE / sizeof(u32)] = {0}; unsigned int xtsklen = enckeylen / (2 * sizeof(u32)); - unsigned int xtsdusize; qce_cpu_to_be32p_array((__be32 *)xtskey, enckey + enckeylen / 2, enckeylen / 2); qce_write_array(qce, REG_ENCR_XTS_KEY0, xtskey, xtsklen); - /* xts du size 512B */ - xtsdusize = min_t(u32, QCE_SECTOR_SIZE, cryptlen); - qce_write(qce, REG_ENCR_XTS_DU_SIZE, xtsdusize); + /* Set data unit size to cryptlen. Anything else causes + * crypto engine to return back incorrect results. + */ + qce_write(qce, REG_ENCR_XTS_DU_SIZE, cryptlen); } static int qce_setup_regs_skcipher(struct crypto_async_request *async_req, From patchwork Wed Jan 20 18:48:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 367074 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp745652jam; Wed, 20 Jan 2021 11:19:31 -0800 (PST) X-Google-Smtp-Source: ABdhPJxYkm+8m7MamEWFV34aaUVHvHaotKTJIpNvVGAdCXiivsseE5GvrHR4hNG0JGgiUrCpnb3Y X-Received: by 2002:a05:6402:70f:: with SMTP id w15mr8691379edx.121.1611170371167; Wed, 20 Jan 2021 11:19:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611170371; cv=none; d=google.com; s=arc-20160816; b=paPwqql8PbGZwsjhYqcbIrHXogNuo3tes4Jixu7QwUUojd04YAz1Azr89FHH9YMePy 1PnDi1mVzofezCy4DOUO3vZZYz/OVoc2puS8Mi1IJHO/2I1bi7nnG91Cq2gIMeV0IlnC RoCoShMlAl0HsahggmFMp1tCN7N49S/3RBCJbvp3PwNw3lPCZM3hjiEftqrkFY97+W09 n9G9cFDWoG4nHBy2eKfzWrQg72938foWhcYDKllBpQR22sK1iv80sIc0sTCiFEkXeG+L M90ZbpzpjMZyJ478NDmgIz+MO7qR9jjuSYMyYkp0z0yXHg6n/SuteQRAO3T3rLD3kFUQ GMfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YJE2aPOEkLIKEj61l27Ctrd7+4+SFwAw4jzWQDD0G1c=; b=AxFIPSzJTQxXanlEhac4JwF9FBWGlhW1AZXgQby+k9CWcZBu6tGxI0Ufdscj/haPDc RmJ5xwupmZ33r0d6GVb0jJq/JJx96iM2v7CHHfwUTjJlpHOD4D8TLXZXWhdUMMFON1c6 X4mqmjUFBkEUC2pFaCfEJJMFt+bczc2a7/AC9yLTMm/ZQ1p89QmQ2HYd5N+2pZuDXXYk AB5HYoyFoAZschfMIAe5dxv2qMINKnn2qeZIlRYPtw1/QX0hDMZchiXQr58SBSVlksEs +4FR62/vKEHXcRXId2YWCgaB0C53nMsj274Yq/pOZYpSaAg6XniDUpbP6m3FE8qNOQRb 6byw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m6OwLILH; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id w8sm1769903qts.50.2021.01.20.10.48.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 10:48:50 -0800 (PST) From: Thara Gopinath To: herbert@gondor.apana.org.au, davem@davemloft.net, bjorn.andersson@linaro.org Cc: ebiggers@google.com, ardb@kernel.org, sivaprak@codeaurora.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/6] drivers: crypto: qce: Remover src_tbl from qce_cipher_reqctx Date: Wed, 20 Jan 2021 13:48:42 -0500 Message-Id: <20210120184843.3217775-6-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120184843.3217775-1-thara.gopinath@linaro.org> References: <20210120184843.3217775-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org src_table is unused and hence remove it from struct qce_cipher_reqctx Signed-off-by: Thara Gopinath --- drivers/crypto/qce/cipher.h | 1 - 1 file changed, 1 deletion(-) -- 2.25.1 diff --git a/drivers/crypto/qce/cipher.h b/drivers/crypto/qce/cipher.h index cffa9fc628ff..850f257d00f3 100644 --- a/drivers/crypto/qce/cipher.h +++ b/drivers/crypto/qce/cipher.h @@ -40,7 +40,6 @@ struct qce_cipher_reqctx { struct scatterlist result_sg; struct sg_table dst_tbl; struct scatterlist *dst_sg; - struct sg_table src_tbl; struct scatterlist *src_sg; unsigned int cryptlen; struct skcipher_request fallback_req; // keep at the end From patchwork Wed Jan 20 18:48:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 367073 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp744689jam; Wed, 20 Jan 2021 11:18:04 -0800 (PST) X-Google-Smtp-Source: ABdhPJx3V21yhau+19BYs3pvl9XWX6XbED6606nuyxwHlY+IdGtCuiy1v7iVON7spBTpkpYqxA9/ X-Received: by 2002:a50:d491:: with SMTP id s17mr8297014edi.169.1611170284490; Wed, 20 Jan 2021 11:18:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611170284; cv=none; d=google.com; s=arc-20160816; b=OPUZem7XqYn/osW0DP+zrc4wVeH+WTN7NssQEiICD9gJwLgjtzsMywyldt+TrqNUcJ Pg8tEDoEheFZ/HPR1SooigjstLLcsgbHQY7AhmDz+olNWvMfZzA4awrAnaQOQGiJtwHV T5OJ1/5Fl36SwZuo92P7oo/6zM1STGSpRzLg5T0UNi0LvvsGqSXDKT0A2pdwDih/kMoQ G3AN1WyCg/OuGtBt3qEJLsb+3htFeqiv+9gHSEj28ADPK8o/qquDTwh9XjR3jxlMjqsq fN0z0zMqCU1oDgC7hBuOFLeEIsS5GL+he9Qr5v9B380K5HSxEEVZJn7TGNgsTfBlCXOO BOpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9Nywttu3tkLGv6x/bZ3lsaXiaIubIpPmLGtZ6J79D6I=; b=UPIA+ig1AKguxmssLTKtoVL59mDk60KaVsudCexzGVoSTwRye6i+HkpWNIsDOAXdai IkX7W7DMfGfxF5ItgO9mTc+14qPWz3evieEvHScOzP/dwjBz8hEmjcp5kZIGw6YR9KTg N1/JAPToSdCT9H74xgf15ekdbG+OPuQqld+XKoRY6X4BfaM/w5xMGXAzV2C/qRkF7mUC 6W2fPgqbnxD296Z7jXJmxx/tB/gNipQcgyedn3Wfbm0n95n4nbPUUChN+aWRf2eGIi29 z8Vmyz1NzuDZTZspRb5Gg7/Z8RbY5R2nSPuVebJp3khKU/1U9glGQ3y4UB3zGPKA9x6p FzkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EqXp77x4; spf=pass (google.com: domain of linux-crypto-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id w8sm1769903qts.50.2021.01.20.10.48.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 10:48:51 -0800 (PST) From: Thara Gopinath To: herbert@gondor.apana.org.au, davem@davemloft.net, bjorn.andersson@linaro.org Cc: ebiggers@google.com, ardb@kernel.org, sivaprak@codeaurora.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 6/6] drivers: crypto: qce: Remove totallen and offset in qce_start Date: Wed, 20 Jan 2021 13:48:43 -0500 Message-Id: <20210120184843.3217775-7-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210120184843.3217775-1-thara.gopinath@linaro.org> References: <20210120184843.3217775-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org totallen is used to get the size of the data to be transformed. This is also available via nbytes or cryptlen in the qce_sha_reqctx and qce_cipher_ctx. Similarly offset convey nothing for the supported encryption and authentication transformations and is always 0. Remove these two redundant parameters in qce_start. Signed-off-by: Thara Gopinath --- drivers/crypto/qce/common.c | 17 +++++++---------- drivers/crypto/qce/common.h | 3 +-- drivers/crypto/qce/sha.c | 2 +- drivers/crypto/qce/skcipher.c | 2 +- 4 files changed, 10 insertions(+), 14 deletions(-) -- 2.25.1 Reviewed-by: Bjorn Andersson diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c index f7bc701a4aa2..dceb9579d87a 100644 --- a/drivers/crypto/qce/common.c +++ b/drivers/crypto/qce/common.c @@ -140,8 +140,7 @@ static u32 qce_auth_cfg(unsigned long flags, u32 key_size) return cfg; } -static int qce_setup_regs_ahash(struct crypto_async_request *async_req, - u32 totallen, u32 offset) +static int qce_setup_regs_ahash(struct crypto_async_request *async_req) { struct ahash_request *req = ahash_request_cast(async_req); struct crypto_ahash *ahash = __crypto_ahash_cast(async_req->tfm); @@ -306,8 +305,7 @@ static void qce_xtskey(struct qce_device *qce, const u8 *enckey, qce_write(qce, REG_ENCR_XTS_DU_SIZE, cryptlen); } -static int qce_setup_regs_skcipher(struct crypto_async_request *async_req, - u32 totallen, u32 offset) +static int qce_setup_regs_skcipher(struct crypto_async_request *async_req) { struct skcipher_request *req = skcipher_request_cast(async_req); struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req); @@ -367,7 +365,7 @@ static int qce_setup_regs_skcipher(struct crypto_async_request *async_req, qce_write(qce, REG_ENCR_SEG_CFG, encr_cfg); qce_write(qce, REG_ENCR_SEG_SIZE, rctx->cryptlen); - qce_write(qce, REG_ENCR_SEG_START, offset & 0xffff); + qce_write(qce, REG_ENCR_SEG_START, 0); if (IS_CTR(flags)) { qce_write(qce, REG_CNTR_MASK, ~0); @@ -376,7 +374,7 @@ static int qce_setup_regs_skcipher(struct crypto_async_request *async_req, qce_write(qce, REG_CNTR_MASK2, ~0); } - qce_write(qce, REG_SEG_SIZE, totallen); + qce_write(qce, REG_SEG_SIZE, rctx->cryptlen); /* get little endianness */ config = qce_config_reg(qce, 1); @@ -388,17 +386,16 @@ static int qce_setup_regs_skcipher(struct crypto_async_request *async_req, } #endif -int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen, - u32 offset) +int qce_start(struct crypto_async_request *async_req, u32 type) { switch (type) { #ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER case CRYPTO_ALG_TYPE_SKCIPHER: - return qce_setup_regs_skcipher(async_req, totallen, offset); + return qce_setup_regs_skcipher(async_req); #endif #ifdef CONFIG_CRYPTO_DEV_QCE_SHA case CRYPTO_ALG_TYPE_AHASH: - return qce_setup_regs_ahash(async_req, totallen, offset); + return qce_setup_regs_ahash(async_req); #endif default: return -EINVAL; diff --git a/drivers/crypto/qce/common.h b/drivers/crypto/qce/common.h index 85ba16418a04..3bc244bcca2d 100644 --- a/drivers/crypto/qce/common.h +++ b/drivers/crypto/qce/common.h @@ -94,7 +94,6 @@ struct qce_alg_template { void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len); int qce_check_status(struct qce_device *qce, u32 *status); void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step); -int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen, - u32 offset); +int qce_start(struct crypto_async_request *async_req, u32 type); #endif /* _COMMON_H_ */ diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c index dd263c5e4dd8..a079e92b4e75 100644 --- a/drivers/crypto/qce/sha.c +++ b/drivers/crypto/qce/sha.c @@ -113,7 +113,7 @@ static int qce_ahash_async_req_handle(struct crypto_async_request *async_req) qce_dma_issue_pending(&qce->dma); - ret = qce_start(async_req, tmpl->crypto_alg_type, 0, 0); + ret = qce_start(async_req, tmpl->crypto_alg_type); if (ret) goto error_terminate; diff --git a/drivers/crypto/qce/skcipher.c b/drivers/crypto/qce/skcipher.c index d78b932441ab..a93fd3fd5f1a 100644 --- a/drivers/crypto/qce/skcipher.c +++ b/drivers/crypto/qce/skcipher.c @@ -143,7 +143,7 @@ qce_skcipher_async_req_handle(struct crypto_async_request *async_req) qce_dma_issue_pending(&qce->dma); - ret = qce_start(async_req, tmpl->crypto_alg_type, req->cryptlen, 0); + ret = qce_start(async_req, tmpl->crypto_alg_type); if (ret) goto error_terminate;