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[66.175.222.153]) by smtp.gmail.com with ESMTPSA id m7sm4054075ool.29.2021.01.18.23.17.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Jan 2021 23:17:41 -0800 (PST) From: Jun Nie To: srinivas.kandagatla@linaro.org Subject: [PATCH] ASoC: qcom: lpass: Fix i2s ctl register bit map Date: Tue, 19 Jan 2021 15:17:18 +0800 Message-Id: <20210119071718.3867961-1-jun.nie@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Cc: Jun Nie , plai@codeaurora.org, bgoswami@codeaurora.org, alsa-devel@alsa-project.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Fix bitwidth mapping in i2s ctl register per APQ8016 document. Signed-off-by: Jun Nie --- sound/soc/qcom/lpass-apq8016.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c index 0aedb3a0a798..7c0e774ad062 100644 --- a/sound/soc/qcom/lpass-apq8016.c +++ b/sound/soc/qcom/lpass-apq8016.c @@ -250,7 +250,7 @@ static struct lpass_variant apq8016_data = { .micmode = REG_FIELD_ID(0x1000, 4, 7, 4, 0x1000), .micmono = REG_FIELD_ID(0x1000, 3, 3, 4, 0x1000), .wssrc = REG_FIELD_ID(0x1000, 2, 2, 4, 0x1000), - .bitwidth = REG_FIELD_ID(0x1000, 0, 0, 4, 0x1000), + .bitwidth = REG_FIELD_ID(0x1000, 0, 1, 4, 0x1000), .rdma_dyncclk = REG_FIELD_ID(0x8400, 12, 12, 2, 0x1000), .rdma_bursten = REG_FIELD_ID(0x8400, 11, 11, 2, 0x1000),