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[209.51.188.17]) by mx.google.com with ESMTPS id x2si20026449ybk.43.2021.01.19.00.39.23 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Jan 2021 00:39:23 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:33982 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l1mXq-00038e-U3 for patch@linaro.org; Tue, 19 Jan 2021 03:39:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34318) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l1mVV-0008HS-EW for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:36:57 -0500 Received: from mail-wm1-f49.google.com ([209.85.128.49]:35043) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l1mVT-0003Rc-P6 for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:36:57 -0500 Received: by mail-wm1-f49.google.com with SMTP id e15so9498886wme.0 for ; Tue, 19 Jan 2021 00:36:55 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UTQI37oR54GYDHZtQ+wpT20H2kBawm8mU+1wQ7QZ7Qw=; b=lZFvVuILz0BBVmtQzLvMTcVwFE5pdl38i5wsU3shbgujTEbT09JViXbSteUDq7Ugbx 9IY6TQIkZkfKSE8Htfii1uINMyyoSlbN07kUSyLa9+sd/vfRUoPZF0qXo/c8OBd+Nlnb sjbBTJwPGBt7k+f0F5j59GGTK22Wj3DuMLCeQlwWgFOfldyukE1s2UZAR8LdSamc8L1R kX3Ikfp2w8JpbL+6dOGVIu3nrgucF0rbVyaTPfIy6aLiBzeeArpgXyK/Rz7PeJiVIyjP cRCtxSY2BgiJ+wDBXbvUoLu+cWtqhpHdJt16LKb/SD77jJI4vy3/WPGdk0fXJqMU0Klg YmCQ== X-Gm-Message-State: AOAM5307UU9O2I2TV+PbVWLqYBhHsFTpbYe0YkqGu+UlZf5cF8MvFqya rEx2oG7RqMm3bM7Pw5esdeti0BpcHwg= X-Received: by 2002:a7b:c08f:: with SMTP id r15mr3027594wmh.22.1611045413789; Tue, 19 Jan 2021 00:36:53 -0800 (PST) Received: from localhost.localdomain (pd9e83aed.dip0.t-ipconnect.de. [217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:53 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 01/11] hw/m68k/next-cube: Make next_irq() function static Date: Tue, 19 Jan 2021 09:36:07 +0100 Message-Id: <20210119083617.6337-2-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.49; envelope-from=th.huth@gmail.com; helo=mail-wm1-f49.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The next_irq() function is global, but isn't actually used anywhere outside next-cube.c. Make it static. Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-2-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 2 +- include/hw/m68k/next-cube.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 37bc35dfa4..f622d6589c 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -724,7 +724,7 @@ static const MemoryRegionOps dma_ops = { * TODO: set the shift numbers as values in the enum, so the first switch * will not be needed */ -void next_irq(void *opaque, int number, int level) +static void next_irq(void *opaque, int number, int level) { M68kCPU *cpu = opaque; int shift = 0; diff --git a/include/hw/m68k/next-cube.h b/include/hw/m68k/next-cube.h index a3be2b32ab..5a56c354b8 100644 --- a/include/hw/m68k/next-cube.h +++ b/include/hw/m68k/next-cube.h @@ -42,6 +42,4 @@ enum next_irqs { NEXT_SND_I }; -void next_irq(void *opaque, int number, int level); - #endif /* NEXT_CUBE_H */ From patchwork Tue Jan 19 08:36:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366142 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp544054jam; Tue, 19 Jan 2021 00:37:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJzl+P94/wvPbjC4WhsmZyPksEcKC4ld1Exs4gardObOY93Arafv5wJ6VtT7j80xIsfjBwsC X-Received: by 2002:a05:6902:703:: with SMTP id k3mr4515168ybt.88.1611045448135; Tue, 19 Jan 2021 00:37:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611045448; cv=none; d=google.com; s=arc-20160816; b=aFx1A6T7AUzPX8tN8K99ihFa5qlEdvSRwpz3CbvjF/OCnEZUPgzwKuVIPUJyyetsVK fObWk/8ZrYj9Y8GT9QRwLTgnpmczNRMJ84OjiwpDBbvvv+ad8Ix3s4TfIPPktkPwU0G1 xpXlzVxXicdpv67OcVsnpqOoq5Jg1rPG2Etf9zRZOR0YLW54xr0UCX7oCylkrXuN8++M OoKouQ9YVO2k3Tqh/VZ4Y7tzQL+gai/X7Y4Mj8yr0qezqt9Zzhb+/oS6FKM9uW7DnILP bAGKzU3ktioKFTA32E4sm3EIdZnBlzt9D9a0CenY6nk11rDQ/V2L90+2+giXjfriw85l t9uw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=mdT/NKhm7BBrmMcwwEVr39Cma+q1XER1MJBfOZkvxpI=; b=oQKycRKKrhHPZtdJVRYKElhvQiuUaDQ62dpPeL0pem0zWYE7kXBZl5uFgPEDqFuBMJ /RnrPqUouIfyEUpS1hDXs8CM6L3LHdPmbrQ0PJD6W5l7UGFr6pWHoADdgY1pqy1TTq/1 gSkfhZx3TizGbI/LsvMYdYVGdhbYkeFOWp+EhruvLhK4MdIMlyzOXTeHyz1szjFYsjSy zwFp+UqA/BBI74Wq5HT0knMvyvXnxa9L5BLRaThiLXvllBnx8S0JRd8Q03NQ+wJ7dmhp 4MqisSD7bVtZ80J23fF2axGmsdYoHDd9/UwCfkQHhugau0r2qZw4RtTVWJaHtORukN8q 8hAg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:54 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 02/11] hw/m68k/next-cube: Move register/interrupt functionality into a device Date: Tue, 19 Jan 2021 09:36:08 +0100 Message-Id: <20210119083617.6337-3-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.44; envelope-from=th.huth@gmail.com; helo=mail-wm1-f44.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Currently the next-cube board code open-codes a lot of handling of interrupts and some miscellaneous registers. Move this into a proper QOM device. In the real hardware this functionality seems to be the responsibility of the Peripheral Controller (PC) chip, so name the device that. There are several different things that will need to be moved into this device: * the mmio_iops register set * the scr_ops register set * the next_irq IRQ handling To ease review, we structure the change as a sequence of commits: in this first commit we create the skeleton of the NeXTPC device with no content, but with a backdoor pointer to the NeXTState machine's state struct so we can move parts of the code and still have refactored and non-refactored code using the same struct data fields. Further commits will move functionality into the new device piece by piece. At the end we will be able to remove the backdoor pointer because all the data fields will be in the NeXTPC struct and not the NeXTState struct. We'll add the VMState for the new device at the end of all that; this is in theory a migration compatibility break but this machine does not currently support migration at all anyway. Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-3-peter.maydell@linaro.org> [huth: Add a comment in front of struct NeXTPC] Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index f622d6589c..262ff4ead0 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -90,6 +90,17 @@ struct NeXTState { NextRtc rtc; }; +#define TYPE_NEXT_PC "next-pc" +OBJECT_DECLARE_SIMPLE_TYPE(NeXTPC, NEXT_PC) + +/* NeXT Peripheral Controller */ +struct NeXTPC { + SysBusDevice parent_obj; + + /* Temporary until all functionality has been moved into this device */ + NeXTState *ns; +}; + /* Thanks to NeXT forums for this */ /* static const uint8_t rtc_ram3[32] = { @@ -857,6 +868,31 @@ static void next_escc_init(M68kCPU *cpu) sysbus_mmio_map(s, 0, 0x2118000); } +static void next_pc_reset(DeviceState *dev) +{ +} + +static void next_pc_realize(DeviceState *dev, Error **errp) +{ +} + +static void next_pc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->desc = "NeXT Peripheral Controller"; + dc->realize = next_pc_realize; + dc->reset = next_pc_reset; + /* We will add the VMState in a later commit */ +} + +static const TypeInfo next_pc_info = { + .name = TYPE_NEXT_PC, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(NeXTPC), + .class_init = next_pc_class_init, +}; + static void next_cube_init(MachineState *machine) { M68kCPU *cpu; @@ -871,6 +907,7 @@ static void next_cube_init(MachineState *machine) const char *bios_name = machine->firmware ?: ROM_FILE; NeXTState *ns = NEXT_MACHINE(machine); DeviceState *dev; + DeviceState *pcdev; /* Initialize the cpu core */ cpu = M68K_CPU(cpu_create(machine->cpu_type)); @@ -884,6 +921,12 @@ static void next_cube_init(MachineState *machine) env->vbr = 0; env->sr = 0x2700; + /* Peripheral Controller */ + pcdev = qdev_new(TYPE_NEXT_PC); + sysbus_realize_and_unref(SYS_BUS_DEVICE(pcdev), &error_fatal); + /* Temporary while we refactor this code */ + NEXT_PC(pcdev)->ns = ns; + /* Set internal registers to initial values */ /* 0x0000XX00 << vital bits */ ns->scr1 = 0x00011102; @@ -978,6 +1021,7 @@ static const TypeInfo next_typeinfo = { static void next_register_type(void) { type_register_static(&next_typeinfo); + type_register_static(&next_pc_info); } type_init(next_register_type) From patchwork Tue Jan 19 08:36:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366147 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp545164jam; Tue, 19 Jan 2021 00:39:38 -0800 (PST) X-Google-Smtp-Source: ABdhPJyUMc1VuPNm6XxrH2CITz0o5XmXy/mr7hEeJ5Xt811t4Q0lp9hZEl55+V1AnL4ZFEuMMz7S X-Received: by 2002:a25:6914:: with SMTP id e20mr1775674ybc.321.1611045578451; Tue, 19 Jan 2021 00:39:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611045578; cv=none; d=google.com; s=arc-20160816; b=HOYFbf7RvZs3MqFvbULQqJ4xLbpDFayIAeBqIg3F2daBzbFdXg3NFmmYbLtNxSpQ6e 8hjN226qv3gdpJVSvRaqDlyNA/zOsCBvs9XaC53gA+nY/xJfAjPf5b8pUcbAnWYnZaLw WuYTW5jOOtUXYJxo3/ALZsVWPolFL9OV69Dxna6fkLKg7CWuwt1Q5OXwkd5ZPPhQ5iMn YyTfYTRHSPGro1EXTXF5UnJ+vlE0Ot3X6Xg91jwrly8bSk7Sfj8We8eurIW8X8bcmWLl mLlbKvfdMwKhbmaXmSW0VTqGyS0pvVdVRB70U6qdbB7+5Jaq/uyJsaQeBeLG9mp1WO/S q4Qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=JZjaybeQucdS72xYzX/rOD4vrUc5IR1ekV46Zvg1Aco=; b=IEbH1SdOFOIiQbG2T+niHeOiloiPEL/mnoRgnlNPIAZNIwNH3/lksdhlln7arucea1 uEfVf7IhNLzPsNUlPxrF9w063Ero4b6xVYbDtd+t626PXL71ddwIdS8MTbnp8vTDDPHy c2KRWQ4I6lhQ6dk5v/pwIoSVVZ18CQ0l3P/GCqrTuoPu77CcH95VZNIDXvrT/TivI63r M70O0wNB7ZpbAcJQH0x9rPBfb5RiJCQR/UgbkU8umB+t84gm6fhmqXMvlIGICYUY+4mm fZbKAU/7s3a24DsY1GiCkEsXvOtHmQO1WFMJne6THjhODN/pFAOHTtEl5qWhILf0kLG8 wfHQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:54 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 03/11] hw/m68k/next-cube: Move mmio_ops into NeXTPC device Date: Tue, 19 Jan 2021 09:36:09 +0100 Message-Id: <20210119083617.6337-4-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.42; envelope-from=th.huth@gmail.com; helo=mail-wm1-f42.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Move the registers handled by the mmio_ops struct into the NeXTPC device. This allows us to also move the scr1 and scr2 data fields. Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-4-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 80 +++++++++++++++++++++++++-------------------- 1 file changed, 44 insertions(+), 36 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 262ff4ead0..17a020e2a0 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -84,9 +84,6 @@ struct NeXTState { qemu_irq scsi_reset; qemu_irq *fd_irq; - uint32_t scr1; - uint32_t scr2; - NextRtc rtc; }; @@ -99,6 +96,11 @@ struct NeXTPC { /* Temporary until all functionality has been moved into this device */ NeXTState *ns; + + MemoryRegion mmiomem; + + uint32_t scr1; + uint32_t scr2; }; /* Thanks to NeXT forums for this */ @@ -121,13 +123,13 @@ static const uint8_t rtc_ram2[32] = { #define SCR2_RTDATA 0x4 #define SCR2_TOBCD(x) (((x / 10) << 4) + (x % 10)) -static void nextscr2_write(NeXTState *s, uint32_t val, int size) +static void nextscr2_write(NeXTPC *s, uint32_t val, int size) { static int led; static int phase; static uint8_t old_scr2; uint8_t scr2_2; - NextRtc *rtc = &s->rtc; + NextRtc *rtc = &s->ns->rtc; if (size == 4) { scr2_2 = (val >> 8) & 0xFF; @@ -239,7 +241,7 @@ static void nextscr2_write(NeXTState *s, uint32_t val, int size) /* clear FTU */ if (rtc->value & 0x04) { rtc->status = rtc->status & (~0x18); - s->int_status = s->int_status & (~0x04); + s->ns->int_status = s->ns->int_status & (~0x04); } } } @@ -255,7 +257,7 @@ static void nextscr2_write(NeXTState *s, uint32_t val, int size) old_scr2 = scr2_2; } -static uint32_t mmio_readb(NeXTState *s, hwaddr addr) +static uint32_t mmio_readb(NeXTPC *s, hwaddr addr) { switch (addr) { case 0xc000: @@ -285,7 +287,7 @@ static uint32_t mmio_readb(NeXTState *s, hwaddr addr) } } -static uint32_t mmio_readw(NeXTState *s, hwaddr addr) +static uint32_t mmio_readw(NeXTPC *s, hwaddr addr) { switch (addr) { default: @@ -294,16 +296,16 @@ static uint32_t mmio_readw(NeXTState *s, hwaddr addr) } } -static uint32_t mmio_readl(NeXTState *s, hwaddr addr) +static uint32_t mmio_readl(NeXTPC *s, hwaddr addr) { switch (addr) { case 0x7000: - /* DPRINTF("Read INT status: %x\n", s->int_status); */ - return s->int_status; + /* DPRINTF("Read INT status: %x\n", s->ns->int_status); */ + return s->ns->int_status; case 0x7800: - DPRINTF("MMIO Read INT mask: %x\n", s->int_mask); - return s->int_mask; + DPRINTF("MMIO Read INT mask: %x\n", s->ns->int_mask); + return s->ns->int_mask; case 0xc000: return s->scr1; @@ -317,7 +319,7 @@ static uint32_t mmio_readl(NeXTState *s, hwaddr addr) } } -static void mmio_writeb(NeXTState *s, hwaddr addr, uint32_t val) +static void mmio_writeb(NeXTPC *s, hwaddr addr, uint32_t val) { switch (addr) { case 0xd003: @@ -329,21 +331,21 @@ static void mmio_writeb(NeXTState *s, hwaddr addr, uint32_t val) } -static void mmio_writew(NeXTState *s, hwaddr addr, uint32_t val) +static void mmio_writew(NeXTPC *s, hwaddr addr, uint32_t val) { DPRINTF("MMIO Write W\n"); } -static void mmio_writel(NeXTState *s, hwaddr addr, uint32_t val) +static void mmio_writel(NeXTPC *s, hwaddr addr, uint32_t val) { switch (addr) { case 0x7000: - DPRINTF("INT Status old: %x new: %x\n", s->int_status, val); - s->int_status = val; + DPRINTF("INT Status old: %x new: %x\n", s->ns->int_status, val); + s->ns->int_status = val; break; case 0x7800: - DPRINTF("INT Mask old: %x new: %x\n", s->int_mask, val); - s->int_mask = val; + DPRINTF("INT Mask old: %x new: %x\n", s->ns->int_mask, val); + s->ns->int_mask = val; break; case 0xc000: DPRINTF("SCR1 Write: %x\n", val); @@ -359,15 +361,15 @@ static void mmio_writel(NeXTState *s, hwaddr addr, uint32_t val) static uint64_t mmio_readfn(void *opaque, hwaddr addr, unsigned size) { - NeXTState *ns = NEXT_MACHINE(opaque); + NeXTPC *s = NEXT_PC(opaque); switch (size) { case 1: - return mmio_readb(ns, addr); + return mmio_readb(s, addr); case 2: - return mmio_readw(ns, addr); + return mmio_readw(s, addr); case 4: - return mmio_readl(ns, addr); + return mmio_readl(s, addr); default: g_assert_not_reached(); } @@ -376,17 +378,17 @@ static uint64_t mmio_readfn(void *opaque, hwaddr addr, unsigned size) static void mmio_writefn(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - NeXTState *ns = NEXT_MACHINE(opaque); + NeXTPC *s = NEXT_PC(opaque); switch (size) { case 1: - mmio_writeb(ns, addr, value); + mmio_writeb(s, addr, value); break; case 2: - mmio_writew(ns, addr, value); + mmio_writew(s, addr, value); break; case 4: - mmio_writel(ns, addr, value); + mmio_writel(s, addr, value); break; default: g_assert_not_reached(); @@ -870,10 +872,23 @@ static void next_escc_init(M68kCPU *cpu) static void next_pc_reset(DeviceState *dev) { + NeXTPC *s = NEXT_PC(dev); + + /* Set internal registers to initial values */ + /* 0x0000XX00 << vital bits */ + s->scr1 = 0x00011102; + s->scr2 = 0x00ff0c80; } static void next_pc_realize(DeviceState *dev, Error **errp) { + NeXTPC *s = NEXT_PC(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + + memory_region_init_io(&s->mmiomem, OBJECT(s), &mmio_ops, s, + "next.mmio", 0xD0000); + + sysbus_init_mmio(sbd, &s->mmiomem); } static void next_pc_class_init(ObjectClass *klass, void *data) @@ -898,7 +913,6 @@ static void next_cube_init(MachineState *machine) M68kCPU *cpu; CPUM68KState *env; MemoryRegion *rom = g_new(MemoryRegion, 1); - MemoryRegion *mmiomem = g_new(MemoryRegion, 1); MemoryRegion *scrmem = g_new(MemoryRegion, 1); MemoryRegion *dmamem = g_new(MemoryRegion, 1); MemoryRegion *bmapm1 = g_new(MemoryRegion, 1); @@ -927,10 +941,6 @@ static void next_cube_init(MachineState *machine) /* Temporary while we refactor this code */ NEXT_PC(pcdev)->ns = ns; - /* Set internal registers to initial values */ - /* 0x0000XX00 << vital bits */ - ns->scr1 = 0x00011102; - ns->scr2 = 0x00ff0c80; ns->rtc.status = 0x90; /* Load RTC RAM - TODO: provide possibility to load contents from file */ @@ -945,9 +955,7 @@ static void next_cube_init(MachineState *machine) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0B000000); /* MMIO */ - memory_region_init_io(mmiomem, NULL, &mmio_ops, machine, "next.mmio", - 0xD0000); - memory_region_add_subregion(sysmem, 0x02000000, mmiomem); + sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 0, 0x02000000); /* BMAP memory */ memory_region_init_ram_shared_nomigrate(bmapm1, NULL, "next.bmapmem", 64, From patchwork Tue Jan 19 08:36:10 2021 Content-Type: text/plain; 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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:55 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 04/11] hw/m68k/next-cube: Move scr_ops into NeXTPC device Date: Tue, 19 Jan 2021 09:36:10 +0100 Message-Id: <20210119083617.6337-5-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.53; envelope-from=th.huth@gmail.com; helo=mail-wm1-f53.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Move the registers handled by the scr_ops struct into the NeXTPC device. Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-5-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 50 ++++++++++++++++++++++----------------------- 1 file changed, 25 insertions(+), 25 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 17a020e2a0..7d44bcf783 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -76,8 +76,6 @@ struct NeXTState { uint32_t int_mask; uint32_t int_status; - uint8_t scsi_csr_1; - uint8_t scsi_csr_2; next_dma dma[10]; qemu_irq *scsi_irq; qemu_irq scsi_dma; @@ -98,9 +96,12 @@ struct NeXTPC { NeXTState *ns; MemoryRegion mmiomem; + MemoryRegion scrmem; uint32_t scr1; uint32_t scr2; + uint8_t scsi_csr_1; + uint8_t scsi_csr_2; }; /* Thanks to NeXT forums for this */ @@ -403,7 +404,7 @@ static const MemoryRegionOps mmio_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static uint32_t scr_readb(NeXTState *s, hwaddr addr) +static uint32_t scr_readb(NeXTPC *s, hwaddr addr) { switch (addr) { case 0x14108: @@ -437,13 +438,13 @@ static uint32_t scr_readb(NeXTState *s, hwaddr addr) } } -static uint32_t scr_readw(NeXTState *s, hwaddr addr) +static uint32_t scr_readw(NeXTPC *s, hwaddr addr) { DPRINTF("BMAP Read W @ %x\n", (unsigned int)addr); return 0; } -static uint32_t scr_readl(NeXTState *s, hwaddr addr) +static uint32_t scr_readl(NeXTPC *s, hwaddr addr) { DPRINTF("BMAP Read L @ %x\n", (unsigned int)addr); return 0; @@ -456,7 +457,7 @@ static uint32_t scr_readl(NeXTState *s, hwaddr addr) #define SCSICSR_CPUDMA 0x10 /* if set, dma enabled */ #define SCSICSR_INTMASK 0x20 /* if set, interrupt enabled */ -static void scr_writeb(NeXTState *s, hwaddr addr, uint32_t value) +static void scr_writeb(NeXTPC *s, hwaddr addr, uint32_t value) { switch (addr) { case 0x14108: @@ -502,9 +503,9 @@ static void scr_writeb(NeXTState *s, hwaddr addr, uint32_t value) DPRINTF("SCSICSR CPUDMA\n"); /* qemu_irq_raise(s->scsi_dma); */ - s->int_status |= 0x4000000; + s->ns->int_status |= 0x4000000; } else { - s->int_status &= ~(0x4000000); + s->ns->int_status &= ~(0x4000000); } if (value & SCSICSR_INTMASK) { DPRINTF("SCSICSR INTMASK\n"); @@ -534,27 +535,27 @@ static void scr_writeb(NeXTState *s, hwaddr addr, uint32_t value) } } -static void scr_writew(NeXTState *s, hwaddr addr, uint32_t value) +static void scr_writew(NeXTPC *s, hwaddr addr, uint32_t value) { DPRINTF("BMAP Write W @ %x with %x\n", (unsigned int)addr, value); } -static void scr_writel(NeXTState *s, hwaddr addr, uint32_t value) +static void scr_writel(NeXTPC *s, hwaddr addr, uint32_t value) { DPRINTF("BMAP Write L @ %x with %x\n", (unsigned int)addr, value); } static uint64_t scr_readfn(void *opaque, hwaddr addr, unsigned size) { - NeXTState *ns = NEXT_MACHINE(opaque); + NeXTPC *s = NEXT_PC(opaque); switch (size) { case 1: - return scr_readb(ns, addr); + return scr_readb(s, addr); case 2: - return scr_readw(ns, addr); + return scr_readw(s, addr); case 4: - return scr_readl(ns, addr); + return scr_readl(s, addr); default: g_assert_not_reached(); } @@ -563,17 +564,17 @@ static uint64_t scr_readfn(void *opaque, hwaddr addr, unsigned size) static void scr_writefn(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - NeXTState *ns = NEXT_MACHINE(opaque); + NeXTPC *s = NEXT_PC(opaque); switch (size) { case 1: - scr_writeb(ns, addr, value); + scr_writeb(s, addr, value); break; case 2: - scr_writew(ns, addr, value); + scr_writew(s, addr, value); break; case 4: - scr_writel(ns, addr, value); + scr_writel(s, addr, value); break; default: g_assert_not_reached(); @@ -887,8 +888,10 @@ static void next_pc_realize(DeviceState *dev, Error **errp) memory_region_init_io(&s->mmiomem, OBJECT(s), &mmio_ops, s, "next.mmio", 0xD0000); - + memory_region_init_io(&s->scrmem, OBJECT(s), &scr_ops, s, + "next.scr", 0x20000); sysbus_init_mmio(sbd, &s->mmiomem); + sysbus_init_mmio(sbd, &s->scrmem); } static void next_pc_class_init(ObjectClass *klass, void *data) @@ -913,7 +916,6 @@ static void next_cube_init(MachineState *machine) M68kCPU *cpu; CPUM68KState *env; MemoryRegion *rom = g_new(MemoryRegion, 1); - MemoryRegion *scrmem = g_new(MemoryRegion, 1); MemoryRegion *dmamem = g_new(MemoryRegion, 1); MemoryRegion *bmapm1 = g_new(MemoryRegion, 1); MemoryRegion *bmapm2 = g_new(MemoryRegion, 1); @@ -957,6 +959,9 @@ static void next_cube_init(MachineState *machine) /* MMIO */ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 0, 0x02000000); + /* BMAP IO - acts as a catch-all for now */ + sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 1, 0x02100000); + /* BMAP memory */ memory_region_init_ram_shared_nomigrate(bmapm1, NULL, "next.bmapmem", 64, true, &error_fatal); @@ -965,11 +970,6 @@ static void next_cube_init(MachineState *machine) memory_region_init_alias(bmapm2, NULL, "next.bmapmem2", bmapm1, 0x0, 64); memory_region_add_subregion(sysmem, 0x820c0000, bmapm2); - /* BMAP IO - acts as a catch-all for now */ - memory_region_init_io(scrmem, NULL, &scr_ops, machine, "next.scr", - 0x20000); - memory_region_add_subregion(sysmem, 0x02100000, scrmem); - /* KBD */ dev = qdev_new(TYPE_NEXTKBD); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); From patchwork Tue Jan 19 08:36:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366148 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp546070jam; Tue, 19 Jan 2021 00:41:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJxL2z6oXvp8eaxxoFTfbzx6qesVhUovkiSltJe5CXm4vhsj44Y5h5pU1Qb9aqNfbiX4Cy7L X-Received: by 2002:a05:6902:706:: with SMTP id k6mr4444868ybt.87.1611045706059; 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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:55 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 05/11] hw/m68k/next-cube: Make next_irq take NeXTPC* as its opaque Date: Tue, 19 Jan 2021 09:36:11 +0100 Message-Id: <20210119083617.6337-6-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.221.50; envelope-from=th.huth@gmail.com; helo=mail-wr1-f50.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Make the next_irq function take a NeXTPC* as its opaque rather than the M68kCPU*. This will make it simpler to turn the next_irq function into a gpio input line of the NeXTPC device in the next commit. For this to work we have to pass the CPU to the NeXTPC device via a link property, in the same way we do in q800.c (and for the same reason). Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-6-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 7d44bcf783..83e219a79a 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -95,6 +95,8 @@ struct NeXTPC { /* Temporary until all functionality has been moved into this device */ NeXTState *ns; + M68kCPU *cpu; + MemoryRegion mmiomem; MemoryRegion scrmem; @@ -740,9 +742,9 @@ static const MemoryRegionOps dma_ops = { */ static void next_irq(void *opaque, int number, int level) { - M68kCPU *cpu = opaque; + NeXTPC *s = NEXT_PC(opaque); + M68kCPU *cpu = s->cpu; int shift = 0; - NeXTState *ns = NEXT_MACHINE(qdev_get_machine()); /* first switch sets interupt status */ /* DPRINTF("IRQ %i\n",number); */ @@ -797,14 +799,14 @@ static void next_irq(void *opaque, int number, int level) * this HAS to be wrong, the interrupt handlers in mach and together * int_status and int_mask and return if there is a hit */ - if (ns->int_mask & (1 << shift)) { + if (s->ns->int_mask & (1 << shift)) { DPRINTF("%x interrupt masked @ %x\n", 1 << shift, cpu->env.pc); /* return; */ } /* second switch triggers the correct interrupt */ if (level) { - ns->int_status |= 1 << shift; + s->ns->int_status |= 1 << shift; switch (number) { /* level 3 - floppy, kbd/mouse, power, ether rx/tx, scsi, clock */ @@ -833,7 +835,7 @@ static void next_irq(void *opaque, int number, int level) break; } } else { - ns->int_status &= ~(1 << shift); + s->ns->int_status &= ~(1 << shift); cpu_reset_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); } } @@ -848,9 +850,9 @@ static void next_serial_irq(void *opaque, int n, int level) } } -static void next_escc_init(M68kCPU *cpu) +static void next_escc_init(DeviceState *pcdev) { - qemu_irq *ser_irq = qemu_allocate_irqs(next_serial_irq, cpu, 2); + qemu_irq *ser_irq = qemu_allocate_irqs(next_serial_irq, pcdev, 2); DeviceState *dev; SysBusDevice *s; @@ -894,6 +896,17 @@ static void next_pc_realize(DeviceState *dev, Error **errp) sysbus_init_mmio(sbd, &s->scrmem); } +/* + * If the m68k CPU implemented its inbound irq lines as GPIO lines + * rather than via the m68k_set_irq_level() function we would not need + * this cpu link property and could instead provide outbound IRQ lines + * that the board could wire up to the CPU. + */ +static Property next_pc_properties[] = { + DEFINE_PROP_LINK("cpu", NeXTPC, cpu, TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void next_pc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -901,6 +914,7 @@ static void next_pc_class_init(ObjectClass *klass, void *data) dc->desc = "NeXT Peripheral Controller"; dc->realize = next_pc_realize; dc->reset = next_pc_reset; + device_class_set_props(dc, next_pc_properties); /* We will add the VMState in a later commit */ } @@ -939,6 +953,7 @@ static void next_cube_init(MachineState *machine) /* Peripheral Controller */ pcdev = qdev_new(TYPE_NEXT_PC); + object_property_set_link(OBJECT(pcdev), "cpu", OBJECT(cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(pcdev), &error_fatal); /* Temporary while we refactor this code */ NEXT_PC(pcdev)->ns = ns; @@ -997,7 +1012,7 @@ static void next_cube_init(MachineState *machine) } /* Serial */ - next_escc_init(cpu); + next_escc_init(pcdev); /* TODO: */ /* Network */ From patchwork Tue Jan 19 08:36:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366146 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp545147jam; 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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:56 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 06/11] hw/m68k/next-cube: Move int_status and int_mask to NeXTPC struct Date: Tue, 19 Jan 2021 09:36:12 +0100 Message-Id: <20210119083617.6337-7-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.221.49; envelope-from=th.huth@gmail.com; helo=mail-wr1-f49.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell All the code which accesses int_status and int_mask is now doing so via the NeXTPC->NeXTState indirection, so we can move these fields into the NeXTPC struct where they belong. Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-7-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 33 ++++++++++++++++----------------- 1 file changed, 16 insertions(+), 17 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 83e219a79a..9b9b051231 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -73,9 +73,6 @@ typedef struct NextRtc { struct NeXTState { MachineState parent; - uint32_t int_mask; - uint32_t int_status; - next_dma dma[10]; qemu_irq *scsi_irq; qemu_irq scsi_dma; @@ -104,6 +101,8 @@ struct NeXTPC { uint32_t scr2; uint8_t scsi_csr_1; uint8_t scsi_csr_2; + uint32_t int_mask; + uint32_t int_status; }; /* Thanks to NeXT forums for this */ @@ -244,7 +243,7 @@ static void nextscr2_write(NeXTPC *s, uint32_t val, int size) /* clear FTU */ if (rtc->value & 0x04) { rtc->status = rtc->status & (~0x18); - s->ns->int_status = s->ns->int_status & (~0x04); + s->int_status = s->int_status & (~0x04); } } } @@ -303,12 +302,12 @@ static uint32_t mmio_readl(NeXTPC *s, hwaddr addr) { switch (addr) { case 0x7000: - /* DPRINTF("Read INT status: %x\n", s->ns->int_status); */ - return s->ns->int_status; + /* DPRINTF("Read INT status: %x\n", s->int_status); */ + return s->int_status; case 0x7800: - DPRINTF("MMIO Read INT mask: %x\n", s->ns->int_mask); - return s->ns->int_mask; + DPRINTF("MMIO Read INT mask: %x\n", s->int_mask); + return s->int_mask; case 0xc000: return s->scr1; @@ -343,12 +342,12 @@ static void mmio_writel(NeXTPC *s, hwaddr addr, uint32_t val) { switch (addr) { case 0x7000: - DPRINTF("INT Status old: %x new: %x\n", s->ns->int_status, val); - s->ns->int_status = val; + DPRINTF("INT Status old: %x new: %x\n", s->int_status, val); + s->int_status = val; break; case 0x7800: - DPRINTF("INT Mask old: %x new: %x\n", s->ns->int_mask, val); - s->ns->int_mask = val; + DPRINTF("INT Mask old: %x new: %x\n", s->int_mask, val); + s->int_mask = val; break; case 0xc000: DPRINTF("SCR1 Write: %x\n", val); @@ -505,9 +504,9 @@ static void scr_writeb(NeXTPC *s, hwaddr addr, uint32_t value) DPRINTF("SCSICSR CPUDMA\n"); /* qemu_irq_raise(s->scsi_dma); */ - s->ns->int_status |= 0x4000000; + s->int_status |= 0x4000000; } else { - s->ns->int_status &= ~(0x4000000); + s->int_status &= ~(0x4000000); } if (value & SCSICSR_INTMASK) { DPRINTF("SCSICSR INTMASK\n"); @@ -799,14 +798,14 @@ static void next_irq(void *opaque, int number, int level) * this HAS to be wrong, the interrupt handlers in mach and together * int_status and int_mask and return if there is a hit */ - if (s->ns->int_mask & (1 << shift)) { + if (s->int_mask & (1 << shift)) { DPRINTF("%x interrupt masked @ %x\n", 1 << shift, cpu->env.pc); /* return; */ } /* second switch triggers the correct interrupt */ if (level) { - s->ns->int_status |= 1 << shift; + s->int_status |= 1 << shift; switch (number) { /* level 3 - floppy, kbd/mouse, power, ether rx/tx, scsi, clock */ @@ -835,7 +834,7 @@ static void next_irq(void *opaque, int number, int level) break; } } else { - s->ns->int_status &= ~(1 << shift); + s->int_status &= ~(1 << shift); cpu_reset_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); } } From patchwork Tue Jan 19 08:36:13 2021 Content-Type: text/plain; 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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:57 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 07/11] hw/m68k/next-cube: Make next_irq GPIO inputs to NEXT_PC device Date: Tue, 19 Jan 2021 09:36:13 +0100 Message-Id: <20210119083617.6337-8-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.44; envelope-from=th.huth@gmail.com; helo=mail-wm1-f44.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Make the next_irq function be GPIO inputs to the NEXT_PC device, rather than a freestanding set of qemu_irq lines. This fixes a minor Coverity issue where it correctly points out the trivial memory leak of the memory allocated in the call to qemu_allocate_irqs(). Fixes: CID 1421962 Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-8-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 21 ++++----------------- include/hw/m68k/next-cube.h | 3 ++- 2 files changed, 6 insertions(+), 18 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 9b9b051231..7dcd39aab9 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -735,10 +735,6 @@ static const MemoryRegionOps dma_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -/* - * TODO: set the shift numbers as values in the enum, so the first switch - * will not be needed - */ static void next_irq(void *opaque, int number, int level) { NeXTPC *s = NEXT_PC(opaque); @@ -839,19 +835,8 @@ static void next_irq(void *opaque, int number, int level) } } -static void next_serial_irq(void *opaque, int n, int level) -{ - /* DPRINTF("SCC IRQ NUM %i\n",n); */ - if (n) { - next_irq(opaque, NEXT_SCC_DMA_I, level); - } else { - next_irq(opaque, NEXT_SCC_I, level); - } -} - static void next_escc_init(DeviceState *pcdev) { - qemu_irq *ser_irq = qemu_allocate_irqs(next_serial_irq, pcdev, 2); DeviceState *dev; SysBusDevice *s; @@ -867,8 +852,8 @@ static void next_escc_init(DeviceState *pcdev) s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); - sysbus_connect_irq(s, 0, ser_irq[0]); - sysbus_connect_irq(s, 1, ser_irq[1]); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(pcdev, NEXT_SCC_I)); + sysbus_connect_irq(s, 1, qdev_get_gpio_in(pcdev, NEXT_SCC_DMA_I)); sysbus_mmio_map(s, 0, 0x2118000); } @@ -887,6 +872,8 @@ static void next_pc_realize(DeviceState *dev, Error **errp) NeXTPC *s = NEXT_PC(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + qdev_init_gpio_in(dev, next_irq, NEXT_NUM_IRQS); + memory_region_init_io(&s->mmiomem, OBJECT(s), &mmio_ops, s, "next.mmio", 0xD0000); memory_region_init_io(&s->scrmem, OBJECT(s), &scr_ops, s, diff --git a/include/hw/m68k/next-cube.h b/include/hw/m68k/next-cube.h index 5a56c354b8..d38c52d540 100644 --- a/include/hw/m68k/next-cube.h +++ b/include/hw/m68k/next-cube.h @@ -39,7 +39,8 @@ enum next_irqs { NEXT_ENRX_DMA_I, NEXT_SCSI_DMA_I, NEXT_SCC_DMA_I, - NEXT_SND_I + NEXT_SND_I, + NEXT_NUM_IRQS }; #endif /* NEXT_CUBE_H */ From patchwork Tue Jan 19 08:36:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366152 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp546205jam; Tue, 19 Jan 2021 00:42:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJz54e41PniXQAh61BnvNZs1gWs43f5fwBitq7IPE+I30uHKvLdy8b0fjG3rzWrJY8tWolkW X-Received: by 2002:a25:5015:: with SMTP id e21mr4732398ybb.14.1611045723508; Tue, 19 Jan 2021 00:42:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611045723; cv=none; d=google.com; s=arc-20160816; b=0wgE+UoJf5MQ+v0zZypyE+ZnBgdIVFAvJ6q84E4P9I7EcgbPwUnlWwo9C2ps01ZLWX VZr1QWOcdHC6EgqdG7zIjf7VtJkHfkPgfEjitBvuIYcynf2BfDoTO+MdF7D6Zhsb6MeW 2wA7ZDMZJt906cm+0oFE+t6FwVhfCdBSrFEUiLvqSKhJ2VST2Jisj7thIJfsbgsX1TvU B0KeYf+A2aRJlwC8+0zewFnWF1ysz1XH7hs5Km08+XkaMi/a/+Vl5sL/YywubaFmPpSf ybo09nLRB8DRuvY26S18SWDM8ozpukg5MrNwO09F/FBKKHSng8OhJeS+DTTXpzRscNUG Siyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=+FrPA9D7tgOJmnuV/QM70BzMEZV7Pu2xLl9GXYEW1X4=; b=it2RQLAzEL+sO3wiBdxSeIB01EiPvYciJ9PBL1XF8iuFE4w5zTuSzCbIDX28cIpYgx thlVVvoTwmVaVXS9mEk6gB3nWtMzI7xmVfPRaA5P7ujI5VAn17Z3jhAYGbHjJk7LOa3F 2fIdVIYOMuJAkjz1V8gQYWJ9TFp6NxGu7RCaOEpObEY01A+YSoeAty0Jw+8U5rkZTemP EmDKzJL4Zir0McM5MHSnqCV0m3zfYcMtqMpmF4D4Pp/eHW+2+tr7seHqiWCVH0uZYar+ 2O4uXXzOXZgHK5dH6TFZ5M/4ns4TpW0t11gvuge3NtKyJuldldy57hCG6v5Eonofj14G yqSg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id q188si22121706ybc.262.2021.01.19.00.42.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Jan 2021 00:42:03 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43362 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l1maQ-00074Q-UN for patch@linaro.org; Tue, 19 Jan 2021 03:42:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34428) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l1mVZ-0008JX-9U for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:37:01 -0500 Received: from mail-wm1-f48.google.com ([209.85.128.48]:51865) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l1mVX-0003Uy-E1 for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:37:01 -0500 Received: by mail-wm1-f48.google.com with SMTP id m2so511108wmm.1 for ; Tue, 19 Jan 2021 00:36:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+FrPA9D7tgOJmnuV/QM70BzMEZV7Pu2xLl9GXYEW1X4=; b=mSSW6eRjz8cNU9qKYhljx/G83WCPk4R4qAA5dZuU1zRsl5fQltQZxDWOIlYUQlee9A gQfRUu9mbZNeRTvcVsjWFkxHeVtN/+du0zQUcUKEQOdJRj5H7+Ja+Z8HVkv0uc3z4wfW Q+Gq5cpEn63u71Vtryt2aewipqpCRU6I3v2N0vk+uvDRV4gp4SvjCYoH0YWIdngxE4tI YuXhDWg2+CH5yegb+HkoBULZGE+95e72tkl3/4YdrLNO1Sr7pXi686FinXhBqs/MsrFQ tvYfCw+/LQaIzvM0YyuRFpbt74hurnQyXkYbjaIKUOr0iwnc2IIqVK6VK5z9iPphJcQ0 FiTA== X-Gm-Message-State: AOAM533i5nOw6XxqsUtt/6mvwAmXOODXjKh+7MiYA9xsooqPcoBqXGmQ tMkTEuGtKj1I+/z9j0UUzwWdDyz0Uv8= X-Received: by 2002:a1c:9cd8:: with SMTP id f207mr3019373wme.155.1611045417969; Tue, 19 Jan 2021 00:36:57 -0800 (PST) Received: from localhost.localdomain (pd9e83aed.dip0.t-ipconnect.de. [217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:57 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 08/11] hw/m68k/next-cube: Move rtc into NeXTPC struct Date: Tue, 19 Jan 2021 09:36:14 +0100 Message-Id: <20210119083617.6337-9-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.48; envelope-from=th.huth@gmail.com; helo=mail-wm1-f48.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Move the rtc into the NeXTPC struct. Since this is the last use of the 'backdoor' NextState pointer we can now remove that. Probably the RTC should be its own device at some point: in hardware there is a separate MCS1850 RTC chip connected to the Peripheral Controller via a 1-bit serial interface. That goes beyond the remit of the current refactoring, though. Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-9-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 7dcd39aab9..57f9e9f837 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -78,8 +78,6 @@ struct NeXTState { qemu_irq scsi_dma; qemu_irq scsi_reset; qemu_irq *fd_irq; - - NextRtc rtc; }; #define TYPE_NEXT_PC "next-pc" @@ -89,9 +87,6 @@ OBJECT_DECLARE_SIMPLE_TYPE(NeXTPC, NEXT_PC) struct NeXTPC { SysBusDevice parent_obj; - /* Temporary until all functionality has been moved into this device */ - NeXTState *ns; - M68kCPU *cpu; MemoryRegion mmiomem; @@ -103,6 +98,8 @@ struct NeXTPC { uint8_t scsi_csr_2; uint32_t int_mask; uint32_t int_status; + + NextRtc rtc; }; /* Thanks to NeXT forums for this */ @@ -131,7 +128,7 @@ static void nextscr2_write(NeXTPC *s, uint32_t val, int size) static int phase; static uint8_t old_scr2; uint8_t scr2_2; - NextRtc *rtc = &s->ns->rtc; + NextRtc *rtc = &s->rtc; if (size == 4) { scr2_2 = (val >> 8) & 0xFF; @@ -865,6 +862,11 @@ static void next_pc_reset(DeviceState *dev) /* 0x0000XX00 << vital bits */ s->scr1 = 0x00011102; s->scr2 = 0x00ff0c80; + + s->rtc.status = 0x90; + + /* Load RTC RAM - TODO: provide possibility to load contents from file */ + memcpy(s->rtc.ram, rtc_ram2, 32); } static void next_pc_realize(DeviceState *dev, Error **errp) @@ -921,7 +923,6 @@ static void next_cube_init(MachineState *machine) MemoryRegion *bmapm2 = g_new(MemoryRegion, 1); MemoryRegion *sysmem = get_system_memory(); const char *bios_name = machine->firmware ?: ROM_FILE; - NeXTState *ns = NEXT_MACHINE(machine); DeviceState *dev; DeviceState *pcdev; @@ -941,13 +942,6 @@ static void next_cube_init(MachineState *machine) pcdev = qdev_new(TYPE_NEXT_PC); object_property_set_link(OBJECT(pcdev), "cpu", OBJECT(cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(pcdev), &error_fatal); - /* Temporary while we refactor this code */ - NEXT_PC(pcdev)->ns = ns; - - ns->rtc.status = 0x90; - - /* Load RTC RAM - TODO: provide possibility to load contents from file */ - memcpy(ns->rtc.ram, rtc_ram2, 32); /* 64MB RAM starting at 0x04000000 */ memory_region_add_subregion(sysmem, 0x04000000, machine->ram); From patchwork Tue Jan 19 08:36:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366153 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp548079jam; Tue, 19 Jan 2021 00:45:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJyoQJlYjzDR0GrGaMcMS1yXf2M2lMF5QC8tVtqdqC563PX/s7lgH/HODnJEhobh38+zTtTM X-Received: by 2002:a25:cc81:: with SMTP id l123mr4483186ybf.496.1611045946424; Tue, 19 Jan 2021 00:45:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611045946; cv=none; d=google.com; s=arc-20160816; b=YRvX70J7ZTQcbc4XQGaZ6qjJMsKQRHCBiGVFHV+QAKUz0zNbjaUs7L3+cOAKjYMyS2 NNcOo2keVIXhtIvPzIg5H3XvyppCrkgfasdCUJ8dbM+EzV2ekeKUQskvRnqLkN7EyaM9 /84MuGhKS8J1ksSJaXEesW2nYB9cKtlHs3H/rf0pDhPRoNqENnnrqusSVQDcESgKkJi0 +ZdZF1InIvAM2tyysWTc3iwLVwc0sYCXHLxACcw8GpdumXaE5Ft56fTe5i4UU/GS90n8 Psl/5gXknc61CNJctyTwV/p/W7uE+SBHV0JX3qcFnre3dJ1QxGtBp4iMLsVIoAPnpZyl ix4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=Lp8e+6CNq3PfO/lG5V1bR2jAbjEfRw8uEWg2058AyFU=; b=Bwbg1RPP2ADXUwWjShuaAlOj1nkApvW7/9X2LkO4f8XM80QFxTTAozLG1YN99g/ZrM MJOOa+68fC//Yl/czU1EhO2qYyeBztO8T0T7liqd/cfetj/u9e5NWrxZilHkB5zn6AlT HaSnEfUSO1b2BotompQCmvzQzvOjIAJbyGhQfuHr4KvZ/S0hATmkWZs8ZWmRnYfnQC8P MfwStIiwX7fpLz/SkvKKnWcVaKY+u7+CIobnGnSK6LQiFNd9Xe6oEIRkbhOMc7bERDh2 DeMfJ4xMMBpu0Br+ftqwQp1ad2RX9u2/nBiQq7OUhm/fAgJUJFsAVlskQjp60EH8nW3o a0zw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 201si17486699ybf.130.2021.01.19.00.45.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Jan 2021 00:45:46 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:52090 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l1me1-0002MJ-VD for patch@linaro.org; Tue, 19 Jan 2021 03:45:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34438) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l1mVZ-0008Jn-M0 for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:37:01 -0500 Received: from mail-wr1-f47.google.com ([209.85.221.47]:36538) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l1mVY-0003Vt-3C for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:37:01 -0500 Received: by mail-wr1-f47.google.com with SMTP id 6so11547764wri.3 for ; Tue, 19 Jan 2021 00:36:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Lp8e+6CNq3PfO/lG5V1bR2jAbjEfRw8uEWg2058AyFU=; b=klIV5NYmQwkloh4SynoEb6Wz2DZCAbMYn6tMgGuRZRxnWZqLsYfd0qqbylq84y0NC0 tZkmwR5HQafKC0fMnsxdi3DI7KzgfT6MZtKuYgGkqd7W19m0JJz1BS/f813JGQ9Qmwmu Us/qHtriOyp9eKNO16Nf/vROPwd+Q2DAvaMywsQHXUWFhL2dC9unhMcK9c44Toow580K PyYdtylG7q3BUozIgj/V3CLysJKSXUYcmUtrPgnCdWHabZMAe1LH2jMg3HdUndV4Xdx0 7A5HrbQYY/pLTAwIxtygXQDuPriR/DOAGDw0MljpOluKrZ5scpTbiqfNuay1qSknhKsq RWhg== X-Gm-Message-State: AOAM531u3e3Nk/Uw3gE8omne3cCYM02pgB18Zet7iIq5Cu7uOqWOriQ4 V6uUwtZDfQ5hexQMa9I3wYV38B/+vbc= X-Received: by 2002:a5d:660c:: with SMTP id n12mr3165700wru.291.1611045418609; Tue, 19 Jan 2021 00:36:58 -0800 (PST) Received: from localhost.localdomain (pd9e83aed.dip0.t-ipconnect.de. [217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:58 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 09/11] hw/m68k/next-cube: Remove unused fields from NeXTState Date: Tue, 19 Jan 2021 09:36:15 +0100 Message-Id: <20210119083617.6337-10-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.221.47; envelope-from=th.huth@gmail.com; helo=mail-wr1-f47.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The fields scsi_irq, scsi_dma, scsi_reset and fd_irq in NeXTState are all unused, except in commented out "this should do something like this" code. Remove the unused fields. As and when the functionality that might use them is added, we can put in the correct kind of wiring (which might or might not need to be a qemu_irq, but which in any case will need to be in the NeXTPC device, not in NeXTState). Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-10-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 57f9e9f837..1f6a2d58a1 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -74,10 +74,6 @@ struct NeXTState { MachineState parent; next_dma dma[10]; - qemu_irq *scsi_irq; - qemu_irq scsi_dma; - qemu_irq scsi_reset; - qemu_irq *fd_irq; }; #define TYPE_NEXT_PC "next-pc" From patchwork Tue Jan 19 08:36:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366151 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp546190jam; Tue, 19 Jan 2021 00:42:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJyjLRYf+IrRj6fRVhQawQ7IJmUvAl+UaBj7jYJ8cNAsVFsiPFjOWqWDsmteUWhKwJfEsdHg X-Received: by 2002:a25:99c6:: with SMTP id q6mr4475227ybo.408.1611045722224; Tue, 19 Jan 2021 00:42:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611045722; cv=none; d=google.com; s=arc-20160816; b=YCJd+eMZmjgaS3z+hNFOZifXCXVEslhdwyH5EwHm5nuTs0IXJ38FBFw+loHEsfSNNZ 8tN9EFsYhU3IHbnYGrzguUxe3ean0dXHEGVM1n+n6/sc1zCbNaICIfHQxAXGNK08wzXa DI3cZr6GFjQwZmNYrys3gYJVzFslBdKVhY2dZ1O0d6QyAe/CnYeJF1lAwHcmHmxNqWYB jpAJ2wFFWyIXqWaXj8FzR2IQENyxZkleibZavRYl0KleUBoBUjWZ+Sg0C5TsPyCibQ7G aEMmnAWY4dTv8KcfddKxjas7f5xcJMvnw7TVUv+Aiz9zPEB9VabakkWqmKZINQz4KPC2 Ra1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=82040SlXkePZdzPsM+5O3xrDuN6hQ94MWNkWdWB/RtM=; b=XZUWY8yVDxaO5/Bg7D3sSI5xuNkd9klCthmpcBYL1tz+CKOvJTNaS2XQ2zYcGR3Om9 koaCHWivEnMil0i/IDikTGlMX6nww1NEpVfQVTtQuF8Jn5jmQbhXIlSx5rax5TyiJ4f+ 1EC1fivG5dTcAhmavPVldb2Ezfy3r4mX2vSUlRokRGRS4FbPcJZISOPdJsqBOVph9VWp gX5+HRNHq5bRc3oXoAHsc3R0ORz93QcHfzO99Upe6aKbZ1nKJbBbnpyXY0XPFLHt/tzg //t1Gl0FeHXh204mk3Kfnk4DIvQGrYOqWig0syQ9IGlGnVXz8t8lEvocxsthfnLkm689 w/JQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x18si19320639ybj.403.2021.01.19.00.42.02 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Jan 2021 00:42:02 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:43272 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l1maP-00072L-NN for patch@linaro.org; Tue, 19 Jan 2021 03:42:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34454) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l1mVb-0008La-DD for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:37:03 -0500 Received: from mail-wm1-f50.google.com ([209.85.128.50]:40845) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l1mVZ-0003WI-1V for qemu-devel@nongnu.org; Tue, 19 Jan 2021 03:37:02 -0500 Received: by mail-wm1-f50.google.com with SMTP id c127so454462wmf.5 for ; Tue, 19 Jan 2021 00:37:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=82040SlXkePZdzPsM+5O3xrDuN6hQ94MWNkWdWB/RtM=; b=SOcNXFGq6JsB/0JhUXprh2DS4FlsHfu+L31+EpcMvotInLIiMhzAEX33bTYiuuG6eB MunPJV3PTskGk0vEoPyJFkc1bVtxNq4804liPVWS0QbnseVNmRCPt+gWGJ3AD86PRXEQ gTuRPlB1FZQOWQhERjtp1aqjiE6LOl7XPVWLJQY34MvNJi6gnxPDp9l+5+ctu3Ot/oTf oAm1jtp1qZWevMUA4sfjlY/WeVBJPZ9gVbqETgWHBaBgRrl7OmpFMD7bZbBeFyzC674W 0jayJqhHvOXOLqd+M+2STlHPdmEwnxLqNFOMCuRQaIvQqPGy+QTxy14dmSynFZVnBsZG l9Og== X-Gm-Message-State: AOAM533h+StK5wkYd3WarKKXzpmtSmDFxkpVC4P3+GGcX7dkEnYnqc0q nWK+8HvDL0m40Gr5seV8QL+GFgpTuA8= X-Received: by 2002:a7b:c31a:: with SMTP id k26mr2924228wmj.72.1611045419262; Tue, 19 Jan 2021 00:36:59 -0800 (PST) Received: from localhost.localdomain (pd9e83aed.dip0.t-ipconnect.de. [217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:59 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 10/11] hw/m68k/next-cube: Add vmstate for NeXTPC device Date: Tue, 19 Jan 2021 09:36:16 +0100 Message-Id: <20210119083617.6337-11-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.50; envelope-from=th.huth@gmail.com; helo=mail-wm1-f50.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Add the vmstate for the new NeXTPC devic; this is in theory a migration compatibility break, but this machine doesn't have working migration currently anyway. Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-11-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) -- 2.29.2 diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 1f6a2d58a1..92b45d760f 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -28,6 +28,7 @@ #include "qapi/error.h" #include "ui/console.h" #include "target/m68k/cpu.h" +#include "migration/vmstate.h" /* #define DEBUG_NEXT */ #ifdef DEBUG_NEXT @@ -891,6 +892,37 @@ static Property next_pc_properties[] = { DEFINE_PROP_END_OF_LIST(), }; +static const VMStateDescription next_rtc_vmstate = { + .name = "next-rtc", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT8_ARRAY(ram, NextRtc, 32), + VMSTATE_UINT8(command, NextRtc), + VMSTATE_UINT8(value, NextRtc), + VMSTATE_UINT8(status, NextRtc), + VMSTATE_UINT8(control, NextRtc), + VMSTATE_UINT8(retval, NextRtc), + VMSTATE_END_OF_LIST() + }, +}; + +static const VMStateDescription next_pc_vmstate = { + .name = "next-pc", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32(scr1, NeXTPC), + VMSTATE_UINT32(scr2, NeXTPC), + VMSTATE_UINT32(int_mask, NeXTPC), + VMSTATE_UINT32(int_status, NeXTPC), + VMSTATE_UINT8(scsi_csr_1, NeXTPC), + VMSTATE_UINT8(scsi_csr_2, NeXTPC), + VMSTATE_STRUCT(rtc, NeXTPC, 0, next_rtc_vmstate, NextRtc), + VMSTATE_END_OF_LIST() + }, +}; + static void next_pc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -899,7 +931,7 @@ static void next_pc_class_init(ObjectClass *klass, void *data) dc->realize = next_pc_realize; dc->reset = next_pc_reset; device_class_set_props(dc, next_pc_properties); - /* We will add the VMState in a later commit */ + dc->vmsd = &next_pc_vmstate; } static const TypeInfo next_pc_info = { From patchwork Tue Jan 19 08:36:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 366150 Delivered-To: patch@linaro.org Received: by 2002:a02:a60d:0:0:0:0:0 with SMTP id c13csp546182jam; Tue, 19 Jan 2021 00:42:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJz2KsNYQTGi/Px1Wso6YzBXz1eVx8RNMXtU/0a975m93W1UTwqyaMP2k+DxwnBe/P+Ol6d9 X-Received: by 2002:a25:ad41:: with SMTP id l1mr4476449ybe.98.1611045720560; Tue, 19 Jan 2021 00:42:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1611045720; cv=none; d=google.com; s=arc-20160816; b=NCg+BrgUQ06NaAMNxfXN/TSCbt7Lh8zTI7yo9+rnMECHs+0Nmx1Ks482AWvFZTVS4E 9Bm+O/08b6jV+KujGAKDYobLPvG29EXiczJJTanMUwx0GOuhiWfcTQpID0X9wgcYFv7x /6388POqNimWpCRl6YJ1dznJaqIHKX6+aZDVxYRPEuJWLgy1MJ44c3EHxG35tdBdBGm/ tH2m41B5nHGbM3gufeW0ZSoln8TOEYKKHuOYdYVAjgXHf5t3/EBWPc7rMzncBWIE3aFy L9tk1RuKo2oh6n0Qtr0xNDzohmOEuUTQBlHIQG0b4MC8q8VwOc1l2sAazr5TLuquTYm6 xnbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from; bh=9vd6hpkLzyfwiYIVLQKmNQ3i0ap+mf7O3NsDnvrqQJc=; b=i6K7Lb5m8/Yr6C9id1tpbuqcy0aK8UrosjR3SsmMxaUxEF1ZGxIZH5tJbKQFAUWiNG 86E75tfCk6AKaOXRyDOPkeMIi32IsIxuBYty9G3c+AZ9/eVfJRShpiBEDcQ0dymjwKqy hAJSaDFVcSxRQQQWsfWbEVJmRVngh5dfcmmwEesZY8RtLUGqUbLLhNDYrjLYL4NpW6VM 5IppX17gwVtMCj1KeThMoxgOQRhzBhNMK28ntvn3QzOBDCMNq7HAadXm+PT/ignbFTYh Hq5N/lAgZajNu1XkUtsNAZAnNRlnEU6QJco4AZofb9CN/OKlWqYTzNw4oQSNVMsqJGAu o2ng== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:59 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 11/11] hw/m68k/next-cube: Add missing header comment to next-cube.h Date: Tue, 19 Jan 2021 09:36:17 +0100 Message-Id: <20210119083617.6337-12-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.128.42; envelope-from=th.huth@gmail.com; helo=mail-wm1-f42.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The next-cube.h file is missing the usual copyright-and-license header; add it (same as the next-cube.c one). Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-12-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- include/hw/m68k/next-cube.h | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.29.2 diff --git a/include/hw/m68k/next-cube.h b/include/hw/m68k/next-cube.h index d38c52d540..43577282d1 100644 --- a/include/hw/m68k/next-cube.h +++ b/include/hw/m68k/next-cube.h @@ -1,3 +1,13 @@ +/* + * NeXT Cube + * + * Copyright (c) 2011 Bryce Lanham + * + * This code is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published + * by the Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + */ #ifndef NEXT_CUBE_H #define NEXT_CUBE_H