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Sun, 17 Jan 2021 18:49:18 -0800 Envelope-to: git@xilinx.com, michal.simek@xilinx.com, mdf@kernel.org, trix@redhat.com, robh+dt@kernel.org, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, chinnikishore369@gmail.com Received: from [10.140.6.60] (port=39926 helo=xhdnavam40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1l1KbV-0001PD-1j; Sun, 17 Jan 2021 18:49:17 -0800 From: Nava kishore Manne To: , , , , , , , CC: , , Nava kishore Manne Subject: [PATCH 1/3] drivers: firmware: Add Pdi load API support Date: Mon, 18 Jan 2021 08:13:16 +0530 Message-ID: <20210118024318.9530-1-nava.manne@xilinx.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5a7bb548-df3e-4bc5-4637-08d8bb5baa34 X-MS-TrafficTypeDiagnostic: CH2PR02MB6614: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:1824; 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DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2021 02:49:24.4106 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5a7bb548-df3e-4bc5-4637-08d8bb5baa34 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT029.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6614 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds load pdi api support to enable pdi/partial loading from linux. Programmable Device Image (PDI) is combination of headers, images and bitstream files to be loaded. Partial PDI is partial set of image/ images to be loaded. Signed-off-by: Nava kishore Manne --- drivers/firmware/xilinx/zynqmp.c | 17 +++++++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 9 +++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 7eb9958662dd..a466225b9f9e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -897,6 +897,23 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, } EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); +/** + * zynqmp_pm_load_pdi - Load and process pdi + * @src: Source device where PDI is located + * @address: Pdi src address + * + * This function provides support to load pdi from linux + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_load_pdi(const u32 src, const u64 address) +{ + return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src, + lower_32_bits(address), + upper_32_bits(address), 0, NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); + /** * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using * AES-GCM core. diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 2a0da841c942..87114ee645b1 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -52,6 +52,9 @@ #define ZYNQMP_PM_CAPABILITY_WAKEUP 0x4U #define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U +/* Loader commands */ +#define PM_LOAD_PDI 0x701 + /* * Firmware FPGA Manager flags * XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration @@ -354,6 +357,7 @@ int zynqmp_pm_write_pggs(u32 index, u32 value); int zynqmp_pm_read_pggs(u32 index, u32 *value); int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype); int zynqmp_pm_set_boot_health_status(u32 value); +int zynqmp_pm_load_pdi(const u32 src, const u64 address); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -538,6 +542,11 @@ static inline int zynqmp_pm_set_boot_health_status(u32 value) { return -ENODEV; } + +static inline int zynqmp_pm_load_pdi(const u32 src, const u64 address) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ From patchwork Mon Jan 18 02:43:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nava kishore Manne X-Patchwork-Id: 365701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33476C433E9 for ; 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Sun, 17 Jan 2021 18:49:21 -0800 From: Nava kishore Manne To: , , , , , , , CC: , , "Appana Durga Kedareswara rao" , Nava kishore Manne Subject: [PATCH 2/3] dt-bindings: fpga: Add binding doc for versal fpga manager Date: Mon, 18 Jan 2021 08:13:17 +0530 Message-ID: <20210118024318.9530-2-nava.manne@xilinx.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210118024318.9530-1-nava.manne@xilinx.com> References: <20210118024318.9530-1-nava.manne@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1552cab0-9ec4-4a4c-796f-08d8bb5bb2a3 X-MS-TrafficTypeDiagnostic: DM6PR02MB6348: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:2449; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ExyduI4f8xrC42gzwdtWs01uYXGz/GIx8j22SoQOAIhrc+cMjwO7CUjRD0Glt5PD4pQLUjmFrFlMULyJv6zJFQqGKfVk9Ot8eBICWxXy9A17aDrmUK/T99O9hZ7/oNhk4VdfSpAMtwMGJwpT/mgKpgW8qZeG6PF0W+lp8FX7XsHZrW6x5wnuijGx5wScgLO8+fvQLn4eQxmaNKTV8Kzkvr2CTKTiZ5i3GCNzlkyONEivXbQXmwmfuNwO1ZFt/2mhUNVwGghJzg9rF05EwMkZ1cBBfvyPjNOBCOI0SnPkT08GTIzAtioWuYACeEUzsobZ3uueqE/s1duGLBJTYHm0d/Ek9tuRoB9Ndigq4qIpItZfh4ejyKnf6qon8VFxPnTFvNzfBdiyTbfxv7JQLSWXpCyp0v/hCC1uWZ3f3Xf9VVBNMzAf9c5B40wwUAKLFYE6IE0XfNaneeoG4t8nwFsNSsN0/TcZy6/k5Npgj8RcCMIjlQam5lBM3p8/Zr3ZceFuQR04vUV8x0H4tWCPytkbR0xbxiLsd1zFwqFx+lvaIaghNntAtysV181UCbL2pDSCbxxVCqxWyaJeLE5hA3DtnQ== X-Forefront-Antispam-Report: CIP:149.199.62.198; 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Signed-off-by: Nava kishore Manne Signed-off-by: Appana Durga Kedareswara rao --- .../bindings/fpga/xlnx,versal-fpga.yaml | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml new file mode 100644 index 000000000000..cf3aa7917488 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/fpga/xilinx/xlnx,versal-fpga.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx versal-fpga driver. + +maintainers: + - Nava kishore Manne + +description: | +Device Tree versal-fpga bindings for the Versal SOC, Controlled +using Versal SoC firmware interface. + +properties: + compatible: + items: + - enum: + - xlnx,versal-fpga + +required: + - compatible + +Required properties: +- compatible: should contain "xlnx,versal-fpga" + +examples: + - | + versal_fpga: fpga { + compatible = "xlnx,versal-fpga"; + };