From patchwork Wed Feb 28 13:10:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 129986 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1008046lja; Wed, 28 Feb 2018 05:11:52 -0800 (PST) X-Google-Smtp-Source: AH8x224iEk856DcDQsgY0Qc/8Vw0SbMjKkrKAR2FZo0OwzTVDlLQ+OMtvh9e7ZLD33YnCmBLtoGl X-Received: by 10.98.83.6 with SMTP id h6mr17828377pfb.174.1519823512591; Wed, 28 Feb 2018 05:11:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519823512; cv=none; d=google.com; s=arc-20160816; b=CNypGqm0b/HAneYMR7xHdIFcmBYhKXDo7g+DZUOAjbsUUB+jPHhhPYEy2d4kLP4BIv 4orsrHaCteWensaCn0EUJzkGQFe92h5wdG4N1Mwe18CamuzP7PiRGupD3I+9NPFBa/s7 HMqxDycOzvPn8KDkQuMEvTeFEiYoW9c5AhyX9geI0i3clYv1hJJ78lA7I8Y4S0KQ83Ar kv80OM1UrfttxHqTtX6Y4R8TfCZqk/R5x9iIf4ot0I8Vivxq4rb+TP7C7jfujO3H6AB3 UMyRaFk+2BMNnso0qfpFDFuL0Tl0pRLib2QZlEKwooWfM0GRTN5nb4lDkQAz/ZQw+x3d KLPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=sJLicWGfhHbnrUplkTPyVXsEiw0XAYT6vEPhh2B+kLM=; b=gQ99+Eqe9Ykg9mutwISzAT8p0nbsGP0NAmCcYQx2Nq9/xO8bmirQHtkCEcqYdzPjty GGkzyyTDdp2vV8TcVqd6TZqKaCiTD7IkzmikWdqZ/kIQ54xpKfq8LRDuFvWJz8xJcZhW 8YOnvlVYxz87NHdyEpHWZOOrT5PQH15oG+AxZC8XXbi5lM9wsLV1rkwzrGuaHa9ot0Pa EvNIHyYUNNmywPd5pbo8X3LQJKSC1W1Ot/z3LG9dPkVu+FKDn89wbOaquw+kMXMULMvf vo17TkNRmgkprzOJd10cbD/twNIgAjby0P2fyA1PuQEotBdcj/4vWpjkBNGowHHQE7Gf QPZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w61-v6si1264584plb.733.2018.02.28.05.11.51; Wed, 28 Feb 2018 05:11:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752556AbeB1NLu (ORCPT + 6 others); Wed, 28 Feb 2018 08:11:50 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:35738 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752469AbeB1NLu (ORCPT ); Wed, 28 Feb 2018 08:11:50 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1SD9Aa0022358; Wed, 28 Feb 2018 14:11:05 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gbwb16w28-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 28 Feb 2018 14:11:05 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4D01A34; Wed, 28 Feb 2018 13:11:05 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 28D0B2B31; Wed, 28 Feb 2018 13:11:05 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 28 Feb 2018 14:11:04 +0100 From: Alexandre Torgue To: Maxime Coquelin , , , , , , CC: , , , Alexandre Torgue Subject: [PATCH v2 1/4] ARM: dts: stm32: add DMA memory pool on MCU which embed a cortex-M7 Date: Wed, 28 Feb 2018 14:10:55 +0100 Message-ID: <1519823458-27734-2-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> References: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-28_07:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On cortex-M7 MCU, DMA have to use a non cache-able memory area. For this reason a dedicated memory pool is created for DMA. This patch creates a DMA memory pool of 1MB of each STM32 MCU which embeds a cortex-M7 except stm32f746-disco. Indeed, as stm32f746-disco has only a 8MB SDRAM and it's tricky to reduce memory used by Kernel. Reviewed-by: Vladimir Murzin Signed-off-by: Alexandre Torgue -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts index e3f5a83..92651c3 100644 --- a/arch/arm/boot/dts/stm32746g-eval.dts +++ b/arch/arm/boot/dts/stm32746g-eval.dts @@ -58,6 +58,19 @@ reg = <0xc0000000 0x2000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc1f00000 0x100000>; + }; + }; + aliases { serial0 = &usart1; }; diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts index d712260..c526853 100644 --- a/arch/arm/boot/dts/stm32f769-disco.dts +++ b/arch/arm/boot/dts/stm32f769-disco.dts @@ -59,6 +59,19 @@ reg = <0xC0000000 0x1000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc0f00000 0x100000>; + }; + }; + aliases { serial0 = &usart1; }; diff --git a/arch/arm/boot/dts/stm32h743i-disco.dts b/arch/arm/boot/dts/stm32h743i-disco.dts index 45e088c..3689e70 100644 --- a/arch/arm/boot/dts/stm32h743i-disco.dts +++ b/arch/arm/boot/dts/stm32h743i-disco.dts @@ -57,6 +57,19 @@ reg = <0xd0000000 0x2000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc1f00000 0x100000>; + }; + }; + aliases { serial0 = &usart2; }; diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts index c7187e1..b9af696 100644 --- a/arch/arm/boot/dts/stm32h743i-eval.dts +++ b/arch/arm/boot/dts/stm32h743i-eval.dts @@ -57,6 +57,19 @@ reg = <0xd0000000 0x2000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,dma { + compatible = "shared-dma-pool"; + linux,dma-default; + no-map; + reg = <0xc1f00000 0x100000>; + }; + }; + aliases { serial0 = &usart1; }; From patchwork Wed Feb 28 13:10:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 129982 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1007882lja; Wed, 28 Feb 2018 05:11:43 -0800 (PST) X-Google-Smtp-Source: AG47ELu7lnJiZJ3/FFXKvkkJFBjei6Nz6CXDjbDbMNwM6kfd713tkJ1BMblxKEFf/MN+9CLl7gjZ X-Received: by 2002:a17:902:56c:: with SMTP id 99-v6mr3565296plf.53.1519823503273; Wed, 28 Feb 2018 05:11:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519823503; cv=none; d=google.com; s=arc-20160816; b=odYVzNpSW894cv/5z8j6TqKkVy8gCPeYCqveHJ4p0F3REs+okp2CaJNWJjBBjhH0J9 1XwtCtFZaU+SwoKYd3bXlaS47qQysLHsvorP9JViipV2MRgArqYUYg/KQCstxdiCpNt4 BQ3eQ+DC6M8971q6MztrFJtPPiFDdRXWaNf+vduII20cu3KgFZHHO1B83Okbw2Umx6zD icxVMOZ+DdxUfDzJOT7wDwRh8z40cAzXNtC0E4WZSUT6Gg7q6LYUeK5JxeehPigVseJ4 fOAXy0z5/ddMlAjNqkJ7b8LevEwnh4+giVf9PbqxqCWdOaGkHyJiKgNdZgueqBYmYZSd ipvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=EPNscPpT8LkC4f8dtNKEUAZ8dIfwuEd1DUORWQwe7jE=; b=wg7oMlfSB/hYAWSP+5hlud9rnquIQIFkFo7rVZpStj8SyaDP121BVyyUCagyUAA2hL SjYJQmgBosCK5CLthJMchHUv923yDbFV5mjji8NwyclkoE5qAV6Kq/IT+e7RXheSSrx2 glRtHzN4yb+mLBc6LrnrEBjZ0uqQVYeuKeyxAB5mHE5psqiF+ll4N7CxDEi7v4MErctO ndj5BjDSHVpL6v8zxFrlDpieGX7oYUGM+E867dcnW4rvq9HE6+xkhwe8hKyTpWb9R6Xx 3Uw24/CNX9p/zU/wxcJ3IRdhUlIbehPVTOam2eY9TcnPUfbdq4NR2HSWaVb+fr43nUZ2 G1Tw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w61-v6si1264584plb.733.2018.02.28.05.11.42; Wed, 28 Feb 2018 05:11:43 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752229AbeB1NLl (ORCPT + 6 others); Wed, 28 Feb 2018 08:11:41 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:9350 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752157AbeB1NLl (ORCPT ); Wed, 28 Feb 2018 08:11:41 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1SD98s8022349; Wed, 28 Feb 2018 14:11:06 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gbwb16w29-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 28 Feb 2018 14:11:06 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4ACAB31; Wed, 28 Feb 2018 13:11:06 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BE4172B31; Wed, 28 Feb 2018 13:11:05 +0000 (GMT) Received: from localhost (10.75.127.51) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 28 Feb 2018 14:11:05 +0100 From: Alexandre Torgue To: Maxime Coquelin , , , , , , CC: , , , Alexandre Torgue Subject: [PATCH v2 2/4] ARM: configs: stm32: remove XIP configuration Date: Wed, 28 Feb 2018 14:10:56 +0100 Message-ID: <1519823458-27734-3-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> References: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG5NODE2.st.com (10.75.127.14) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-28_07:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Embedded flash becomes too small to be used as XIP support. SD card is now available on most of stm32 boards and could be used as boot support. Furthermore, ARM_MPU flags will be used by default and it imposes that XIP image to be aligned on 1MB (which is not the case). For all those reasons I prefer to remove XIP configuration from default stm32 config and let user configure it if needed. Signed-off-by: Alexandre Torgue -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig index ba805b7..b162b8d 100644 --- a/arch/arm/configs/stm32_defconfig +++ b/arch/arm/configs/stm32_defconfig @@ -28,8 +28,6 @@ CONFIG_PREEMPT=y # CONFIG_ATAGS is not set CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_XIP_KERNEL=y -CONFIG_XIP_PHYS_ADDR=0x08008000 CONFIG_BINFMT_FLAT=y CONFIG_BINFMT_SHARED_FLAT=y # CONFIG_COREDUMP is not set From patchwork Wed Feb 28 13:10:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 129983 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1007947lja; Wed, 28 Feb 2018 05:11:46 -0800 (PST) X-Google-Smtp-Source: AH8x2259xqUTxXvc2hF4JXOmA5jnVusUNtoWxJqfXXR/9tJBAa4ZgqgJCeRMjSqd1VEnoFiBpdD/ X-Received: by 10.98.74.67 with SMTP id x64mr17706241pfa.135.1519823506521; Wed, 28 Feb 2018 05:11:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519823506; cv=none; d=google.com; s=arc-20160816; b=mPlUPZPANuFDPrCnoWfnowuWLnsDxuoskO2uYQ7Ohpjs1Dkc/t0OEJN1JBWgoVeLKq nc5Zi+Hc5CsG6MfTXOQi6NNB4U+iJcl8Nq3NTeh81UlTFfF4tucPiS4WIb/lYelKzGHa eutx93joEBbR73RXfqx6R5IRBEs+887DsjptArEutAyzA3qSnWv5yAKdWjxzWUaFffl3 1Vr4gjF+cAYVAHrQPUWznbAEvxmdjQ4/HPmDC8pfyhfchiNIVSp6pkFn6gw2RxPbIAGi IN4+MDmvniNQdxNzRclTg3TyYYQNGLE6qQEANeTLadpyonzO6Ru4awELTWmCyJqepeTN PQVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=WF0B8aejGrDoYEYx4mIUi9SuOlSVyooSQ2P81m9FB6E=; b=0bQHRtjbBTSe20c2swUembLeMMB3oDTt6NdbjdXRfBmCZttjlpec/NUz7CwrgsgoUp kKN8PAq6fTDfFxefBSAhIOKjMH+gsqXU0VCE1iz40Ua0lVqMN1qF1LhfjwbiALkbBneX YzCnCAfO3UCW7yS09heo8krZ+jzJm25T+nt5GbJlJzx4mcUf3pYb3JX0E7giHhxUCFHc I9bHuRMVcG8NPHDX+jq5DkCP2ajDqJ8DZ4oMekzvuG5lmpdaAT1OS94uZn8kyQR7qH+0 ZJ442vIb5sRtnx/58oy3USrZ+08qKCjNMTA+P3VQy5JmU0waP8Mh+8h7EvFrb920MWKL T7ew== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w61-v6si1264584plb.733.2018.02.28.05.11.46; Wed, 28 Feb 2018 05:11:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752488AbeB1NLp (ORCPT + 6 others); Wed, 28 Feb 2018 08:11:45 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:20511 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752325AbeB1NLo (ORCPT ); Wed, 28 Feb 2018 08:11:44 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1SD9Aa1022358; Wed, 28 Feb 2018 14:11:07 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gbwb16w2b-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 28 Feb 2018 14:11:07 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 82A0C34; Wed, 28 Feb 2018 13:11:06 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 60C2A2B33; Wed, 28 Feb 2018 13:11:06 +0000 (GMT) Received: from localhost (10.75.127.48) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 28 Feb 2018 14:11:05 +0100 From: Alexandre Torgue To: Maxime Coquelin , , , , , , CC: , , , Alexandre Torgue Subject: [PATCH v2 3/4] ARM: stm32: Select ARM_MPU for cortex-M7 machines Date: Wed, 28 Feb 2018 14:10:57 +0100 Message-ID: <1519823458-27734-4-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> References: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-28_07:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org STM32 MCUs embed a Memory Protection Unit. Enabling ARM_MPU flag will allow the Kernel to configure the MPU according to the devicetree. Signed-off-by: Alexandre Torgue -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index 713c068..c2ad8e9 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -29,15 +29,18 @@ config MACH_STM32F469 config MACH_STM32F746 bool "STMicroelectronics STM32F746" select ARM_AMBA + select ARM_MPU default y config MACH_STM32F769 bool "STMicroelectronics STM32F769" select ARM_AMBA + select ARM_MPU default y config MACH_STM32H743 bool "STMicroelectronics STM32H743" + select ARM_MPU default y endif # ARMv7-M From patchwork Wed Feb 28 13:10:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 129984 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1007969lja; Wed, 28 Feb 2018 05:11:47 -0800 (PST) X-Google-Smtp-Source: AH8x227yFz0fKYrL+8PrFqJCls3XwQOubPT+wtEj7THinamM/MPRKXY5HUK16T/3K6DKmwUEBBOr X-Received: by 2002:a17:902:9042:: with SMTP id w2-v6mr17695170plz.156.1519823507469; Wed, 28 Feb 2018 05:11:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519823507; cv=none; d=google.com; s=arc-20160816; b=C57Pfsu0FujmMsTCYn+wRBBlmDXTj/1cWTz/OQS/UsR5pjoIwH2kAARcMDK0B3Ydoq EcUWCzbFoRmlGoFN+dnuPWMP5IeHGZOcIDP8zRTc7jkmabloYyTPZBjyCGkM2PHFMqWj YxDxSzvdNa91gSV+ShA3rMQqLjnIeUxiI1EhQ8VrIH8t9Oyh3MXnakZyG3Y79IKTitmd Fs+/s8Oqi8626Tg9W3IzwVn68ijUHjFy8PpdOUkb/y2ynnjRzdDAR2WLcjtOvVFzds/S odsiP1OBFfGHmWmfziAGkWJyc0HF57KikSGmPJ6yCG8HPGB3MRnfCB2Oq0PAP0vBDP76 dd9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=Z22+s0q+oUuZ7XMGYIcezQ/a8duRxrmTOf+fKDvmuqc=; b=rryLx0hEx32VaOkxap64v2vmcF2P7Dxjm7rnX4xp+JFND9ercYbBdKNw4hehaQSnX/ 1M68lUqukTxlE0VJ2j8+7+fnPxwcwbwNfXFYfJJhn9g93rfoAVr+d33yy5j7UM8hicui icVAFQZb/YlU6U3Pg31BTg+sy9E0mE4nALDjf4jCE/zVZ3OgtnNlGSIqdBMucBTekgEC PLL7IWTB8gkhOpWd1KT7s7ekka0TLMqdCuK+MTLNZtt0GroM4EYelemZEeogMugChlao jH1twkgCsuNWqdr/PZFgH7skHXt6rqrwaf+sHsyCjWxAp3D4Yle9jlSkAtu784Bt/j58 254A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w61-v6si1264584plb.733.2018.02.28.05.11.47; Wed, 28 Feb 2018 05:11:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752325AbeB1NLq (ORCPT + 6 others); Wed, 28 Feb 2018 08:11:46 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:60126 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752469AbeB1NLp (ORCPT ); Wed, 28 Feb 2018 08:11:45 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1SD3qQ6022171; Wed, 28 Feb 2018 14:11:07 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gaxpwkpx1-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 28 Feb 2018 14:11:07 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 244DF31; Wed, 28 Feb 2018 13:11:07 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 07CF92B31; Wed, 28 Feb 2018 13:11:07 +0000 (GMT) Received: from localhost (10.75.127.48) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 28 Feb 2018 14:11:06 +0100 From: Alexandre Torgue To: Maxime Coquelin , , , , , , CC: , , , Alexandre Torgue Subject: [PATCH v2 4/4] ARM: dts: stm32: enable dma on MCU which embed a cortex-M7 Date: Wed, 28 Feb 2018 14:10:58 +0100 Message-ID: <1519823458-27734-5-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> References: <1519823458-27734-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-28_07:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable dma1 and dma2 on: -stm32746g-eval board -stm32f769-disco board -stm32h743i-disco board -stm32h743i-eval board Signed-off-by: Alexandre Torgue -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts index 92651c3..c87e289 100644 --- a/arch/arm/boot/dts/stm32746g-eval.dts +++ b/arch/arm/boot/dts/stm32746g-eval.dts @@ -114,6 +114,14 @@ status = "okay"; }; +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + &i2c1 { pinctrl-0 = <&i2c1_pins_b>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts index c526853..3985c6d 100644 --- a/arch/arm/boot/dts/stm32f769-disco.dts +++ b/arch/arm/boot/dts/stm32f769-disco.dts @@ -117,6 +117,14 @@ clock-frequency = <25000000>; }; +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + &rtc { status = "okay"; }; diff --git a/arch/arm/boot/dts/stm32h743i-disco.dts b/arch/arm/boot/dts/stm32h743i-disco.dts index 3689e70..e1623e3 100644 --- a/arch/arm/boot/dts/stm32h743i-disco.dts +++ b/arch/arm/boot/dts/stm32h743i-disco.dts @@ -79,6 +79,14 @@ clock-frequency = <25000000>; }; +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + &usart2 { pinctrl-0 = <&usart2_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/stm32h743i-eval.dts b/arch/arm/boot/dts/stm32h743i-eval.dts index b9af696..3a1f471 100644 --- a/arch/arm/boot/dts/stm32h743i-eval.dts +++ b/arch/arm/boot/dts/stm32h743i-eval.dts @@ -105,6 +105,14 @@ clock-frequency = <25000000>; }; +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + &rtc { status = "okay"; };