From patchwork Fri Jan 15 20:19:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 364797 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8564C433E0 for ; Fri, 15 Jan 2021 20:20:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7B14723A9C for ; Fri, 15 Jan 2021 20:20:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731808AbhAOUUo (ORCPT ); Fri, 15 Jan 2021 15:20:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726519AbhAOUUn (ORCPT ); Fri, 15 Jan 2021 15:20:43 -0500 Received: from mail-io1-xd34.google.com (mail-io1-xd34.google.com [IPv6:2607:f8b0:4864:20::d34]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A726C0613C1; Fri, 15 Jan 2021 12:20:03 -0800 (PST) Received: by mail-io1-xd34.google.com with SMTP id e22so20550426iom.5; Fri, 15 Jan 2021 12:20:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kApooGQIwOz07p5AA8OncskjV3Mmhq6kMk2+q5JbFGw=; b=V8jm0deTdWBNjdquMSgeGJw0ktNTDFf/TTeqeCZ5OHBmt0JBNeGV4v+uDGQ41/DcVf Kq4QH61o4XpHgG5VoNLnqSbuoHQotIsMevw41/q2NMXnRhVb/mq8DV65C/7d9hk6kY83 zQ5GvL9jVIxvqGODcxrnLSywa0+rVgdm4+WXkKXXb+w9naXbZXvga+iW6A7lz93CZFmO hOwUwmWkgTVfmDlNrXPoo11Pbrdaa6F2YU1mSMdRhUU5GaUxUuh1iV8oTXXsgiOEA9LZ t320nNQhaWpJdnk5/WGcRefoU8sABoP91zsz8mjoOZZtKCY8XtGBMdYgv+JIzRJ+GtI0 Q4Sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kApooGQIwOz07p5AA8OncskjV3Mmhq6kMk2+q5JbFGw=; b=CR9/Pz6opaJ7QJpraSIlMBV7gXwG2SHGI9BAA3BcX2friEED0vOc1VcbAvn6KeLBYW jxucUDvTEfIjUwk0ymY8ojHFgRkT50pygOc3CIy6TATe0XqE5ETVPBqgZYLrRRp7ccyK loaI81lKHiWrf4s+2GkvwNNBNI1ZiQz5BkY+FQyZJLMaaUyXup3EliUjEeXBBgTss0oJ V89IbjZIJfK1mY4qFigiepkfm5A+pGpNdp+MuNy6xKrT/4MkvnfAPB0Or/2t5+mUGwF0 QGOQVSBd3jiMaEZ1/Hmqe+0Fr6AYPCDdadWEx4lZ/H8ivu32x5jJ2AvnU/n2DXYTbyjp a9Tw== X-Gm-Message-State: AOAM533BvwNJ+idu4xEfJS0SNr/n9OQg+QKy9rDknILJY6hIySnOkhs3 tAv9nzzdfgWHg1q9qYTjsvfN/JP8Wo65z3gP X-Google-Smtp-Source: ABdhPJzr9pTfqOqoKR99Fz8HCYGVkKvwaWFUPCB+qc6i4IXKH8Cq/kVWv7pom4eYem4Ru6B7TuNXWw== X-Received: by 2002:a92:d40a:: with SMTP id q10mr12535083ilm.20.1610742000544; Fri, 15 Jan 2021 12:20:00 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:475c:c79e:a431:bccb]) by smtp.gmail.com with ESMTPSA id e28sm4194900iov.38.2021.01.15.12.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 12:19:59 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Rob Herring , Sergei Shtylyov , "David S. Miller" , Jakub Kicinski , Rob Herring , Magnus Damm , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 1/4] dt-bindings: net: renesas, etheravb: Add additional clocks Date: Fri, 15 Jan 2021 14:19:48 -0600 Message-Id: <20210115201953.443710-1-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The AVB driver assumes there is an external crystal, but it could be clocked by other means. In order to enable a programmable clock, it needs to be added to the clocks list and enabled in the driver. Since there currently only one clock, there is no clock-names list either. Update bindings to add the additional optional clock, and explicitly name both of them. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- .../devicetree/bindings/net/renesas,etheravb.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) V2: Change name from TXC Refclock to refclock The r-b and a-b notes were pulled from patchwork. diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml index 244befb6402a..9f84d9c6f141 100644 --- a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml +++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml @@ -49,7 +49,16 @@ properties: interrupt-names: true clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 + items: + - description: AVB functional clock + - description: Optional reference clock + + clock-names: + items: + - const: fck + - const: refclk iommus: maxItems: 1 From patchwork Fri Jan 15 20:19:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 363958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 079FCC432C3 for ; Fri, 15 Jan 2021 20:21:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D319723A75 for ; Fri, 15 Jan 2021 20:21:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388496AbhAOUUt (ORCPT ); Fri, 15 Jan 2021 15:20:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388325AbhAOUUp (ORCPT ); Fri, 15 Jan 2021 15:20:45 -0500 Received: from mail-io1-xd2f.google.com (mail-io1-xd2f.google.com [IPv6:2607:f8b0:4864:20::d2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67EE1C061793; Fri, 15 Jan 2021 12:20:05 -0800 (PST) Received: by mail-io1-xd2f.google.com with SMTP id b19so18058635ioa.9; Fri, 15 Jan 2021 12:20:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JPp2MICEAg6U/ik/5DIk7A+2LVzYjg/o/oLNwTffQ30=; b=LV79N7zy+K4lisf9lSupt9hMIYTafWKlHc/LuGvxy1/pqtrGuuFINZ+RwAXmT2EeZV /Oqnw2xL8GvSO8Tx2pP2hdnIISKrZBagwtqh2Qi/gphP7eUDobFrwFhUBIZ8UbphOihk GJtnuEQUOxQ+ARw+jyX0BBk2C7fMK2JauUJ4LZGfVuUyEpJy84YB08xBLp51G+Y4ywma ep74eVz5XkxKDcjHC2ngwlZeX96XwP47aEeRb1sz9M656YNT69x69VM1l2nPCdrA0D1i CylR8xEL9zXkJV9sz4d6aZ5bEPIlW6txdyHSDhVdMFvuf/sbDA4ApQNDXelPHb9M9CEk Lj3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JPp2MICEAg6U/ik/5DIk7A+2LVzYjg/o/oLNwTffQ30=; b=T8psi9Xp7xcp2PeuJ7YuDyF7v57quqaWNlkySMdwjq7UK8Ch613lp/t3WBme63/mpp nWBbdtPIFKC+I9eSXqppAfiCqKpGQdeaMy7tbbd/QGLlXJ244Rc0aVuPyQ587KVcnRnG E9x0zxINJqCz8Jz/wyyr64KtiIClgi3us6K/MbBfBj0rKHCY1eSRZzgahpcwKCUmQVzs jywLkNxoZMs3hCMb+g1bc0/ZqAvRsFqz2SJVuGuM14I2cJ3y1tm+CLCXFFJqqwfkB/sL dQ780gYNF1+3NeTcPcd92TULBgfp/GtofAHXNTXzR/9jQ9xGUa8X1iKWMbbm/0+EmQf1 jKWg== X-Gm-Message-State: AOAM5321q1pFWVlztsdE5KIBigRJVEiPVPFT2GWPbWu2Q91KG6y0r0xh tCKvIkPvs/oqPl1dEm6I+bXEYhp1TU3SCltD X-Google-Smtp-Source: ABdhPJyHKEeDnonZoqGOWu5d2fOj1HwjGWnH6m7YAbVrZXw4JkqMMG6lLJib+RA89EGhi4ah43873g== X-Received: by 2002:a05:6e02:929:: with SMTP id o9mr11920262ilt.42.1610742003860; Fri, 15 Jan 2021 12:20:03 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:475c:c79e:a431:bccb]) by smtp.gmail.com with ESMTPSA id e28sm4194900iov.38.2021.01.15.12.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 12:20:03 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Sergei Shtylyov , "David S. Miller" , Jakub Kicinski , Rob Herring , Magnus Damm , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 2/4] ARM: dts: renesas: Add fck to etheravb-rcar-gen2 clock-names list Date: Fri, 15 Jan 2021 14:19:49 -0600 Message-Id: <20210115201953.443710-2-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115201953.443710-1-aford173@gmail.com> References: <20210115201953.443710-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The bindings have been updated to support two clocks, but the original clock now requires the name fck. Add a clock-names list in the device tree with fck in it. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7742.dtsi | 1 + arch/arm/boot/dts/r8a7743.dtsi | 1 + arch/arm/boot/dts/r8a7744.dtsi | 1 + arch/arm/boot/dts/r8a7745.dtsi | 1 + arch/arm/boot/dts/r8a77470.dtsi | 1 + arch/arm/boot/dts/r8a7790.dtsi | 1 + arch/arm/boot/dts/r8a7791.dtsi | 1 + arch/arm/boot/dts/r8a7792.dtsi | 1 + arch/arm/boot/dts/r8a7794.dtsi | 1 + 9 files changed, 9 insertions(+) V2: No change diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi index 6a78c813057b..6b922f664fcd 100644 --- a/arch/arm/boot/dts/r8a7742.dtsi +++ b/arch/arm/boot/dts/r8a7742.dtsi @@ -750,6 +750,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7742_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index f444e418f408..084bf3e039cf 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -702,6 +702,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi index 0442aad4f9db..d01eba99ceb0 100644 --- a/arch/arm/boot/dts/r8a7744.dtsi +++ b/arch/arm/boot/dts/r8a7744.dtsi @@ -702,6 +702,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 0f14ac22921d..d0d45a369047 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -645,6 +645,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 691b1a131c87..ae90a001d663 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -537,6 +537,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index b0569b4ea5c8..af9cd3324f4c 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -768,6 +768,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 87f0d6dc3e5a..2354af7fa83f 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -728,6 +728,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index f5b299bfcb23..60c184ab1b49 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -537,6 +537,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index cd5e2904068a..18cc6f6b588d 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -598,6 +598,7 @@ avb: ethernet@e6800000 { reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; interrupts = ; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; resets = <&cpg 812>; #address-cells = <1>; From patchwork Fri Jan 15 20:19:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 364796 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DB62C43331 for ; Fri, 15 Jan 2021 20:21:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E692223A5A for ; Fri, 15 Jan 2021 20:21:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388588AbhAOUVG (ORCPT ); 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Fri, 15 Jan 2021 12:20:05 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Sergei Shtylyov , "David S. Miller" , Jakub Kicinski , Rob Herring , Magnus Damm , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 3/4] arm64: dts: renesas: Add fck to etheravb-rcar-gen3 clock-names list Date: Fri, 15 Jan 2021 14:19:50 -0600 Message-Id: <20210115201953.443710-3-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115201953.443710-1-aford173@gmail.com> References: <20210115201953.443710-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The bindings have been updated to support two clocks, but the original clock now requires the name fck. Add a clock-names list in the device tree with fck in it. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77951.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77960.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77961.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77990.dtsi | 1 + arch/arm64/boot/dts/renesas/r8a77995.dtsi | 1 + 12 files changed, 12 insertions(+) V2: No change diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index d64fb8b1b86c..ec4feb7df775 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -1127,6 +1127,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 5b05474dc272..1ff62b2be1f3 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -1001,6 +1001,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 20fa3caa050e..a4d9c6b31574 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -957,6 +957,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index 8eb006cbd9af..fec5839163ec 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -1230,6 +1230,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi index 5c39152e4570..1e622ab8a044 100644 --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi @@ -1312,6 +1312,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi index 25d947a81b29..a3d1c33cbc1d 100644 --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi @@ -1188,6 +1188,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index e8c31ebec097..55a3ba3c844f 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -1144,6 +1144,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 657b20d3533b..dd4c0e621b9c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -1050,6 +1050,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 5a5d5649332a..d4b0b9952619 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -612,6 +612,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi index ec7ca72399ec..992a577a3b17 100644 --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -664,6 +664,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 5010f23fafcc..cc56267e0850 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -1000,6 +1000,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 2319271c881b..84dba3719381 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -760,6 +760,7 @@ avb: ethernet@e6800000 { "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; From patchwork Fri Jan 15 20:19:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 363959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 884A0C433E6 for ; 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Fri, 15 Jan 2021 12:20:11 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:475c:c79e:a431:bccb]) by smtp.gmail.com with ESMTPSA id e28sm4194900iov.38.2021.01.15.12.20.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 12:20:10 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Sergei Shtylyov , "David S. Miller" , Jakub Kicinski , Rob Herring , Geert Uytterhoeven , Magnus Damm , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 4/4] net: ethernet: ravb: Enable optional refclk Date: Fri, 15 Jan 2021 14:19:51 -0600 Message-Id: <20210115201953.443710-4-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115201953.443710-1-aford173@gmail.com> References: <20210115201953.443710-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For devices that use a programmable clock for the avb reference clock, the driver may need to enable them. Add code to find the optional clock and enable it when available. Signed-off-by: Adam Ford --- drivers/net/ethernet/renesas/ravb.h | 1 + drivers/net/ethernet/renesas/ravb_main.c | 8 ++++++++ 2 files changed, 9 insertions(+) V2: The previous patch to fetch the fclk was dropped. In its place is code to enable the refclk diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 7453b17a37a2..ff363797bd2b 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -994,6 +994,7 @@ struct ravb_private { struct platform_device *pdev; void __iomem *addr; struct clk *clk; + struct clk *refclk; struct mdiobb_ctrl mdiobb; u32 num_rx_ring[NUM_RX_QUEUE]; u32 num_tx_ring[NUM_TX_QUEUE]; diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index bd30505fbc57..739e30f45daa 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -2148,6 +2148,14 @@ static int ravb_probe(struct platform_device *pdev) goto out_release; } + priv->refclk = devm_clk_get_optional(&pdev->dev, "refclk"); + if (IS_ERR(priv->refclk)) { + error = PTR_ERR(priv->refclk); + goto out_release; + } else { + (void)clk_prepare_enable(priv->refclk); + } + ndev->max_mtu = 2048 - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); ndev->min_mtu = ETH_MIN_MTU;