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[194.187.74.233]) by smtp.gmail.com with ESMTPSA id c24sm151727ljn.116.2021.01.13.03.10.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Jan 2021 03:10:05 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= To: Florian Fainelli Cc: bcm-kernel-feedback-list@broadcom.com, Rob Herring , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH V2] arm64: dts: broadcom: bcm4908: describe internal switch Date: Wed, 13 Jan 2021 12:09:46 +0100 Message-Id: <20210113110946.19614-1-zajec5@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210112131727.19020-1-zajec5@gmail.com> References: <20210112131727.19020-1-zajec5@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Rafał Miłecki BCM4908 has internal switch with 5 GPHYs. Ports 0 - 3 are always connected to the internal PHYs. Remaining ports depend on device setup. Asus GT-AC5300 has an extra switch with its PHYs accessible using the internal MDIO. CPU port and Ethernet interface remain to be documented. --- V2: Use simple-bus --- .../bcm4908/bcm4908-asus-gt-ac5300.dts | 51 +++++++++++ .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 85 ++++++++++++++++++- 2 files changed, 135 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts index 13c6b86eef21..51305e96fbd6 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts @@ -44,6 +44,57 @@ brightness { }; }; +&ports { + port@0 { + label = "lan2"; + }; + + port@1 { + label = "lan1"; + }; + + port@2 { + label = "lan6"; + }; + + port@3 { + label = "lan5"; + }; + + /* External BCM53134S switch */ + port@7 { + label = "sw"; + reg = <7>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; +}; + +&mdio { + /* lan8 */ + phy@0 { + reg = <0>; + }; + + /* lan7 */ + phy@1 { + reg = <1>; + }; + + /* lan4 */ + phy@2 { + reg = <2>; + }; + + /* lan3 */ + phy@3 { + reg = <3>; + }; +}; + &nandcs { nand-ecc-strength = <4>; nand-ecc-step-size = <512>; diff --git a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi index b5b772a9a51b..d30dd2042786 100644 --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi @@ -108,7 +108,7 @@ soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x00 0x00 0x80000000 0x10000>; + ranges = <0x00 0x00 0x80000000 0xd0000>; usb@c300 { compatible = "generic-ehci"; @@ -130,6 +130,89 @@ usb@d000 { interrupts = ; status = "disabled"; }; + + switch@80000 { + compatible = "simple-bus"; + #size-cells = <1>; + #address-cells = <1>; + ranges = <0 0x80000 0x50000>; + + switch@0 { + compatible = "brcm,bcm4908-switch"; + reg = <0x0 0x40000>, + <0x40000 0x110>, + <0x40340 0x30>, + <0x40380 0x30>, + <0x40600 0x34>, + <0x40800 0x208>; + reg-names = "core", "reg", "intrl2_0", + "intrl2_1", "fcb", "acb"; + interrupts = , + ; + brcm,num-gphy = <5>; + brcm,num-rgmii-ports = <2>; + + #address-cells = <1>; + #size-cells = <0>; + + ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + phy-mode = "internal"; + phy-handle = <&phy8>; + }; + + port@1 { + reg = <1>; + phy-mode = "internal"; + phy-handle = <&phy9>; + }; + + port@2 { + reg = <2>; + phy-mode = "internal"; + phy-handle = <&phy10>; + }; + + port@3 { + reg = <3>; + phy-mode = "internal"; + phy-handle = <&phy11>; + }; + }; + }; + + mdio: mdio@405c0 { + compatible = "brcm,unimac-mdio"; + reg = <0x405c0 0x8>; + reg-names = "mdio"; + #size-cells = <1>; + #address-cells = <0>; + + phy8: phy@8 { + reg = <8>; + }; + + phy9: phy@9 { + reg = <9>; + }; + + phy10: phy@a { + reg = <10>; + }; + + phy11: phy@b { + reg = <11>; + }; + + phy12: phy@c { + reg = <12>; + }; + }; + }; }; bus@ff800000 {