From patchwork Thu Jan 14 10:36:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King \(Oracle\)" X-Patchwork-Id: 363026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F8DEC433DB for ; Thu, 14 Jan 2021 10:37:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3510E23A50 for ; Thu, 14 Jan 2021 10:37:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726224AbhANKhB (ORCPT ); Thu, 14 Jan 2021 05:37:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726055AbhANKhB (ORCPT ); Thu, 14 Jan 2021 05:37:01 -0500 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76109C061573 for ; Thu, 14 Jan 2021 02:36:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:Reply-To:Content-ID :Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To: Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=uLcY4hZ13rDiaqM8tgTddOcC746c7uajEtM1QV9jr7w=; b=M2VosPCkJNRyDFwFQSOsNeh2+7 fMxa/RNxMjeW4EpSrVpSz1/YWJ622fEP/rIJZfaCpdOaE/JcI8DwI1tXHUPJ/XfSeg/DETe8BEsEV ANeSYuiAPm32KSkBnlvRLKoOuWSHHYsL01CaAQKHTLp88SKp/agx77o6Ud3O8PUciK4H7K7E3b2Z/ oT5vPdvB/NQ/TVcQ8THMMejtUGjFuuff/HZWQayyP0CI3wxN1p44Suee+zqy/qjbIlGKoXAWOU2cY ibMEus+ORaKobC0U/pc//g3oGPAey8D6r6nXImL3QxjdorhIk/YqLuhTqWBiT8LUoQD6iZ4ZJzdby qB4pvfoA==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:55586 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kzzzD-0002JN-4b; Thu, 14 Jan 2021 10:36:15 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1kzzzC-0004lA-UB; Thu, 14 Jan 2021 10:36:14 +0000 From: Russell King To: Shawn Guo Cc: Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Thu, 14 Jan 2021 10:36:14 +0000 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The PHY address bit 2 is configured by the LED pin. Attaching a LED to this pin is not sufficient to guarantee this configuration pin is correctly read. This leads to some platforms having their PHY at address 0 and others at address 4. If there is no phy-handle specified, the FEC driver will scan the PHY bus for a PHY and use that. Consequently, adding the DT configuration of the PHY and the phy properties to the FEC driver broke some boards. Fix this by removing the phy-handle property, and listing two PHY entries for both possible PHY addresses, so that the DT configuration for the PHY can be found by the PHY driver. Fixes: 86b08bd5b994 ("ARM: dts: imx6-sr-som: add ethernet PHY configuration") Reported-by: Christoph Mattheis Signed-off-by: Russell King --- arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi index b06577808ff4..bba21dfef103 100644 --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi @@ -53,7 +53,6 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; - phy-handle = <&phy>; phy-mode = "rgmii-id"; phy-reset-duration = <2>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; @@ -63,7 +62,15 @@ #address-cells = <1>; #size-cells = <0>; - phy: ethernet-phy@0 { + /* + * The PHY can appear at either address 0 or 4 due to the + * configuration (LED) pin not being pulled sufficiently. + */ + ethernet-phy@0 { + reg = <0>; + qca,clk-out-frequency = <125000000>; + }; + ethernet-phy@4 { reg = <0>; qca,clk-out-frequency = <125000000>; };