From patchwork Wed Jan 13 20:19:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steen Hegelund X-Patchwork-Id: 362284 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E56DC433E9 for ; Wed, 13 Jan 2021 20:21:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BE44D22CE3 for ; Wed, 13 Jan 2021 20:21:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728773AbhAMUUu (ORCPT ); Wed, 13 Jan 2021 15:20:50 -0500 Received: from esa.microchip.iphmx.com ([68.232.154.123]:23691 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725804AbhAMUUs (ORCPT ); Wed, 13 Jan 2021 15:20:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1610569247; x=1642105247; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7dbWcybAcPSCs9JfAgrdc5kMVgaiF/4Xqgv+SIR8YsI=; b=IVpF718BZYB942eRrBJFHQwbB1E7LhLyC3yvp8upvKj579If4mZufyKc JN28gfztQa1TcXLYo/qVQdR/+QjG3DYaMbyXLmMYESTo4T4OJ2EChbNKd rWFZpcfUBj5QNKcSORgNokpx79vOBJgvurtgZ5OR3Nbavq9EzD3YJTSYV b/N/hPJYbfh7lCdKZ4NqW2+F1IibG6SyefpoMuiFQki+7rnJL4Pbp/Q83 vNWs/r4DLrhnR4Fhz/hkCfDBXzNPQQEolzccTzhqxV/oP1EZOjs+WPx7E QZKu0OkbUmkqgMr74Y57zyFlOLIX3QsvItshB+qWVsZ32GWqrIkYnPj9m Q==; IronPort-SDR: Q5YVbzN1MpxfO8X9+xyiHVwEmpQEDlQHouAC2ZroV729l8ei0sVFOTiVzzEHBRlvnCD3XvniYK LfF1s7I0kzJTrYJfZOz/VToqxVSSVOOSYa9kPD53mngsfYfQcbYH6tkjuhdPgIR969c/AXIkVw yJ1es9qWP3VasmjgYFCXG7Qi0ZgwwdutfnsOh0OwXPPk5vbyzYjUL7nC1o+CXGOPnMwGS7C82l cPuC96TXeK9UfE66gxFLiXF3cF5EgIV+sjjMsm7w+0yyCojLRYrx0zEFj3GFAezJJFCEjgZb7B XNU= X-IronPort-AV: E=Sophos;i="5.79,345,1602572400"; d="scan'208";a="99992683" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jan 2021 13:19:31 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Wed, 13 Jan 2021 13:19:30 -0700 Received: from mchp-dev-shegelun.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Wed, 13 Jan 2021 13:19:28 -0700 From: Steen Hegelund To: Philipp Zabel , Rob Herring CC: Steen Hegelund , "Microchip Linux Driver Support" , Alexandre Belloni , Gregory Clement , , , Subject: [PATCH 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings Date: Wed, 13 Jan 2021 21:19:13 +0100 Message-ID: <20210113201915.2734205-2-steen.hegelund@microchip.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210113201915.2734205-1-steen.hegelund@microchip.com> References: <20210113201915.2734205-1-steen.hegelund@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Steen Hegelund --- .../bindings/reset/microchip,rst.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml new file mode 100644 index 000000000000..b5526753e85d --- /dev/null +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Microchip Sparx5 Switch Reset Controller + +maintainers: + - Steen Hegelund + - Lars Povlsen + +description: | + The Microchip Sparx5 Switch provides reset control and implements the following + functions + - One Time Switch Core Reset (Soft Reset) + +properties: + $nodename: + pattern: "^reset-controller@[0-9a-f]+$" + + compatible: + const: microchip,sparx5-switch-reset + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + + syscons: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: Array of syscons used to access reset registers + minItems: 2 + +required: + - compatible + - reg + - "#reset-cells" + - syscons + +additionalProperties: false + +examples: + - | + reset: reset-controller@0 { + compatible = "microchip,sparx5-switch-reset"; + reg = <0x0 0x0>; + #reset-cells = <1>; + syscons = <&cpu_ctrl>,<&gcb_ctrl>; + }; + From patchwork Wed Jan 13 20:19:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steen Hegelund X-Patchwork-Id: 363055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8795AC433DB for ; Wed, 13 Jan 2021 20:21:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4A14C2251F for ; Wed, 13 Jan 2021 20:21:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728896AbhAMUVJ (ORCPT ); Wed, 13 Jan 2021 15:21:09 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:26935 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725804AbhAMUVJ (ORCPT ); Wed, 13 Jan 2021 15:21:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1610569269; x=1642105269; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iidB/SH6YvMVxsRVtLw+6IrKQ/PkSr13r9FBSRtqThk=; b=gMTtX85EHkukVNMWERLkgd2RLB0TXn+G+T2mhTyTIHleDHrmt0YoYUbi RH3hYy+yoH8On9KAw0CDcHzFruARvGEnIJnkky1ZwDaNvtzaQsWN1YGeF TwP2CovVjz5bPQSAwbRTiYPEtVEY9N3F9nd/q/qz/XGxXuXnXcVtN4Wbb X0z9KACx9hlZmDoBJB0nGN7ob33AYBEEOzY8WfJ1tmiUUjc+cjtvcSGM7 S0LE9fjbmzGIsgq1zHNbgm1eLhZsRqduBT2OrqHm7Iyn81XX/zPFenYLx V2saJSU/AWTWUXcTs7jbIwoUJDClrXrz52H5ibMQs1s8MyPdhLWGw2RK3 w==; IronPort-SDR: se4KIWRlK6R8G9HokD2o13mfrgxpEJhmpqV1JrHIOeW4YAFlGv8wsIOfXRrv8ngXME3kpE+rvw gseVaBICIACVrWEkV5NAVLjg+vmJJ+LO8RLAK8qVczO7qWihW1N0owZCyXuoD9fHMN43WdFlFS VMo92ag4z6DSG8+Ce1+65SrEfjSYtzMPn9ek+bEepScO1vf0MxBKdyNYOK5W0UKC9zJ1A61ETh DXIEyHhuUg9kjJnOEcf8682EKTJs2bDrn4ZPEw+NhmSqcQaVd1iD0sfjhozLQwgUfbJ1Zcgd31 ky8= X-IronPort-AV: E=Sophos;i="5.79,345,1602572400"; d="scan'208";a="105886843" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jan 2021 13:19:35 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Wed, 13 Jan 2021 13:19:34 -0700 Received: from mchp-dev-shegelun.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Wed, 13 Jan 2021 13:19:32 -0700 From: Steen Hegelund To: Philipp Zabel , Rob Herring CC: Steen Hegelund , "Microchip Linux Driver Support" , Alexandre Belloni , Gregory Clement , , , Subject: [PATCH 3/3] arm64: dts: reset: add microchip sparx5 switch reset driver Date: Wed, 13 Jan 2021 21:19:15 +0100 Message-ID: <20210113201915.2734205-4-steen.hegelund@microchip.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210113201915.2734205-1-steen.hegelund@microchip.com> References: <20210113201915.2734205-1-steen.hegelund@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Steen Hegelund --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 380281f312d8..6f0a21c362e3 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -132,9 +132,16 @@ mux: mux-controller { }; }; - reset@611010008 { - compatible = "microchip,sparx5-chip-reset"; - reg = <0x6 0x11010008 0x4>; + gcb_ctrl: syscon@611010000 { + compatible = "microchip,sparx5-gcb-syscon", "syscon"; + reg = <0x6 0x11010000 0x10000>; + }; + + reset: reset-controller@0 { + compatible = "microchip,sparx5-switch-reset"; + reg = <0x6 0x0 0x0>; + #reset-cells = <1>; + syscons = <&cpu_ctrl>,<&gcb_ctrl>; }; uart0: serial@600100000 {