From patchwork Mon Jan 11 19:18:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360535 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139217jai; Mon, 11 Jan 2021 11:19:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJw/CQqm7bIm5W8JHpFOW71+lv8TECTk5qAyOLn36u0GRz1luDrs1bCZa473sm0gfj/btYz9 X-Received: by 2002:aa7:95aa:0:b029:1ad:d810:42be with SMTP id a10-20020aa795aa0000b02901add81042bemr819699pfk.51.1610392779900; Mon, 11 Jan 2021 11:19:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392779; cv=none; d=google.com; s=arc-20160816; b=OygwJh3/MHlyRAklXdjbCL7cDOWMLNu9oQmAB4tCrZ8f2u05HUU4nFjgsKuSMndPn1 DQlmR8zDSdIlI/Rc9FuDiWILkgwB645nWoOsJ/TiBRDRFPSod6WCPgN5VeFQqESXLTpO wkc8NtacxZm6YXKUw53DszJZXg0ByP2B0/WEJ2vTYsU4X4Iw6x813ePcXY8gify22e/5 F9poGqty+kVOjK8rH8W4rrWQYUoIYsajDzk1eBjZhOgC8xtbWWBCB99wBP9D7HoGeI+3 6cpHywX7LUTg1S+cVfY1dDhVQaeT+B/Z8hB4O0zMIK0mxmwCmFZ+9H4FW4PYV93JrIg9 1NhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to; bh=sMW/n+ZC6wYDlbEwrjTm0s/RuVFp5/IRLVQA3ic5kX0=; b=ZWR4HzKuBO+lVTS6zPfoQogpt6yWj/Ugxq3D7q9kPnUGaejDCNEOzmnLNEDL0JeWpD mHJyB00MQsogp80b0bXPR+2mDKVVJGEffaZyGm2RgXMrs3y4PcGPRGH0nIfGZumH+bBB U7xD3wUDMtZ8wGmFqC3UMtVijn6A1ktZMdFzNraIWGgaMO4iXCVc7mmvAs8PHos3Dgmj Pq55t9rIFpJsau5Wg/nBbNtCbydIsyFe4bElJ5BbZCXBTX95TCg6Nbnrhq/ktFItTXzR wrqaqnSSsOHXpAOwcIlAVwLxDLfr5t/dY3JRvq08t3MP7oVFaJmjh8c2Uyl1VJFhp1tX 0Ulg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=FHGS3Yz4; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. 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Mon, 11 Jan 2021 11:19:31 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:31 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 01/40] drm/amd/display/dc/dce/dce_aux: Mark 'dce_aux_transfer_raw' as __maybe_unused Date: Mon, 11 Jan 2021 19:18:47 +0000 Message-Id: <20210111191926.3688443-2-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c: In function ‘dce_aux_transfer_raw’: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.c:579:7: warning: variable ‘bytes_replied’ set but not used [-Wunused-but-set-variable] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c index 3204292a5aeae..d51b5fe91287d 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c @@ -576,7 +576,7 @@ int dce_aux_transfer_raw(struct ddc_service *ddc, *operation_result = get_channel_status(aux_engine, &returned_bytes); if (*operation_result == AUX_CHANNEL_OPERATION_SUCCEEDED) { - int bytes_replied = 0; + int __maybe_unused bytes_replied = 0; bytes_replied = read_channel_reply(aux_engine, payload->length, payload->data, payload->reply, &status); From patchwork Mon Jan 11 19:18:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360536 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139247jai; Mon, 11 Jan 2021 11:19:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJyMR1PPhtfzDPw3T2EP4kpUiLLFub/q1cYrrlaOuJEx0BBjK0GiMbezAjpO88GTHQ3yKjce X-Received: by 2002:a63:5701:: with SMTP id l1mr965057pgb.381.1610392783040; Mon, 11 Jan 2021 11:19:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392783; cv=none; d=google.com; s=arc-20160816; b=zpG0C/uAa2Jh8mkbulpmG53UWRQO7tdhUn4T7EKAkN/wgSHqN6AWHyo0xK99jekQr3 ZMNAV3eI9XvX9Prv4U7TgqPWWsOGy5XbunCDNplO8u28Iy1kInOuZEavvq1UPiOG60/S rKBjnEz+SKngCLabv/Qt9+HH04UFor/DsE8hkga1PyKKlvAC5DFSM232GUQS2eDKNKhp 1QgQuN3YOgFdpp4stlIuSM9iX7jDac6zwd0EZgvP2AoMmc++I1zUHdbInPENHmotjnK7 NXUcNd+lvzyMnEPCPbYZTAsv65tKZC8cBEe4ezuVuA9kxkyv1FW6kWFaABptmsr1TWxR z4Wg== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:19:33 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:32 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 02/40] drm/amd/display/dc/dce/dce_link_encoder: Remove unused variable 'value0' Date: Mon, 11 Jan 2021 19:18:48 +0000 Message-Id: <20210111191926.3688443-3-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Mauro Rossi , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_link_encoder.c: In function ‘dce110_link_encoder_update_mst_stream_allocation_table’: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_link_encoder.c:1506:11: warning: variable ‘value0’ set but not used [-Wunused-but-set-variable] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Mauro Rossi Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c index 0ef2f4d9d8bf3..1e77ffee71b30 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c @@ -1503,7 +1503,6 @@ void dce110_link_encoder_update_mst_stream_allocation_table( const struct link_mst_stream_allocation_table *table) { struct dce110_link_encoder *enc110 = TO_DCE110_LINK_ENC(enc); - uint32_t value0 = 0; uint32_t value1 = 0; uint32_t value2 = 0; uint32_t slots = 0; @@ -1604,7 +1603,7 @@ void dce110_link_encoder_update_mst_stream_allocation_table( do { udelay(10); - value0 = REG_READ(DP_MSE_SAT_UPDATE); + REG_READ(DP_MSE_SAT_UPDATE); REG_GET(DP_MSE_SAT_UPDATE, DP_MSE_SAT_UPDATE, &value1); From patchwork Mon Jan 11 19:18:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360538 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139329jai; Mon, 11 Jan 2021 11:19:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJxlb7HfN0H9yDXhjgsYQiTZ+uexsM1NCG5P5EDPHPfBWGHd5hX/S4/QnXrNmPZST80r4fGo X-Received: by 2002:a62:fc4f:0:b029:19d:d060:27ca with SMTP id e76-20020a62fc4f0000b029019dd06027camr838470pfh.66.1610392789981; Mon, 11 Jan 2021 11:19:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392789; cv=none; d=google.com; s=arc-20160816; b=wO6LyrKeVRww/1kuejSVVayCoiLYEuhZy1QZwNHWeBav5SwEeBTni0B6LHfncnZD0Z BIbM8FMcnZPKb/JauPCAxrL6pNxT1IhadhjbZOrLDBEoZQFNj0LTeuH6+OYTLWE9tjPP yB453xM9I7+A9PZ7ZA+OElylVAlzdweAtQwU5Qj6XSTJ/vlddv+0CxG8qGDmkP56bUxS BdcKulmkb04wiG2f2xu00CFXwe8VUSxeyZI3y130tllC2aiWnvYcw+/RXwe9lX9V/u95 RbLFvM4YH9nOuQoUHApWrLc4rK6T7n2XGxJhO9j92wVEjRBtfQKKFGx58CmhkxbKKqPi 7zQA== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:19:34 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:33 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 03/40] drm/amd/display/dc/gpio/hw_ddc: Remove unused variable 'reg2' Date: Mon, 11 Jan 2021 19:18:49 +0000 Message-Id: <20210111191926.3688443-4-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_ddc.c: In function ‘set_config’: drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_ddc.c:110:13: warning: variable ‘reg2’ set but not used [-Wunused-but-set-variable] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c b/drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c index 1ae153eab31d7..7a8cec2d7a902 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c +++ b/drivers/gpu/drm/amd/display/dc/gpio/hw_ddc.c @@ -107,13 +107,12 @@ static enum gpio_result set_config( msleep(3); } } else { - uint32_t reg2; uint32_t sda_pd_dis = 0; uint32_t scl_pd_dis = 0; - reg2 = REG_GET_2(gpio.MASK_reg, - DC_GPIO_SDA_PD_DIS, &sda_pd_dis, - DC_GPIO_SCL_PD_DIS, &scl_pd_dis); + REG_GET_2(gpio.MASK_reg, + DC_GPIO_SDA_PD_DIS, &sda_pd_dis, + DC_GPIO_SCL_PD_DIS, &scl_pd_dis); if (sda_pd_dis) { REG_SET(gpio.MASK_reg, regval, From patchwork Mon Jan 11 19:18:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360539 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139277jai; Mon, 11 Jan 2021 11:19:45 -0800 (PST) X-Google-Smtp-Source: ABdhPJw0mmIh39a7xankk39lLoFvN+KWC6eyeqoLclQbf3BGk8Z38zSyqlWv2ANYxGIZv8Shi6j8 X-Received: by 2002:a62:65c1:0:b029:1aa:ba52:fdfd with SMTP id z184-20020a6265c10000b02901aaba52fdfdmr1098814pfb.7.1610392785548; Mon, 11 Jan 2021 11:19:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392785; cv=none; d=google.com; s=arc-20160816; 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Mon, 11 Jan 2021 11:19:35 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:35 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 04/40] drm/amd/display/dc/dce/dce_opp: Demote non-compliant kernel-doc headers Date: Mon, 11 Jan 2021 19:18:50 +0000 Message-Id: <20210111191926.3688443-5-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Mauro Rossi , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:109: warning: Function parameter or member 'opp110' not described in 'set_truncation' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:109: warning: Function parameter or member 'params' not described in 'set_truncation' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:154: warning: Function parameter or member 'opp110' not described in 'dce60_set_truncation' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:154: warning: Function parameter or member 'params' not described in 'dce60_set_truncation' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:204: warning: Function parameter or member 'opp110' not described in 'set_spatial_dither' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:204: warning: Function parameter or member 'params' not described in 'set_spatial_dither' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:308: warning: Function parameter or member 'opp110' not described in 'set_temporal_dither' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:308: warning: Function parameter or member 'params' not described in 'set_temporal_dither' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:370: warning: Function parameter or member 'opp110' not described in 'dce110_opp_set_clamping' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:370: warning: Function parameter or member 'params' not described in 'dce110_opp_set_clamping' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:430: warning: Function parameter or member 'opp110' not described in 'dce60_opp_set_clamping' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:430: warning: Function parameter or member 'params' not described in 'dce60_opp_set_clamping' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:478: warning: Function parameter or member 'opp110' not described in 'set_pixel_encoding' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:478: warning: Function parameter or member 'params' not described in 'set_pixel_encoding' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:514: warning: Function parameter or member 'opp110' not described in 'dce60_set_pixel_encoding' drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.c:514: warning: Function parameter or member 'params' not described in 'dce60_set_pixel_encoding' Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Mauro Rossi Cc: Lee Jones Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce/dce_opp.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c index 2bf8f5a2e0c22..4600231da6cbb 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c @@ -97,7 +97,7 @@ enum { -/** +/* * set_truncation * 1) set truncation depth: 0 for 18 bpp or 1 for 24 bpp * 2) enable truncation @@ -142,7 +142,7 @@ static void set_truncation( } #if defined(CONFIG_DRM_AMD_DC_SI) -/** +/* * dce60_set_truncation * 1) set truncation depth: 0 for 18 bpp or 1 for 24 bpp * 2) enable truncation @@ -183,7 +183,7 @@ static void dce60_set_truncation( } #endif -/** +/* * set_spatial_dither * 1) set spatial dithering mode: pattern of seed * 2) set spatial dithering depth: 0 for 18bpp or 1 for 24bpp @@ -291,7 +291,7 @@ static void set_spatial_dither( FMT_SPATIAL_DITHER_EN, 1); } -/** +/* * SetTemporalDither (Frame Modulation) * 1) set temporal dither depth * 2) select pattern: from hard-coded pattern or programmable pattern @@ -355,7 +355,7 @@ static void set_temporal_dither( FMT_TEMPORAL_DITHER_EN, 1); } -/** +/* * Set Clamping * 1) Set clamping format based on bpc - 0 for 6bpc (No clamping) * 1 for 8 bpc @@ -415,7 +415,7 @@ void dce110_opp_set_clamping( } #if defined(CONFIG_DRM_AMD_DC_SI) -/** +/* * Set Clamping for DCE6 parts * 1) Set clamping format based on bpc - 0 for 6bpc (No clamping) * 1 for 8 bpc @@ -465,7 +465,7 @@ static void dce60_opp_set_clamping( } #endif -/** +/* * set_pixel_encoding * * Set Pixel Encoding @@ -501,7 +501,7 @@ static void set_pixel_encoding( } #if defined(CONFIG_DRM_AMD_DC_SI) -/** +/* * dce60_set_pixel_encoding * DCE6 has no FMT_SUBSAMPLING_{MODE,ORDER} bits in FMT_CONTROL reg * Set Pixel Encoding From patchwork Mon Jan 11 19:18:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360537 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139307jai; 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[2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id d196si490708pfd.6.2021.01.11.11.19.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=fCyZq859; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0ABCD89DCF; Mon, 11 Jan 2021 19:19:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by gabe.freedesktop.org (Postfix) with ESMTPS id 661CF89DDD for ; Mon, 11 Jan 2021 19:19:38 +0000 (UTC) Received: by mail-wr1-x42b.google.com with SMTP id 91so922810wrj.7 for ; Mon, 11 Jan 2021 11:19:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wtAOwEmizSXmIkh30HKF25wTD18EAWpeWdhE7dkllNs=; b=fCyZq859P/dQeCyH44t2M93b+LQoVV7yA3BytWDVSHDCdpZj6czSYW8EQ493I11nZp TZLM8h9nbvI2ZSsDZ0F8ayzF1C0O+gVE3/ADElNiHrZ2OpcbodJ1pri3ZkxpU+ZxMz2C c/wfj4zzfbwk83kz3MsPJvWnnwj9kV8ZZGu/BYNeUEBCIVx/+M9UCiZytPHwoyJzOv1O EN8cE7QnMbiH3S7GnGgttIwXekKJseeGIsAkX6lFUjsUGz0Pk/XMypkchaaWWYtw0Pyv +SnwI8P7rBZIyj8cG13pJICOXd55WIo9KBphj19oSbkeD+UE3HvYdMMi9p0g/EMl349v V5hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wtAOwEmizSXmIkh30HKF25wTD18EAWpeWdhE7dkllNs=; b=L6+ALrcIgmanQbkMk2pAdqCFnEl9i4DLQFcSo5fV4d3WpW1paKAzwAdYdKZQb8kw/w lWQ1jfBc0VPG+H0sVDlp4TeYdHuPDOSkClIhOCzd9OJ/GghHfcQZHTRKfSZMLgqpnpx2 gOt5D0RQ9hJbx7V4MA1rYYLy+WTrbzecgvK4ixnyBEDYxY2ndw1T0ZW7xU/dCgpVhfTi O+3PPAH6k7ZLHzcbyPsGxe+j47Ce39j/IgXwVioyB7+bGgKLih+8K+vpL0LUkZAI+tNs ej+q3uPH+t5kLS6rAH41XZXOQJ98zrpz2P27k/0w9OB+tAiLn3cmoocUE5BldzXlpk/k xCag== X-Gm-Message-State: AOAM530UH1j8WT0kzFmdKmmV0PaOOXdHl3YFlzKXgJVJUr2n0uigpWGr jjVEA0WrTVTkNMFPBDJdjbTEFWvGXLNqbIXL X-Received: by 2002:a5d:50c3:: with SMTP id f3mr555705wrt.287.1610392777131; Mon, 11 Jan 2021 11:19:37 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:36 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 05/40] drm/amd/display/dc/dce/dce_transform: Demote kernel-doc abuse Date: Mon, 11 Jan 2021 19:18:51 +0000 Message-Id: <20210111191926.3688443-6-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Mauro Rossi , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The header doesn't provide any additional parameter descriptions. Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.c:1104: warning: Cannot understand ***************************************************************************** Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Mauro Rossi Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce/dce_transform.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c index 6121bb7b009b8..abbaa6b0b2db9 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c @@ -1100,7 +1100,7 @@ static void program_gamut_remap( } -/** +/* ***************************************************************************** * Function: dal_transform_wide_gamut_set_gamut_remap * From patchwork Mon Jan 11 19:18:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360540 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139354jai; Mon, 11 Jan 2021 11:19:51 -0800 (PST) X-Google-Smtp-Source: ABdhPJywycVoxKiQLg3ql6kJoDyBkTGlAclzbgPNiTkDJGoGcTT397qXkRRYqcdqoRhyVrxFwF/4 X-Received: by 2002:a17:902:8f90:b029:db:fc74:c59a with SMTP id z16-20020a1709028f90b02900dbfc74c59amr810545plo.58.1610392791799; Mon, 11 Jan 2021 11:19:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392791; cv=none; d=google.com; s=arc-20160816; b=TeVKSBpjXUEOWDwxaWsB5zyVR5l3oG4KI7bOdZ0YhfmV0FKPnDioBXhuzTMcJrQJfQ CXsgHQmxmfYjSJAeu7v+8OY/Wxmm1aqCoSBxthGMWlNSJztVQerk5UVU5FuGtMd1+hFM lfjsLE/HdJHpf1PxrF15jqD2hq5FCgCinga6pJpJOpcCwNG5axzXdj3C46WQABzLJVQy gjG+/jU5SOCxsTpXEHcx1RkAdEbmK72+qNhwoKFp65Yqlwdmk4j2U70ySPjC/oK2uAkC a/Ko3QiSVfjtSQ4XCkXOcXlWBjXKuxClZ3dW5O2uYphK4WjsCc2m58zQBYA3R3nN1Zst rMRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to; bh=aSjqc8LkZAsbsm2ssarU3gXyxSorE1RPURijt9fo0Xs=; b=z0Qt93iULiNu1Nc69CWBKggnAaErs+UOV3ijVyAd/9fDWApti3/ii5VthvoLduANco BJmfZcMfWiL2ftG0EZrW4eQvDhaJNuqA+wBwNXQ5DAH/RmXCGIQv4n7LlMeVHKDVCu/1 u77EnweY5kwHixRAVOeWmKgiUCySTx5JWXVJO1LtojxlhA9oIOiQSahM6VxMyime0RuQ p1S1j52+KOK8FTyQT5oSv5/Hjhh/faEMl6a7FlVB+BL8K/KjNPue51AG0hFLKgRcpXNf UMHxyGjb2vCMv0//Nio5BdYx2myVjbiLbY75tlj0pSpZo1MWNojI9lYFUBV+sQkAImav Vp/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZKvYlOSz; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. 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Mon, 11 Jan 2021 11:19:38 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:37 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 06/40] drm/amd/display/dc/gpio/diagnostics/hw_translate_diag: Include our own header containing prototypes Date: Mon, 11 Jan 2021 19:18:52 +0000 Message-Id: <20210111191926.3688443-7-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_translate_diag.c:37:6: warning: no previous prototype for ‘dal_hw_translate_diag_fpga_init’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../gpu/drm/amd/display/dc/gpio/diagnostics/hw_translate_diag.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_translate_diag.c b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_translate_diag.c index bf90688469271..e5138a5a8eb5a 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_translate_diag.c +++ b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_translate_diag.c @@ -24,6 +24,7 @@ */ #include "dm_services.h" +#include "hw_translate_diag.h" #include "include/gpio_types.h" #include "../hw_translate.h" From patchwork Mon Jan 11 19:18:53 2021 Content-Type: text/plain; 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Mon, 11 Jan 2021 11:19:39 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:38 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 07/40] drm/amd/display/dc/irq/irq_service: Make local function static Date: Mon, 11 Jan 2021 19:18:53 +0000 Message-Id: <20210111191926.3688443-8-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Mauro Rossi , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/irq/irq_service.c:82:31: warning: no previous prototype for ‘find_irq_source_info’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Mauro Rossi Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/irq/irq_service.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c index 6bf27bde87240..5f245bde54ff7 100644 --- a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c +++ b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c @@ -79,7 +79,7 @@ void dal_irq_service_destroy(struct irq_service **irq_service) *irq_service = NULL; } -const struct irq_source_info *find_irq_source_info( +static const struct irq_source_info *find_irq_source_info( struct irq_service *irq_service, enum dc_irq_source source) { From patchwork Mon Jan 11 19:18:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360545 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139443jai; Mon, 11 Jan 2021 11:19:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJxgDUj3D3NGw2Fbo3wEuLGWZ+OJc/ps16OZZTeL6Owzz+QbN0/cg2foKWGPT80FbR3IQodt X-Received: by 2002:a17:90a:ba88:: with SMTP id t8mr329691pjr.229.1610392799129; Mon, 11 Jan 2021 11:19:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392799; cv=none; d=google.com; s=arc-20160816; b=A423eiQk4zVUKFxz9ylR2rhkbmPyxuCjnwZdxteZMfq0LBhFrXwxhb/n07em6g4R5e J1k9BZYlYaS5OQaWniW7qoykJHkof1knrSbc1GqKTjIyvhlEgv5M/gyVd5RWZ/rtOfCG FYYe72ZrN22671lVRDKY6L4zoaEmKrVXOmiLyihB44flSo9bTO/105ex6SiYbuA61bov eCAYtWcMh2H5w3JCh3kMsF/luqthl01AFvVU4y5xpUaBJDmyWpcfipZrHtEzb/0i1d+Y iGTvTC8WBS4v/7FR7envOHPaO0gMoXXVrs+pi1FzvVyLddPnMfgYBYi17p0hbd2wZC8Z 03Ew== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:19:40 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:40 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 08/40] drm/amd/display/dc/gpio/diagnostics/hw_factory_diag: Fix struct declared inside parameter list error Date: Mon, 11 Jan 2021 19:18:54 +0000 Message-Id: <20210111191926.3688443-9-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.h:30:43: warning: ‘struct hw_factory’ declared inside parameter list will not be visible outside of this definition or declaration drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.h:30:6: note: previous declaration of ‘dal_hw_factory_diag_fpga_init’ was here drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.h:30:43: warning: ‘struct hw_factory’ declared inside parameter list will not be visible outside of this definition or declaration drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.h:30:6: note: previous declaration of ‘dal_hw_factory_diag_fpga_init’ was here drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.h:30:43: warning: ‘struct hw_factory’ declared inside parameter list will not be visible outside of this definition or declaration drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.h:30:6: note: previous declaration of ‘dal_hw_factory_diag_fpga_init’ was here Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.h b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.h index 8a74f6adb8eee..bf68eb1d9a1d2 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.h +++ b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.h @@ -26,6 +26,8 @@ #ifndef __DAL_HW_FACTORY_DIAG_FPGA_H__ #define __DAL_HW_FACTORY_DIAG_FPGA_H__ +struct hw_factory; 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Mon, 11 Jan 2021 11:19:42 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:41 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 09/40] drm/amd/display/dc/gpio/diagnostics/hw_factory_diag: Include our own header containing prototypes Date: Mon, 11 Jan 2021 19:18:55 +0000 Message-Id: <20210111191926.3688443-10-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.c:50:6: warning: no previous prototype for ‘dal_hw_factory_diag_fpga_init’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c index df68430aeb0c2..c6e28f6bf1a27 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c +++ b/drivers/gpu/drm/amd/display/dc/gpio/diagnostics/hw_factory_diag.c @@ -28,6 +28,7 @@ */ #include "dm_services.h" +#include "hw_factory_diag.h" #include "include/gpio_types.h" #include "../hw_factory.h" From patchwork Mon Jan 11 19:18:56 2021 Content-Type: text/plain; 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[131.252.210.177]) by mx.google.com with ESMTPS id w14si459797pfn.263.2021.01.11.11.19.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="A9a7/txq"; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2A83089E19; Mon, 11 Jan 2021 19:19:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9F68989DFE for ; Mon, 11 Jan 2021 19:19:44 +0000 (UTC) Received: by mail-wr1-x433.google.com with SMTP id r3so958979wrt.2 for ; Mon, 11 Jan 2021 11:19:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a2Y1r1imcED85eFixB5AGXQS5WVhMYvk3Zres7MALT0=; b=A9a7/txq8Sk8aZPWjqlVS7sQ7X76uzBkQT+uQKbCuBAo6drReTQXWZzzobNcV+49OM pvmfjOh3M1yF+g53OxFNO/eVMX/9KDnyoXnJvlMGgp9k5u+2lbEQwmsAiQ+qTe0z4720 h4sAgdSkVS4WAaju+KzUlV5nDOxBJwQN1H4rB7+H3WeuPQVHAl53ZfPgPt9lvOMG9CqD +nMhXKTCFutgeUQqBtyIO5KKAv6e7VamtSiG1HwXUi6EbynxBAZgFFmsZTUMwlIvf0ku Ehr+GTNdqFcdN83P3mFAC3mZ/ZuK6kDWklTQaSJBI4NWhVdL1LGS2VZl+jp8araC7iay v2xA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a2Y1r1imcED85eFixB5AGXQS5WVhMYvk3Zres7MALT0=; b=rfiKXMjQJsJy8+vWP1kcHLoIiyHaZ+yR55qSYDa3iUSKztzxbHOsz4enmaAOYDQGwr /uubIRgBxRWMNpq0H6c2bCZuhptwbOUWBfpcpAUfmWaf3XbarFFLoCHui7AeDi6C/l8B h78mKqlLJR4QpYlwgkkEiimTCt3daCD2Jp9j9j0nWvyi8DiAvAS4O+Lc92J7c2Jn72UI d/4kt8c4GDk9s6PHjiuKvn6bnmoHhBzYfpkjCwjT4pJXpX/HoiGcz8q14Ok+unr6eDpM iHPkF2B9JGFwrloeW87FXPjgmsHPSfxCOGN5H2Zi2saxbt7B/zimKqiiDh/CGTWj4aMe 4QkQ== X-Gm-Message-State: AOAM532lRqy3cykUdMtOKDFgSpJiWehnaZZx/kjOux7YXfgmgJ++Fw6F mnCGwGmb1dcgNKqjoriczTywiw== X-Received: by 2002:a5d:610d:: with SMTP id v13mr565190wrt.425.1610392783332; Mon, 11 Jan 2021 11:19:43 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:42 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 10/40] drm/amd/display/dc/dce120/dce120_hw_sequencer: Encompass defines in same clause as their use Date: Mon, 11 Jan 2021 19:18:56 +0000 Message-Id: <20210111191926.3688443-11-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Ideally someone should strip-out all these garbage 'if 0's. Tempted to carry out the work myself on principle! Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_hw_sequencer.c:53:47: warning: ‘reg_offsets’ defined but not used [-Wunused-const-variable=] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c index 66a13aa39c951..d4afe6c824d2c 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c @@ -50,6 +50,7 @@ struct dce120_hw_seq_reg_offsets { uint32_t crtc; }; +#if 0 static const struct dce120_hw_seq_reg_offsets reg_offsets[] = { { .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL), @@ -79,7 +80,6 @@ static const struct dce120_hw_seq_reg_offsets reg_offsets[] = { /******************************************************************************* * Private definitions ******************************************************************************/ -#if 0 static void dce120_init_pte(struct dc_context *ctx, uint8_t controller_id) { uint32_t addr; From patchwork Mon Jan 11 19:18:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360546 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139457jai; Mon, 11 Jan 2021 11:20:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJzmT/i/Tf1BTq1zCHPqNBeiQYZ/TJexy5yN4rWwIyfqWP5hToBc7clodLQJ6/GWtjsbiQbx X-Received: by 2002:a17:902:7d88:b029:db:7aa4:864c with SMTP id a8-20020a1709027d88b02900db7aa4864cmr821186plm.34.1610392800576; Mon, 11 Jan 2021 11:20:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392800; cv=none; d=google.com; s=arc-20160816; b=YIn4eHyo97ok4wSQVP8Y4eCaNwYImcQzLQWWxgoN/9UwRT8Bq3OsSUbwZiDkTLRBB6 OSlEydE5cRIaI4bJrEqPqLunZqBxl9+5b7DPDJtcURtRYOA89g3b0u8y+nqTW4oLBjnU MsHjAOv1x7RlF5wzp8MzNqERrra+iguC5cvJ/049LnQUxFWP9k7KS+LgUOIjYm9RrNlr SOdwP29hxKY7j0qC+bSzRQ9ZHg/U6JlDtt2KSAVbD0xgKUwLosZfuirfApup+sn21fKF 6uJxpNUqG9hZhguM9DjF7Qcru8JJ2cM10u/Drp7SYb3Xxpzjvl/DX9nCvfSkQqd1xLCE cHlw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to; bh=a3zTJbcOXHcC/HVBlyJWvjR9MB2qyUWdFE2C1xq4UCI=; b=yb926GDUANRiXpWjVNoTSUmuTnqvIo2qoPrfSv1l9hdo3ZW9MX+Kz+zOufNm+bsurA W6mmYxodsEVzLLHkirwl4HI3mXHorKyc9Oal/lpY9tKAaUm9ivgw/fkUuwt9CSTTFd9X p1ozgmD6+wxRdfloSBrtCn6ocV7PNWfXJuzd2qdLPMO9hxaL+qb9HKzGkG7DxYgWwlEH IQEXxycoXZJWeN+K+ZaLJZzyx0HVg1gJAqd7mBzIESOPAXW15X/gRSitz0Sk3bzAEZJg /Vd3YRFsdcgSMONS8BxupVhYs3C3LPcP1KN68fme0HuJHaBoV4GRMe43s/KIPW472R+A uhWw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=s3mbs6za; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. 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lee.jones@linaro.org Subject: [PATCH 11/40] drm/amd/display/dc/dce120/dce120_timing_generator: Date: Mon, 11 Jan 2021 19:18:57 +0000 Message-Id: <20210111191926.3688443-12-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Anthony Koo , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:101:6: warning: no previous prototype for ‘dce120_timing_generator_validate_timing’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:128:6: warning: no previous prototype for ‘dce120_tg_validate_timing’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:136:6: warning: no previous prototype for ‘dce120_timing_generator_enable_crtc’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:156:6: warning: no previous prototype for ‘dce120_timing_generator_set_early_control’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:169:10: warning: no previous prototype for ‘dce120_timing_generator_get_vblank_counter’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:184:6: warning: no previous prototype for ‘dce120_timing_generator_get_crtc_position’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:210:6: warning: no previous prototype for ‘dce120_timing_generator_wait_for_vblank’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:232:6: warning: no previous prototype for ‘dce120_timing_generator_wait_for_vactive’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:245:6: warning: no previous prototype for ‘dce120_timing_generator_setup_global_swap_lock’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:282:6: warning: no previous prototype for ‘dce120_timing_generator_tear_down_global_swap_lock’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:303:6: warning: no previous prototype for ‘dce120_timing_generator_enable_reset_trigger’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:350:6: warning: no previous prototype for ‘dce120_timing_generator_disable_reset_trigger’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:370:6: warning: no previous prototype for ‘dce120_timing_generator_did_triggered_reset_occur’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:387:6: warning: no previous prototype for ‘dce120_timing_generator_disable_vga’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:428:6: warning: no previous prototype for ‘dce120_timing_generator_program_blanking’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:488:6: warning: no previous prototype for ‘dce120_timing_generator_program_blank_color’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:501:6: warning: no previous prototype for ‘dce120_timing_generator_set_overscan_color_black’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:543:6: warning: no previous prototype for ‘dce120_timing_generator_set_drr’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:602:6: warning: no previous prototype for ‘dce120_timing_generator_get_position’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:635:6: warning: no previous prototype for ‘dce120_timing_generator_get_crtc_scanoutpos’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:664:6: warning: no previous prototype for ‘dce120_timing_generator_enable_advanced_request’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:702:6: warning: no previous prototype for ‘dce120_tg_program_blank_color’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:725:6: warning: no previous prototype for ‘dce120_tg_set_overscan_color’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:752:6: warning: no previous prototype for ‘dce120_tg_is_blanked’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:773:6: warning: no previous prototype for ‘dce120_tg_set_blank’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:792:6: warning: no previous prototype for ‘dce120_tg_wait_for_state’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:809:6: warning: no previous prototype for ‘dce120_tg_set_colors’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:836:6: warning: no previous prototype for ‘dce120_timing_generator_set_test_pattern’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Aric Cyr Cc: Anthony Koo Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../dc/dce120/dce120_timing_generator.c | 56 +++++++++---------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c index 915fbb8e8168c..ebc7d61e8bf36 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c @@ -98,7 +98,7 @@ static bool dce120_timing_generator_is_in_vertical_blank( /* determine if given timing can be supported by TG */ -bool dce120_timing_generator_validate_timing( +static bool dce120_timing_generator_validate_timing( struct timing_generator *tg, const struct dc_crtc_timing *timing, enum signal_type signal) @@ -125,7 +125,7 @@ bool dce120_timing_generator_validate_timing( return true; } -bool dce120_tg_validate_timing(struct timing_generator *tg, +static bool dce120_tg_validate_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing) { return dce120_timing_generator_validate_timing(tg, timing, SIGNAL_TYPE_NONE); @@ -133,7 +133,7 @@ bool dce120_tg_validate_timing(struct timing_generator *tg, /******** HW programming ************/ /* Disable/Enable Timing Generator */ -bool dce120_timing_generator_enable_crtc(struct timing_generator *tg) +static bool dce120_timing_generator_enable_crtc(struct timing_generator *tg) { enum bp_result result; struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -153,7 +153,7 @@ bool dce120_timing_generator_enable_crtc(struct timing_generator *tg) return result == BP_RESULT_OK; } -void dce120_timing_generator_set_early_control( +static void dce120_timing_generator_set_early_control( struct timing_generator *tg, uint32_t early_cntl) { @@ -166,7 +166,7 @@ void dce120_timing_generator_set_early_control( /**************** TG current status ******************/ /* return the current frame counter. Used by Linux kernel DRM */ -uint32_t dce120_timing_generator_get_vblank_counter( +static uint32_t dce120_timing_generator_get_vblank_counter( struct timing_generator *tg) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -181,7 +181,7 @@ uint32_t dce120_timing_generator_get_vblank_counter( } /* Get current H and V position */ -void dce120_timing_generator_get_crtc_position( +static void dce120_timing_generator_get_crtc_position( struct timing_generator *tg, struct crtc_position *position) { @@ -207,7 +207,7 @@ void dce120_timing_generator_get_crtc_position( } /* wait until TG is in beginning of vertical blank region */ -void dce120_timing_generator_wait_for_vblank(struct timing_generator *tg) +static void dce120_timing_generator_wait_for_vblank(struct timing_generator *tg) { /* We want to catch beginning of VBlank here, so if the first try are * in VBlank, we might be very close to Active, in this case wait for @@ -229,7 +229,7 @@ void dce120_timing_generator_wait_for_vblank(struct timing_generator *tg) } /* wait until TG is in beginning of active region */ -void dce120_timing_generator_wait_for_vactive(struct timing_generator *tg) +static void dce120_timing_generator_wait_for_vactive(struct timing_generator *tg) { while (dce120_timing_generator_is_in_vertical_blank(tg)) { if (!tg->funcs->is_counter_moving(tg)) { @@ -242,7 +242,7 @@ void dce120_timing_generator_wait_for_vactive(struct timing_generator *tg) /*********** Timing Generator Synchronization routines ****/ /* Setups Global Swap Lock group, TimingServer or TimingClient*/ -void dce120_timing_generator_setup_global_swap_lock( +static void dce120_timing_generator_setup_global_swap_lock( struct timing_generator *tg, const struct dcp_gsl_params *gsl_params) { @@ -279,7 +279,7 @@ void dce120_timing_generator_setup_global_swap_lock( } /* Clear all the register writes done by setup_global_swap_lock */ -void dce120_timing_generator_tear_down_global_swap_lock( +static void dce120_timing_generator_tear_down_global_swap_lock( struct timing_generator *tg) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -300,7 +300,7 @@ void dce120_timing_generator_tear_down_global_swap_lock( } /* Reset slave controllers on master VSync */ -void dce120_timing_generator_enable_reset_trigger( +static void dce120_timing_generator_enable_reset_trigger( struct timing_generator *tg, int source) { @@ -347,7 +347,7 @@ void dce120_timing_generator_enable_reset_trigger( } /* disabling trigger-reset */ -void dce120_timing_generator_disable_reset_trigger( +static void dce120_timing_generator_disable_reset_trigger( struct timing_generator *tg) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -367,7 +367,7 @@ void dce120_timing_generator_disable_reset_trigger( } /* Checks whether CRTC triggered reset occurred */ -bool dce120_timing_generator_did_triggered_reset_occur( +static bool dce120_timing_generator_did_triggered_reset_occur( struct timing_generator *tg) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -384,7 +384,7 @@ bool dce120_timing_generator_did_triggered_reset_occur( /******** Stuff to move to other virtual HW objects *****************/ /* Move to enable accelerated mode */ -void dce120_timing_generator_disable_vga(struct timing_generator *tg) +static void dce120_timing_generator_disable_vga(struct timing_generator *tg) { uint32_t offset = 0; uint32_t value = 0; @@ -425,7 +425,7 @@ void dce120_timing_generator_disable_vga(struct timing_generator *tg) } /* TODO: Should we move it to transform */ /* Fully program CRTC timing in timing generator */ -void dce120_timing_generator_program_blanking( +static void dce120_timing_generator_program_blanking( struct timing_generator *tg, const struct dc_crtc_timing *timing) { @@ -485,7 +485,7 @@ void dce120_timing_generator_program_blanking( /* TODO: Should we move it to opp? */ /* Combine with below and move YUV/RGB color conversion to SW layer */ -void dce120_timing_generator_program_blank_color( +static void dce120_timing_generator_program_blank_color( struct timing_generator *tg, const struct tg_color *black_color) { @@ -498,7 +498,7 @@ void dce120_timing_generator_program_blank_color( CRTC_BLACK_COLOR_R_CR, black_color->color_r_cr); } /* Combine with above and move YUV/RGB color conversion to SW layer */ -void dce120_timing_generator_set_overscan_color_black( +static void dce120_timing_generator_set_overscan_color_black( struct timing_generator *tg, const struct tg_color *color) { @@ -540,7 +540,7 @@ void dce120_timing_generator_set_overscan_color_black( */ } -void dce120_timing_generator_set_drr( +static void dce120_timing_generator_set_drr( struct timing_generator *tg, const struct drr_params *params) { @@ -599,7 +599,7 @@ void dce120_timing_generator_set_drr( * @param [out] position ***************************************************************************** */ -void dce120_timing_generator_get_position(struct timing_generator *tg, +static void dce120_timing_generator_get_position(struct timing_generator *tg, struct crtc_position *position) { uint32_t value; @@ -632,7 +632,7 @@ void dce120_timing_generator_get_position(struct timing_generator *tg, } -void dce120_timing_generator_get_crtc_scanoutpos( +static void dce120_timing_generator_get_crtc_scanoutpos( struct timing_generator *tg, uint32_t *v_blank_start, uint32_t *v_blank_end, @@ -661,7 +661,7 @@ void dce120_timing_generator_get_crtc_scanoutpos( *v_position = position.vertical_count; } -void dce120_timing_generator_enable_advanced_request( +static void dce120_timing_generator_enable_advanced_request( struct timing_generator *tg, bool enable, const struct dc_crtc_timing *timing) @@ -699,7 +699,7 @@ void dce120_timing_generator_enable_advanced_request( value); } -void dce120_tg_program_blank_color(struct timing_generator *tg, +static void dce120_tg_program_blank_color(struct timing_generator *tg, const struct tg_color *black_color) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -722,7 +722,7 @@ void dce120_tg_program_blank_color(struct timing_generator *tg, value); } -void dce120_tg_set_overscan_color(struct timing_generator *tg, +static void dce120_tg_set_overscan_color(struct timing_generator *tg, const struct tg_color *overscan_color) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -749,7 +749,7 @@ static void dce120_tg_program_timing(struct timing_generator *tg, dce120_timing_generator_program_blanking(tg, timing); } -bool dce120_tg_is_blanked(struct timing_generator *tg) +static bool dce120_tg_is_blanked(struct timing_generator *tg) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); uint32_t value = dm_read_reg_soc15( @@ -770,7 +770,7 @@ bool dce120_tg_is_blanked(struct timing_generator *tg) return false; } -void dce120_tg_set_blank(struct timing_generator *tg, +static void dce120_tg_set_blank(struct timing_generator *tg, bool enable_blanking) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -789,7 +789,7 @@ void dce120_tg_set_blank(struct timing_generator *tg, bool dce120_tg_validate_timing(struct timing_generator *tg, const struct dc_crtc_timing *timing); -void dce120_tg_wait_for_state(struct timing_generator *tg, +static void dce120_tg_wait_for_state(struct timing_generator *tg, enum crtc_state state) { switch (state) { @@ -806,7 +806,7 @@ void dce120_tg_wait_for_state(struct timing_generator *tg, } } -void dce120_tg_set_colors(struct timing_generator *tg, +static void dce120_tg_set_colors(struct timing_generator *tg, const struct tg_color *blank_color, const struct tg_color *overscan_color) { @@ -833,7 +833,7 @@ static void dce120_timing_generator_set_static_screen_control( CRTC_STATIC_SCREEN_FRAME_COUNT, num_frames); } -void dce120_timing_generator_set_test_pattern( +static void dce120_timing_generator_set_test_pattern( struct timing_generator *tg, /* TODO: replace 'controller_dp_test_pattern' by 'test_pattern_mode' * because this is not DP-specific (which is probably somewhere in DP From patchwork Mon Jan 11 19:18:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360547 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139467jai; Mon, 11 Jan 2021 11:20:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJzCDSUcsOhatrO1Os2nPWi18cAlB0XzQpjslpdriDdSNtNzxdAqY+beIadZLK1g10r091Gy X-Received: by 2002:a63:5a08:: with SMTP id o8mr1028488pgb.118.1610392801969; Mon, 11 Jan 2021 11:20:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392801; cv=none; d=google.com; s=arc-20160816; b=Df7QqYFVazMuQ1eAUO/uKh0uhDsx6J/jFenUAC+smMzJVy7QeUSeW1VJCgw6vlWoYh xxrz6K7M/bFdo6SlvSbPhRcWCYPBm4EJe9nXw8J/WZkwEzWQ1ejemt1vywK0uSAm7pqp MlU2uRodae3Atv5xZ7E5cXGYQeRzGbEnx+ZXyCNQf8BUIYUMc/EA6YAtS9TW+4Bxlcza 0WRokCEY3oi9D94TOfFllATxSi6rPcA0pJ5p8F6cgkdC1yvgmgfTi94eFRZXYEx5IlwV oASik1WCHx5xcz/sI4teAxAdwPTzv787Nn2e4e6Fs4NDKnbeNzvZhj5ghs/QFtWXhgtF nolg== ARC-Message-Signature: i=1; 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[2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id i11si566922pli.62.2021.01.11.11.20.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=DvGExxxy; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D343A89E0E; Mon, 11 Jan 2021 19:19:49 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 529BD89DFE for ; Mon, 11 Jan 2021 19:19:47 +0000 (UTC) Received: by mail-wr1-x42a.google.com with SMTP id r7so934780wrc.5 for ; Mon, 11 Jan 2021 11:19:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=P+UK/qW8zyZ1jZCT/24Q1f8i1ILtoK1GZqqcObzyOGM=; b=DvGExxxyn3oqRzhlGqr5YgtbW3eoDFbk0Jpz4hbgESXe2lcLEUBnV/gcVyOdnnhXIp sHQNrPWUAeKdLr0SFUEbsOFKvo/uyhoerxmF7P/x4CnE3oi0YXuvIKRMHCrktk7Vq3YK QDke9hcU7aC+/WtoDoeFNRHs22v8Ox2+epuhQvcsq7EoM4gnBKAiCd6pOv6TFnPDGieR kc9aJrqGrWjchXJpi153LVXiq7ZcqRHuzRrVwMKfQ5T4G5SIRHOGe6iEjWVMSzioI6Na YeB6CydYIUAZ6w/pFgOEY/VfN2uYdrU5o6x3eKwzhT2XSJnNnBXaA7K3CFdu8FMYxqxq BhSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=P+UK/qW8zyZ1jZCT/24Q1f8i1ILtoK1GZqqcObzyOGM=; b=IBY9DU+WF0ftzojwbJonhD0trOEuJwD75x3IXURaDB0MI3J/l3H19a9xswP0GSr4Ak HLQSlo6hSajXy2JZT7/mIKBLzllxHX9O6BvOcLYT/BGY8wiK1r+xaZlzP66CCl9dYDo/ 1YBJpdlO3KvgtD29vTKtGcnIpsQV7ZBzGn5RHKJZ5X5u+A6H8HOFWkeJEZ53rPUZxfiw Cz0ysmtsRat5HaDxrgTzHiYGpwQmEahXp68ycZmmY14gHVjF7qBhQamSZzSG5HWw/3C7 kCxFABUSuWN82JP6rzAslhJufLx0l0DIQ+SdTIcwZYpusFKVDM62/vLtxmpEFk+SbsE/ UUfg== X-Gm-Message-State: AOAM533RatvN3x3+lYHy7c2oLjmSQ4zpsGHdvp6F9yBkOFZdRj2UcW3p lsFmTZBlIk0LAtfsthcqCGrmVg== X-Received: by 2002:a5d:69cf:: with SMTP id s15mr597601wrw.372.1610392785890; Mon, 11 Jan 2021 11:19:45 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:45 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 12/40] drm/amd/display/dc/dce120/Makefile: Ignore -Woverride-init warning Date: Mon, 11 Jan 2021 19:18:58 +0000 Message-Id: <20210111191926.3688443-13-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This file uses a complex abstracted set of hierarchical macros to setup its applicable register lists within constant structures. However in the case of TMDS_CNTL we wish to mark it as not applicable for this use-case. One method would be to de-const all of the definitions and users, then manually zero out TMDS_CNTL from the list. Another would be to create a new set of hierarchical macros to omit TMDS_CNTL entirely. Both would entail a great deal of unnecessary changes and maintenance burden. Instead, let's just silence the warning. Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:281:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: note: (near initialization for ‘stream_enc_regs[0].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:281:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:282:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: note: (near initialization for ‘stream_enc_regs[1].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:282:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:283:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: note: (near initialization for ‘stream_enc_regs[2].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:283:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:284:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: note: (near initialization for ‘stream_enc_regs[3].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:284:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:285:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: note: (near initialization for ‘stream_enc_regs[4].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:285:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:286:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:277:15: note: (near initialization for ‘stream_enc_regs[5].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:286:2: note: in expansion of macro ‘stream_enc_regs’ Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce120/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/Makefile b/drivers/gpu/drm/amd/display/dc/dce120/Makefile index 37db1f8d45ea5..a9cc4b73270bb 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/Makefile +++ b/drivers/gpu/drm/amd/display/dc/dce120/Makefile @@ -24,6 +24,8 @@ # It provides the control and status of HW CRTC block. +CFLAGS_$(AMDDALPATH)/dc/dce120/dce120_resource.o = $(call cc-disable-warning, override-init) + DCE120 = dce120_resource.o dce120_timing_generator.o \ dce120_hw_sequencer.o From patchwork Mon Jan 11 19:18:59 2021 Content-Type: text/plain; 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Mon, 11 Jan 2021 11:19:47 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:46 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 13/40] drm/amd/display/dc/calcs/dce_calcs: Move some large variables from the stack to the heap Date: Mon, 11 Jan 2021 19:18:59 +0000 Message-Id: <20210111191926.3688443-14-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , Colin Ian King , =?utf-8?q?Christian_K?= =?utf-8?b?w7ZuaWc=?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c: In function ‘calculate_bandwidth’: drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:2016:1: warning: the frame size of 1216 bytes is larger than 1024 bytes [-Wframe-larger-than=] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Colin Ian King Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../gpu/drm/amd/display/dc/calcs/dce_calcs.c | 21 +++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c index 158d927c03e55..a0c69fae40ced 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c @@ -98,16 +98,16 @@ static void calculate_bandwidth( int32_t num_cursor_lines; int32_t i, j, k; - struct bw_fixed yclk[3]; - struct bw_fixed sclk[8]; + struct bw_fixed *yclk; + struct bw_fixed *sclk; bool d0_underlay_enable; bool d1_underlay_enable; bool fbc_enabled; bool lpt_enabled; enum bw_defines sclk_message; enum bw_defines yclk_message; - enum bw_defines tiling_mode[maximum_number_of_surfaces]; - enum bw_defines surface_type[maximum_number_of_surfaces]; + enum bw_defines *tiling_mode; + enum bw_defines *surface_type; enum bw_defines voltage; enum bw_defines pipe_check; enum bw_defines hsr_check; @@ -122,6 +122,14 @@ static void calculate_bandwidth( int32_t number_of_displays_enabled_with_margin = 0; int32_t number_of_aligned_displays_with_no_margin = 0; + yclk = kzalloc(sizeof(*yclk) * 3, GFP_KERNEL); + sclk = kzalloc(sizeof(*sclk) * 8, GFP_KERNEL); + + tiling_mode = kzalloc(sizeof(*tiling_mode) * + maximum_number_of_surfaces, GFP_KERNEL); + surface_type = kzalloc(sizeof(*surface_type) * + maximum_number_of_surfaces, GFP_KERNEL); + yclk[low] = vbios->low_yclk; yclk[mid] = vbios->mid_yclk; yclk[high] = vbios->high_yclk; @@ -2013,6 +2021,11 @@ static void calculate_bandwidth( } } } + + kfree(tiling_mode); + kfree(surface_type); + kfree(yclk); + kfree(sclk); } /******************************************************************************* From patchwork Mon Jan 11 19:19:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360573 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3141165jai; Mon, 11 Jan 2021 11:22:26 -0800 (PST) X-Google-Smtp-Source: ABdhPJws4MlgYHcDjXTHA6PEV6a4AlJtUmuCtLtpn6ONz8Z2Lm2TFOf3OUfrNKgbp4daOUhecfjQ X-Received: by 2002:a17:90a:f2ce:: with SMTP id gt14mr332760pjb.215.1610392805875; Mon, 11 Jan 2021 11:20:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392805; cv=none; d=google.com; s=arc-20160816; b=S73WDO2XYVd+7iUPK8Yb7yq/W1GFxnC3pUpEj547ziEG4DvOx38dxnsiju1SYv1jJh ddZ1sz2kpWunt4jhRZboUGCMhiI8fscqjQaKRN4WNt2hzyh03Eb7evnwrTYbWGO7S5kz gMm5lrFVNYNi2uUvVnyJwo913B3g9+7vWz4Zhl9fzn8i1sKF3Ff4eDQxp7D7TB7QU+qN DwhDgOJJTx+GTRc2nQmFg08q5ezf7cHeMhXl48Dcp/wsAAnj8DsoE4cjjySGdLgiU46r SUoQ4pwutugirQXPH1jCrjWbKfQHGg/xPzWZExgdNuQ2UWYV3QiA2gORo5FrBjrLRXHr 8jXA== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:19:48 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:48 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 14/40] drm/amd/display/dc/calcs/dce_calcs: Remove some large variables from the stack Date: Mon, 11 Jan 2021 19:19:00 +0000 Message-Id: <20210111191926.3688443-15-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c: In function ‘bw_calcs_init’: drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:2726:1: warning: the frame size of 1336 bytes is larger than 1024 bytes [-Wframe-larger-than=] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../gpu/drm/amd/display/dc/calcs/dce_calcs.c | 1115 +++++++++-------- 1 file changed, 560 insertions(+), 555 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c index a0c69fae40ced..f69c2b84d432b 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c @@ -2035,707 +2035,712 @@ void bw_calcs_init(struct bw_calcs_dceip *bw_dceip, struct bw_calcs_vbios *bw_vbios, struct hw_asic_id asic_id) { - struct bw_calcs_dceip dceip = { 0 }; - struct bw_calcs_vbios vbios = { 0 }; + struct bw_calcs_dceip *dceip; + struct bw_calcs_vbios *vbios; enum bw_calcs_version version = bw_calcs_version_from_asic_id(asic_id); - dceip.version = version; + dceip = kzalloc(sizeof(dceip), GFP_KERNEL); + vbios = kzalloc(sizeof(vbios), GFP_KERNEL); + + dceip->version = version; switch (version) { case BW_CALCS_VERSION_CARRIZO: - vbios.memory_type = bw_def_gddr5; - vbios.dram_channel_width_in_bits = 64; - vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; - vbios.number_of_dram_banks = 8; - vbios.high_yclk = bw_int_to_fixed(1600); - vbios.mid_yclk = bw_int_to_fixed(1600); - vbios.low_yclk = bw_frc_to_fixed(66666, 100); - vbios.low_sclk = bw_int_to_fixed(200); - vbios.mid1_sclk = bw_int_to_fixed(300); - vbios.mid2_sclk = bw_int_to_fixed(300); - vbios.mid3_sclk = bw_int_to_fixed(300); - vbios.mid4_sclk = bw_int_to_fixed(300); - vbios.mid5_sclk = bw_int_to_fixed(300); - vbios.mid6_sclk = bw_int_to_fixed(300); - vbios.high_sclk = bw_frc_to_fixed(62609, 100); - vbios.low_voltage_max_dispclk = bw_int_to_fixed(352); - vbios.mid_voltage_max_dispclk = bw_int_to_fixed(467); - vbios.high_voltage_max_dispclk = bw_int_to_fixed(643); - vbios.low_voltage_max_phyclk = bw_int_to_fixed(540); - vbios.mid_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.high_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.data_return_bus_width = bw_int_to_fixed(32); - vbios.trc = bw_int_to_fixed(50); - vbios.dmifmc_urgent_latency = bw_int_to_fixed(4); - vbios.stutter_self_refresh_exit_latency = bw_frc_to_fixed(153, 10); - vbios.stutter_self_refresh_entry_latency = bw_int_to_fixed(0); - vbios.nbp_state_change_latency = bw_frc_to_fixed(19649, 1000); - vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); - vbios.scatter_gather_enable = true; - vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); - vbios.cursor_width = 32; - vbios.average_compression_rate = 4; - vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; - vbios.blackout_duration = bw_int_to_fixed(0); /* us */ - vbios.maximum_blackout_recovery_time = bw_int_to_fixed(0); - - dceip.max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; - dceip.max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; - dceip.percent_of_ideal_port_bw_received_after_urgent_latency = 100; - dceip.large_cursor = false; - dceip.dmif_request_buffer_size = bw_int_to_fixed(768); - dceip.dmif_pipe_en_fbc_chunk_tracker = false; - dceip.cursor_max_outstanding_group_num = 1; - dceip.lines_interleaved_into_lb = 2; - dceip.chunk_width = 256; - dceip.number_of_graphics_pipes = 3; - dceip.number_of_underlay_pipes = 1; - dceip.low_power_tiling_mode = 0; - dceip.display_write_back_supported = false; - dceip.argb_compression_support = false; - dceip.underlay_vscaler_efficiency6_bit_per_component = + vbios->memory_type = bw_def_gddr5; + vbios->dram_channel_width_in_bits = 64; + vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits; + vbios->number_of_dram_banks = 8; + vbios->high_yclk = bw_int_to_fixed(1600); + vbios->mid_yclk = bw_int_to_fixed(1600); + vbios->low_yclk = bw_frc_to_fixed(66666, 100); + vbios->low_sclk = bw_int_to_fixed(200); + vbios->mid1_sclk = bw_int_to_fixed(300); + vbios->mid2_sclk = bw_int_to_fixed(300); + vbios->mid3_sclk = bw_int_to_fixed(300); + vbios->mid4_sclk = bw_int_to_fixed(300); + vbios->mid5_sclk = bw_int_to_fixed(300); + vbios->mid6_sclk = bw_int_to_fixed(300); + vbios->high_sclk = bw_frc_to_fixed(62609, 100); + vbios->low_voltage_max_dispclk = bw_int_to_fixed(352); + vbios->mid_voltage_max_dispclk = bw_int_to_fixed(467); + vbios->high_voltage_max_dispclk = bw_int_to_fixed(643); + vbios->low_voltage_max_phyclk = bw_int_to_fixed(540); + vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->high_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->data_return_bus_width = bw_int_to_fixed(32); + vbios->trc = bw_int_to_fixed(50); + vbios->dmifmc_urgent_latency = bw_int_to_fixed(4); + vbios->stutter_self_refresh_exit_latency = bw_frc_to_fixed(153, 10); + vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0); + vbios->nbp_state_change_latency = bw_frc_to_fixed(19649, 1000); + vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10); + vbios->scatter_gather_enable = true; + vbios->down_spread_percentage = bw_frc_to_fixed(5, 10); + vbios->cursor_width = 32; + vbios->average_compression_rate = 4; + vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; + vbios->blackout_duration = bw_int_to_fixed(0); /* us */ + vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0); + + dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; + dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; + dceip->percent_of_ideal_port_bw_received_after_urgent_latency = 100; + dceip->large_cursor = false; + dceip->dmif_request_buffer_size = bw_int_to_fixed(768); + dceip->dmif_pipe_en_fbc_chunk_tracker = false; + dceip->cursor_max_outstanding_group_num = 1; + dceip->lines_interleaved_into_lb = 2; + dceip->chunk_width = 256; + dceip->number_of_graphics_pipes = 3; + dceip->number_of_underlay_pipes = 1; + dceip->low_power_tiling_mode = 0; + dceip->display_write_back_supported = false; + dceip->argb_compression_support = false; + dceip->underlay_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35556, 10000); - dceip.underlay_vscaler_efficiency8_bit_per_component = + dceip->underlay_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.underlay_vscaler_efficiency10_bit_per_component = + dceip->underlay_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.underlay_vscaler_efficiency12_bit_per_component = + dceip->underlay_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.graphics_vscaler_efficiency6_bit_per_component = + dceip->graphics_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35, 10); - dceip.graphics_vscaler_efficiency8_bit_per_component = + dceip->graphics_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.graphics_vscaler_efficiency10_bit_per_component = + dceip->graphics_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.graphics_vscaler_efficiency12_bit_per_component = + dceip->graphics_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); - dceip.max_dmif_buffer_allocated = 2; - dceip.graphics_dmif_size = 12288; - dceip.underlay_luma_dmif_size = 19456; - dceip.underlay_chroma_dmif_size = 23552; - dceip.pre_downscaler_enabled = true; - dceip.underlay_downscale_prefetch_enabled = true; - dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); - dceip.lb_size_per_component444 = bw_int_to_fixed(82176); - dceip.graphics_lb_nodownscaling_multi_line_prefetching = false; - dceip.stutter_and_dram_clock_state_change_gated_before_cursor = + dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3); + dceip->max_dmif_buffer_allocated = 2; + dceip->graphics_dmif_size = 12288; + dceip->underlay_luma_dmif_size = 19456; + dceip->underlay_chroma_dmif_size = 23552; + dceip->pre_downscaler_enabled = true; + dceip->underlay_downscale_prefetch_enabled = true; + dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1); + dceip->lb_size_per_component444 = bw_int_to_fixed(82176); + dceip->graphics_lb_nodownscaling_multi_line_prefetching = false; + dceip->stutter_and_dram_clock_state_change_gated_before_cursor = bw_int_to_fixed(0); - dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed( + dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.underlay420_chroma_lb_size_per_component = + dceip->underlay420_chroma_lb_size_per_component = bw_int_to_fixed(164352); - dceip.underlay422_lb_size_per_component = bw_int_to_fixed( + dceip->underlay422_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.cursor_chunk_width = bw_int_to_fixed(64); - dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); - dceip.underlay_maximum_width_efficient_for_tiling = + dceip->cursor_chunk_width = bw_int_to_fixed(64); + dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4); + dceip->underlay_maximum_width_efficient_for_tiling = bw_int_to_fixed(1920); - dceip.underlay_maximum_height_efficient_for_tiling = + dceip->underlay_maximum_height_efficient_for_tiling = bw_int_to_fixed(1080); - dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = + dceip->peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = bw_frc_to_fixed(3, 10); - dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = + dceip->peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = bw_int_to_fixed(25); - dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed( + dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed( 2); - dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = + dceip->maximum_total_outstanding_pte_requests_allowed_by_saw = bw_int_to_fixed(128); - dceip.limit_excessive_outstanding_dmif_requests = true; - dceip.linear_mode_line_request_alternation_slice = + dceip->limit_excessive_outstanding_dmif_requests = true; + dceip->linear_mode_line_request_alternation_slice = bw_int_to_fixed(64); - dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = + dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode = 32; - dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; - dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; - dceip.request_efficiency = bw_frc_to_fixed(8, 10); - dceip.dispclk_per_request = bw_int_to_fixed(2); - dceip.dispclk_ramping_factor = bw_frc_to_fixed(105, 100); - dceip.display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); - dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; - dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/ + dceip->display_write_back420_luma_mcifwr_buffer_size = 12288; + dceip->display_write_back420_chroma_mcifwr_buffer_size = 8192; + dceip->request_efficiency = bw_frc_to_fixed(8, 10); + dceip->dispclk_per_request = bw_int_to_fixed(2); + dceip->dispclk_ramping_factor = bw_frc_to_fixed(105, 100); + dceip->display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); + dceip->scatter_gather_pte_request_rows_in_tiling_mode = 2; + dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/ break; case BW_CALCS_VERSION_POLARIS10: /* TODO: Treat VEGAM the same as P10 for now * Need to tune the para for VEGAM if needed */ case BW_CALCS_VERSION_VEGAM: - vbios.memory_type = bw_def_gddr5; - vbios.dram_channel_width_in_bits = 32; - vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; - vbios.number_of_dram_banks = 8; - vbios.high_yclk = bw_int_to_fixed(6000); - vbios.mid_yclk = bw_int_to_fixed(3200); - vbios.low_yclk = bw_int_to_fixed(1000); - vbios.low_sclk = bw_int_to_fixed(300); - vbios.mid1_sclk = bw_int_to_fixed(400); - vbios.mid2_sclk = bw_int_to_fixed(500); - vbios.mid3_sclk = bw_int_to_fixed(600); - vbios.mid4_sclk = bw_int_to_fixed(700); - vbios.mid5_sclk = bw_int_to_fixed(800); - vbios.mid6_sclk = bw_int_to_fixed(974); - vbios.high_sclk = bw_int_to_fixed(1154); - vbios.low_voltage_max_dispclk = bw_int_to_fixed(459); - vbios.mid_voltage_max_dispclk = bw_int_to_fixed(654); - vbios.high_voltage_max_dispclk = bw_int_to_fixed(1108); - vbios.low_voltage_max_phyclk = bw_int_to_fixed(540); - vbios.mid_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.high_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.data_return_bus_width = bw_int_to_fixed(32); - vbios.trc = bw_int_to_fixed(48); - vbios.dmifmc_urgent_latency = bw_int_to_fixed(3); - vbios.stutter_self_refresh_exit_latency = bw_int_to_fixed(5); - vbios.stutter_self_refresh_entry_latency = bw_int_to_fixed(0); - vbios.nbp_state_change_latency = bw_int_to_fixed(45); - vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); - vbios.scatter_gather_enable = true; - vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); - vbios.cursor_width = 32; - vbios.average_compression_rate = 4; - vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; - vbios.blackout_duration = bw_int_to_fixed(0); /* us */ - vbios.maximum_blackout_recovery_time = bw_int_to_fixed(0); - - dceip.max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; - dceip.max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; - dceip.percent_of_ideal_port_bw_received_after_urgent_latency = 100; - dceip.large_cursor = false; - dceip.dmif_request_buffer_size = bw_int_to_fixed(768); - dceip.dmif_pipe_en_fbc_chunk_tracker = false; - dceip.cursor_max_outstanding_group_num = 1; - dceip.lines_interleaved_into_lb = 2; - dceip.chunk_width = 256; - dceip.number_of_graphics_pipes = 6; - dceip.number_of_underlay_pipes = 0; - dceip.low_power_tiling_mode = 0; - dceip.display_write_back_supported = false; - dceip.argb_compression_support = true; - dceip.underlay_vscaler_efficiency6_bit_per_component = + vbios->memory_type = bw_def_gddr5; + vbios->dram_channel_width_in_bits = 32; + vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits; + vbios->number_of_dram_banks = 8; + vbios->high_yclk = bw_int_to_fixed(6000); + vbios->mid_yclk = bw_int_to_fixed(3200); + vbios->low_yclk = bw_int_to_fixed(1000); + vbios->low_sclk = bw_int_to_fixed(300); + vbios->mid1_sclk = bw_int_to_fixed(400); + vbios->mid2_sclk = bw_int_to_fixed(500); + vbios->mid3_sclk = bw_int_to_fixed(600); + vbios->mid4_sclk = bw_int_to_fixed(700); + vbios->mid5_sclk = bw_int_to_fixed(800); + vbios->mid6_sclk = bw_int_to_fixed(974); + vbios->high_sclk = bw_int_to_fixed(1154); + vbios->low_voltage_max_dispclk = bw_int_to_fixed(459); + vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654); + vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108); + vbios->low_voltage_max_phyclk = bw_int_to_fixed(540); + vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->high_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->data_return_bus_width = bw_int_to_fixed(32); + vbios->trc = bw_int_to_fixed(48); + vbios->dmifmc_urgent_latency = bw_int_to_fixed(3); + vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5); + vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0); + vbios->nbp_state_change_latency = bw_int_to_fixed(45); + vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10); + vbios->scatter_gather_enable = true; + vbios->down_spread_percentage = bw_frc_to_fixed(5, 10); + vbios->cursor_width = 32; + vbios->average_compression_rate = 4; + vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; + vbios->blackout_duration = bw_int_to_fixed(0); /* us */ + vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0); + + dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; + dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; + dceip->percent_of_ideal_port_bw_received_after_urgent_latency = 100; + dceip->large_cursor = false; + dceip->dmif_request_buffer_size = bw_int_to_fixed(768); + dceip->dmif_pipe_en_fbc_chunk_tracker = false; + dceip->cursor_max_outstanding_group_num = 1; + dceip->lines_interleaved_into_lb = 2; + dceip->chunk_width = 256; + dceip->number_of_graphics_pipes = 6; + dceip->number_of_underlay_pipes = 0; + dceip->low_power_tiling_mode = 0; + dceip->display_write_back_supported = false; + dceip->argb_compression_support = true; + dceip->underlay_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35556, 10000); - dceip.underlay_vscaler_efficiency8_bit_per_component = + dceip->underlay_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.underlay_vscaler_efficiency10_bit_per_component = + dceip->underlay_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.underlay_vscaler_efficiency12_bit_per_component = + dceip->underlay_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.graphics_vscaler_efficiency6_bit_per_component = + dceip->graphics_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35, 10); - dceip.graphics_vscaler_efficiency8_bit_per_component = + dceip->graphics_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.graphics_vscaler_efficiency10_bit_per_component = + dceip->graphics_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.graphics_vscaler_efficiency12_bit_per_component = + dceip->graphics_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); - dceip.max_dmif_buffer_allocated = 4; - dceip.graphics_dmif_size = 12288; - dceip.underlay_luma_dmif_size = 19456; - dceip.underlay_chroma_dmif_size = 23552; - dceip.pre_downscaler_enabled = true; - dceip.underlay_downscale_prefetch_enabled = true; - dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); - dceip.lb_size_per_component444 = bw_int_to_fixed(245952); - dceip.graphics_lb_nodownscaling_multi_line_prefetching = true; - dceip.stutter_and_dram_clock_state_change_gated_before_cursor = + dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3); + dceip->max_dmif_buffer_allocated = 4; + dceip->graphics_dmif_size = 12288; + dceip->underlay_luma_dmif_size = 19456; + dceip->underlay_chroma_dmif_size = 23552; + dceip->pre_downscaler_enabled = true; + dceip->underlay_downscale_prefetch_enabled = true; + dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1); + dceip->lb_size_per_component444 = bw_int_to_fixed(245952); + dceip->graphics_lb_nodownscaling_multi_line_prefetching = true; + dceip->stutter_and_dram_clock_state_change_gated_before_cursor = bw_int_to_fixed(1); - dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed( + dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.underlay420_chroma_lb_size_per_component = + dceip->underlay420_chroma_lb_size_per_component = bw_int_to_fixed(164352); - dceip.underlay422_lb_size_per_component = bw_int_to_fixed( + dceip->underlay422_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.cursor_chunk_width = bw_int_to_fixed(64); - dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); - dceip.underlay_maximum_width_efficient_for_tiling = + dceip->cursor_chunk_width = bw_int_to_fixed(64); + dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4); + dceip->underlay_maximum_width_efficient_for_tiling = bw_int_to_fixed(1920); - dceip.underlay_maximum_height_efficient_for_tiling = + dceip->underlay_maximum_height_efficient_for_tiling = bw_int_to_fixed(1080); - dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = + dceip->peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = bw_frc_to_fixed(3, 10); - dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = + dceip->peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = bw_int_to_fixed(25); - dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed( + dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed( 2); - dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = + dceip->maximum_total_outstanding_pte_requests_allowed_by_saw = bw_int_to_fixed(128); - dceip.limit_excessive_outstanding_dmif_requests = true; - dceip.linear_mode_line_request_alternation_slice = + dceip->limit_excessive_outstanding_dmif_requests = true; + dceip->linear_mode_line_request_alternation_slice = bw_int_to_fixed(64); - dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = + dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode = 32; - dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; - dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; - dceip.request_efficiency = bw_frc_to_fixed(8, 10); - dceip.dispclk_per_request = bw_int_to_fixed(2); - dceip.dispclk_ramping_factor = bw_frc_to_fixed(105, 100); - dceip.display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); - dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; - dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); + dceip->display_write_back420_luma_mcifwr_buffer_size = 12288; + dceip->display_write_back420_chroma_mcifwr_buffer_size = 8192; + dceip->request_efficiency = bw_frc_to_fixed(8, 10); + dceip->dispclk_per_request = bw_int_to_fixed(2); + dceip->dispclk_ramping_factor = bw_frc_to_fixed(105, 100); + dceip->display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); + dceip->scatter_gather_pte_request_rows_in_tiling_mode = 2; + dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); break; case BW_CALCS_VERSION_POLARIS11: - vbios.memory_type = bw_def_gddr5; - vbios.dram_channel_width_in_bits = 32; - vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; - vbios.number_of_dram_banks = 8; - vbios.high_yclk = bw_int_to_fixed(6000); - vbios.mid_yclk = bw_int_to_fixed(3200); - vbios.low_yclk = bw_int_to_fixed(1000); - vbios.low_sclk = bw_int_to_fixed(300); - vbios.mid1_sclk = bw_int_to_fixed(400); - vbios.mid2_sclk = bw_int_to_fixed(500); - vbios.mid3_sclk = bw_int_to_fixed(600); - vbios.mid4_sclk = bw_int_to_fixed(700); - vbios.mid5_sclk = bw_int_to_fixed(800); - vbios.mid6_sclk = bw_int_to_fixed(974); - vbios.high_sclk = bw_int_to_fixed(1154); - vbios.low_voltage_max_dispclk = bw_int_to_fixed(459); - vbios.mid_voltage_max_dispclk = bw_int_to_fixed(654); - vbios.high_voltage_max_dispclk = bw_int_to_fixed(1108); - vbios.low_voltage_max_phyclk = bw_int_to_fixed(540); - vbios.mid_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.high_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.data_return_bus_width = bw_int_to_fixed(32); - vbios.trc = bw_int_to_fixed(48); - if (vbios.number_of_dram_channels == 2) // 64-bit - vbios.dmifmc_urgent_latency = bw_int_to_fixed(4); + vbios->memory_type = bw_def_gddr5; + vbios->dram_channel_width_in_bits = 32; + vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits; + vbios->number_of_dram_banks = 8; + vbios->high_yclk = bw_int_to_fixed(6000); + vbios->mid_yclk = bw_int_to_fixed(3200); + vbios->low_yclk = bw_int_to_fixed(1000); + vbios->low_sclk = bw_int_to_fixed(300); + vbios->mid1_sclk = bw_int_to_fixed(400); + vbios->mid2_sclk = bw_int_to_fixed(500); + vbios->mid3_sclk = bw_int_to_fixed(600); + vbios->mid4_sclk = bw_int_to_fixed(700); + vbios->mid5_sclk = bw_int_to_fixed(800); + vbios->mid6_sclk = bw_int_to_fixed(974); + vbios->high_sclk = bw_int_to_fixed(1154); + vbios->low_voltage_max_dispclk = bw_int_to_fixed(459); + vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654); + vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108); + vbios->low_voltage_max_phyclk = bw_int_to_fixed(540); + vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->high_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->data_return_bus_width = bw_int_to_fixed(32); + vbios->trc = bw_int_to_fixed(48); + if (vbios->number_of_dram_channels == 2) // 64-bit + vbios->dmifmc_urgent_latency = bw_int_to_fixed(4); else - vbios.dmifmc_urgent_latency = bw_int_to_fixed(3); - vbios.stutter_self_refresh_exit_latency = bw_int_to_fixed(5); - vbios.stutter_self_refresh_entry_latency = bw_int_to_fixed(0); - vbios.nbp_state_change_latency = bw_int_to_fixed(45); - vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); - vbios.scatter_gather_enable = true; - vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); - vbios.cursor_width = 32; - vbios.average_compression_rate = 4; - vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; - vbios.blackout_duration = bw_int_to_fixed(0); /* us */ - vbios.maximum_blackout_recovery_time = bw_int_to_fixed(0); - - dceip.max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; - dceip.max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; - dceip.percent_of_ideal_port_bw_received_after_urgent_latency = 100; - dceip.large_cursor = false; - dceip.dmif_request_buffer_size = bw_int_to_fixed(768); - dceip.dmif_pipe_en_fbc_chunk_tracker = false; - dceip.cursor_max_outstanding_group_num = 1; - dceip.lines_interleaved_into_lb = 2; - dceip.chunk_width = 256; - dceip.number_of_graphics_pipes = 5; - dceip.number_of_underlay_pipes = 0; - dceip.low_power_tiling_mode = 0; - dceip.display_write_back_supported = false; - dceip.argb_compression_support = true; - dceip.underlay_vscaler_efficiency6_bit_per_component = + vbios->dmifmc_urgent_latency = bw_int_to_fixed(3); + vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5); + vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0); + vbios->nbp_state_change_latency = bw_int_to_fixed(45); + vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10); + vbios->scatter_gather_enable = true; + vbios->down_spread_percentage = bw_frc_to_fixed(5, 10); + vbios->cursor_width = 32; + vbios->average_compression_rate = 4; + vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; + vbios->blackout_duration = bw_int_to_fixed(0); /* us */ + vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0); + + dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; + dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; + dceip->percent_of_ideal_port_bw_received_after_urgent_latency = 100; + dceip->large_cursor = false; + dceip->dmif_request_buffer_size = bw_int_to_fixed(768); + dceip->dmif_pipe_en_fbc_chunk_tracker = false; + dceip->cursor_max_outstanding_group_num = 1; + dceip->lines_interleaved_into_lb = 2; + dceip->chunk_width = 256; + dceip->number_of_graphics_pipes = 5; + dceip->number_of_underlay_pipes = 0; + dceip->low_power_tiling_mode = 0; + dceip->display_write_back_supported = false; + dceip->argb_compression_support = true; + dceip->underlay_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35556, 10000); - dceip.underlay_vscaler_efficiency8_bit_per_component = + dceip->underlay_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.underlay_vscaler_efficiency10_bit_per_component = + dceip->underlay_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.underlay_vscaler_efficiency12_bit_per_component = + dceip->underlay_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.graphics_vscaler_efficiency6_bit_per_component = + dceip->graphics_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35, 10); - dceip.graphics_vscaler_efficiency8_bit_per_component = + dceip->graphics_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.graphics_vscaler_efficiency10_bit_per_component = + dceip->graphics_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.graphics_vscaler_efficiency12_bit_per_component = + dceip->graphics_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); - dceip.max_dmif_buffer_allocated = 4; - dceip.graphics_dmif_size = 12288; - dceip.underlay_luma_dmif_size = 19456; - dceip.underlay_chroma_dmif_size = 23552; - dceip.pre_downscaler_enabled = true; - dceip.underlay_downscale_prefetch_enabled = true; - dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); - dceip.lb_size_per_component444 = bw_int_to_fixed(245952); - dceip.graphics_lb_nodownscaling_multi_line_prefetching = true; - dceip.stutter_and_dram_clock_state_change_gated_before_cursor = + dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3); + dceip->max_dmif_buffer_allocated = 4; + dceip->graphics_dmif_size = 12288; + dceip->underlay_luma_dmif_size = 19456; + dceip->underlay_chroma_dmif_size = 23552; + dceip->pre_downscaler_enabled = true; + dceip->underlay_downscale_prefetch_enabled = true; + dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1); + dceip->lb_size_per_component444 = bw_int_to_fixed(245952); + dceip->graphics_lb_nodownscaling_multi_line_prefetching = true; + dceip->stutter_and_dram_clock_state_change_gated_before_cursor = bw_int_to_fixed(1); - dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed( + dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.underlay420_chroma_lb_size_per_component = + dceip->underlay420_chroma_lb_size_per_component = bw_int_to_fixed(164352); - dceip.underlay422_lb_size_per_component = bw_int_to_fixed( + dceip->underlay422_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.cursor_chunk_width = bw_int_to_fixed(64); - dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); - dceip.underlay_maximum_width_efficient_for_tiling = + dceip->cursor_chunk_width = bw_int_to_fixed(64); + dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4); + dceip->underlay_maximum_width_efficient_for_tiling = bw_int_to_fixed(1920); - dceip.underlay_maximum_height_efficient_for_tiling = + dceip->underlay_maximum_height_efficient_for_tiling = bw_int_to_fixed(1080); - dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = + dceip->peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = bw_frc_to_fixed(3, 10); - dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = + dceip->peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = bw_int_to_fixed(25); - dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed( + dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed( 2); - dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = + dceip->maximum_total_outstanding_pte_requests_allowed_by_saw = bw_int_to_fixed(128); - dceip.limit_excessive_outstanding_dmif_requests = true; - dceip.linear_mode_line_request_alternation_slice = + dceip->limit_excessive_outstanding_dmif_requests = true; + dceip->linear_mode_line_request_alternation_slice = bw_int_to_fixed(64); - dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = + dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode = 32; - dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; - dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; - dceip.request_efficiency = bw_frc_to_fixed(8, 10); - dceip.dispclk_per_request = bw_int_to_fixed(2); - dceip.dispclk_ramping_factor = bw_frc_to_fixed(105, 100); - dceip.display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); - dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; - dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); + dceip->display_write_back420_luma_mcifwr_buffer_size = 12288; + dceip->display_write_back420_chroma_mcifwr_buffer_size = 8192; + dceip->request_efficiency = bw_frc_to_fixed(8, 10); + dceip->dispclk_per_request = bw_int_to_fixed(2); + dceip->dispclk_ramping_factor = bw_frc_to_fixed(105, 100); + dceip->display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); + dceip->scatter_gather_pte_request_rows_in_tiling_mode = 2; + dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); break; case BW_CALCS_VERSION_POLARIS12: - vbios.memory_type = bw_def_gddr5; - vbios.dram_channel_width_in_bits = 32; - vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; - vbios.number_of_dram_banks = 8; - vbios.high_yclk = bw_int_to_fixed(6000); - vbios.mid_yclk = bw_int_to_fixed(3200); - vbios.low_yclk = bw_int_to_fixed(1000); - vbios.low_sclk = bw_int_to_fixed(678); - vbios.mid1_sclk = bw_int_to_fixed(864); - vbios.mid2_sclk = bw_int_to_fixed(900); - vbios.mid3_sclk = bw_int_to_fixed(920); - vbios.mid4_sclk = bw_int_to_fixed(940); - vbios.mid5_sclk = bw_int_to_fixed(960); - vbios.mid6_sclk = bw_int_to_fixed(980); - vbios.high_sclk = bw_int_to_fixed(1049); - vbios.low_voltage_max_dispclk = bw_int_to_fixed(459); - vbios.mid_voltage_max_dispclk = bw_int_to_fixed(654); - vbios.high_voltage_max_dispclk = bw_int_to_fixed(1108); - vbios.low_voltage_max_phyclk = bw_int_to_fixed(540); - vbios.mid_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.high_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.data_return_bus_width = bw_int_to_fixed(32); - vbios.trc = bw_int_to_fixed(48); - if (vbios.number_of_dram_channels == 2) // 64-bit - vbios.dmifmc_urgent_latency = bw_int_to_fixed(4); + vbios->memory_type = bw_def_gddr5; + vbios->dram_channel_width_in_bits = 32; + vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits; + vbios->number_of_dram_banks = 8; + vbios->high_yclk = bw_int_to_fixed(6000); + vbios->mid_yclk = bw_int_to_fixed(3200); + vbios->low_yclk = bw_int_to_fixed(1000); + vbios->low_sclk = bw_int_to_fixed(678); + vbios->mid1_sclk = bw_int_to_fixed(864); + vbios->mid2_sclk = bw_int_to_fixed(900); + vbios->mid3_sclk = bw_int_to_fixed(920); + vbios->mid4_sclk = bw_int_to_fixed(940); + vbios->mid5_sclk = bw_int_to_fixed(960); + vbios->mid6_sclk = bw_int_to_fixed(980); + vbios->high_sclk = bw_int_to_fixed(1049); + vbios->low_voltage_max_dispclk = bw_int_to_fixed(459); + vbios->mid_voltage_max_dispclk = bw_int_to_fixed(654); + vbios->high_voltage_max_dispclk = bw_int_to_fixed(1108); + vbios->low_voltage_max_phyclk = bw_int_to_fixed(540); + vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->high_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->data_return_bus_width = bw_int_to_fixed(32); + vbios->trc = bw_int_to_fixed(48); + if (vbios->number_of_dram_channels == 2) // 64-bit + vbios->dmifmc_urgent_latency = bw_int_to_fixed(4); else - vbios.dmifmc_urgent_latency = bw_int_to_fixed(3); - vbios.stutter_self_refresh_exit_latency = bw_int_to_fixed(5); - vbios.stutter_self_refresh_entry_latency = bw_int_to_fixed(0); - vbios.nbp_state_change_latency = bw_int_to_fixed(250); - vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); - vbios.scatter_gather_enable = false; - vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); - vbios.cursor_width = 32; - vbios.average_compression_rate = 4; - vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; - vbios.blackout_duration = bw_int_to_fixed(0); /* us */ - vbios.maximum_blackout_recovery_time = bw_int_to_fixed(0); - - dceip.max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; - dceip.max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; - dceip.percent_of_ideal_port_bw_received_after_urgent_latency = 100; - dceip.large_cursor = false; - dceip.dmif_request_buffer_size = bw_int_to_fixed(768); - dceip.dmif_pipe_en_fbc_chunk_tracker = false; - dceip.cursor_max_outstanding_group_num = 1; - dceip.lines_interleaved_into_lb = 2; - dceip.chunk_width = 256; - dceip.number_of_graphics_pipes = 5; - dceip.number_of_underlay_pipes = 0; - dceip.low_power_tiling_mode = 0; - dceip.display_write_back_supported = true; - dceip.argb_compression_support = true; - dceip.underlay_vscaler_efficiency6_bit_per_component = + vbios->dmifmc_urgent_latency = bw_int_to_fixed(3); + vbios->stutter_self_refresh_exit_latency = bw_int_to_fixed(5); + vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0); + vbios->nbp_state_change_latency = bw_int_to_fixed(250); + vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10); + vbios->scatter_gather_enable = false; + vbios->down_spread_percentage = bw_frc_to_fixed(5, 10); + vbios->cursor_width = 32; + vbios->average_compression_rate = 4; + vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; + vbios->blackout_duration = bw_int_to_fixed(0); /* us */ + vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0); + + dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; + dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; + dceip->percent_of_ideal_port_bw_received_after_urgent_latency = 100; + dceip->large_cursor = false; + dceip->dmif_request_buffer_size = bw_int_to_fixed(768); + dceip->dmif_pipe_en_fbc_chunk_tracker = false; + dceip->cursor_max_outstanding_group_num = 1; + dceip->lines_interleaved_into_lb = 2; + dceip->chunk_width = 256; + dceip->number_of_graphics_pipes = 5; + dceip->number_of_underlay_pipes = 0; + dceip->low_power_tiling_mode = 0; + dceip->display_write_back_supported = true; + dceip->argb_compression_support = true; + dceip->underlay_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35556, 10000); - dceip.underlay_vscaler_efficiency8_bit_per_component = + dceip->underlay_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.underlay_vscaler_efficiency10_bit_per_component = + dceip->underlay_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.underlay_vscaler_efficiency12_bit_per_component = + dceip->underlay_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.graphics_vscaler_efficiency6_bit_per_component = + dceip->graphics_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35, 10); - dceip.graphics_vscaler_efficiency8_bit_per_component = + dceip->graphics_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.graphics_vscaler_efficiency10_bit_per_component = + dceip->graphics_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.graphics_vscaler_efficiency12_bit_per_component = + dceip->graphics_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); - dceip.max_dmif_buffer_allocated = 4; - dceip.graphics_dmif_size = 12288; - dceip.underlay_luma_dmif_size = 19456; - dceip.underlay_chroma_dmif_size = 23552; - dceip.pre_downscaler_enabled = true; - dceip.underlay_downscale_prefetch_enabled = true; - dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); - dceip.lb_size_per_component444 = bw_int_to_fixed(245952); - dceip.graphics_lb_nodownscaling_multi_line_prefetching = true; - dceip.stutter_and_dram_clock_state_change_gated_before_cursor = + dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3); + dceip->max_dmif_buffer_allocated = 4; + dceip->graphics_dmif_size = 12288; + dceip->underlay_luma_dmif_size = 19456; + dceip->underlay_chroma_dmif_size = 23552; + dceip->pre_downscaler_enabled = true; + dceip->underlay_downscale_prefetch_enabled = true; + dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1); + dceip->lb_size_per_component444 = bw_int_to_fixed(245952); + dceip->graphics_lb_nodownscaling_multi_line_prefetching = true; + dceip->stutter_and_dram_clock_state_change_gated_before_cursor = bw_int_to_fixed(1); - dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed( + dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.underlay420_chroma_lb_size_per_component = + dceip->underlay420_chroma_lb_size_per_component = bw_int_to_fixed(164352); - dceip.underlay422_lb_size_per_component = bw_int_to_fixed( + dceip->underlay422_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.cursor_chunk_width = bw_int_to_fixed(64); - dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); - dceip.underlay_maximum_width_efficient_for_tiling = + dceip->cursor_chunk_width = bw_int_to_fixed(64); + dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4); + dceip->underlay_maximum_width_efficient_for_tiling = bw_int_to_fixed(1920); - dceip.underlay_maximum_height_efficient_for_tiling = + dceip->underlay_maximum_height_efficient_for_tiling = bw_int_to_fixed(1080); - dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = + dceip->peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = bw_frc_to_fixed(3, 10); - dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = + dceip->peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = bw_int_to_fixed(25); - dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed( + dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed( 2); - dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = + dceip->maximum_total_outstanding_pte_requests_allowed_by_saw = bw_int_to_fixed(128); - dceip.limit_excessive_outstanding_dmif_requests = true; - dceip.linear_mode_line_request_alternation_slice = + dceip->limit_excessive_outstanding_dmif_requests = true; + dceip->linear_mode_line_request_alternation_slice = bw_int_to_fixed(64); - dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = + dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode = 32; - dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; - dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; - dceip.request_efficiency = bw_frc_to_fixed(8, 10); - dceip.dispclk_per_request = bw_int_to_fixed(2); - dceip.dispclk_ramping_factor = bw_frc_to_fixed(105, 100); - dceip.display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); - dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; - dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); + dceip->display_write_back420_luma_mcifwr_buffer_size = 12288; + dceip->display_write_back420_chroma_mcifwr_buffer_size = 8192; + dceip->request_efficiency = bw_frc_to_fixed(8, 10); + dceip->dispclk_per_request = bw_int_to_fixed(2); + dceip->dispclk_ramping_factor = bw_frc_to_fixed(105, 100); + dceip->display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); + dceip->scatter_gather_pte_request_rows_in_tiling_mode = 2; + dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); break; case BW_CALCS_VERSION_STONEY: - vbios.memory_type = bw_def_gddr5; - vbios.dram_channel_width_in_bits = 64; - vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; - vbios.number_of_dram_banks = 8; - vbios.high_yclk = bw_int_to_fixed(1866); - vbios.mid_yclk = bw_int_to_fixed(1866); - vbios.low_yclk = bw_int_to_fixed(1333); - vbios.low_sclk = bw_int_to_fixed(200); - vbios.mid1_sclk = bw_int_to_fixed(600); - vbios.mid2_sclk = bw_int_to_fixed(600); - vbios.mid3_sclk = bw_int_to_fixed(600); - vbios.mid4_sclk = bw_int_to_fixed(600); - vbios.mid5_sclk = bw_int_to_fixed(600); - vbios.mid6_sclk = bw_int_to_fixed(600); - vbios.high_sclk = bw_int_to_fixed(800); - vbios.low_voltage_max_dispclk = bw_int_to_fixed(352); - vbios.mid_voltage_max_dispclk = bw_int_to_fixed(467); - vbios.high_voltage_max_dispclk = bw_int_to_fixed(643); - vbios.low_voltage_max_phyclk = bw_int_to_fixed(540); - vbios.mid_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.high_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.data_return_bus_width = bw_int_to_fixed(32); - vbios.trc = bw_int_to_fixed(50); - vbios.dmifmc_urgent_latency = bw_int_to_fixed(4); - vbios.stutter_self_refresh_exit_latency = bw_frc_to_fixed(158, 10); - vbios.stutter_self_refresh_entry_latency = bw_int_to_fixed(0); - vbios.nbp_state_change_latency = bw_frc_to_fixed(2008, 100); - vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); - vbios.scatter_gather_enable = true; - vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); - vbios.cursor_width = 32; - vbios.average_compression_rate = 4; - vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; - vbios.blackout_duration = bw_int_to_fixed(0); /* us */ - vbios.maximum_blackout_recovery_time = bw_int_to_fixed(0); - - dceip.max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; - dceip.max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; - dceip.percent_of_ideal_port_bw_received_after_urgent_latency = 100; - dceip.large_cursor = false; - dceip.dmif_request_buffer_size = bw_int_to_fixed(768); - dceip.dmif_pipe_en_fbc_chunk_tracker = false; - dceip.cursor_max_outstanding_group_num = 1; - dceip.lines_interleaved_into_lb = 2; - dceip.chunk_width = 256; - dceip.number_of_graphics_pipes = 2; - dceip.number_of_underlay_pipes = 1; - dceip.low_power_tiling_mode = 0; - dceip.display_write_back_supported = false; - dceip.argb_compression_support = true; - dceip.underlay_vscaler_efficiency6_bit_per_component = + vbios->memory_type = bw_def_gddr5; + vbios->dram_channel_width_in_bits = 64; + vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits; + vbios->number_of_dram_banks = 8; + vbios->high_yclk = bw_int_to_fixed(1866); + vbios->mid_yclk = bw_int_to_fixed(1866); + vbios->low_yclk = bw_int_to_fixed(1333); + vbios->low_sclk = bw_int_to_fixed(200); + vbios->mid1_sclk = bw_int_to_fixed(600); + vbios->mid2_sclk = bw_int_to_fixed(600); + vbios->mid3_sclk = bw_int_to_fixed(600); + vbios->mid4_sclk = bw_int_to_fixed(600); + vbios->mid5_sclk = bw_int_to_fixed(600); + vbios->mid6_sclk = bw_int_to_fixed(600); + vbios->high_sclk = bw_int_to_fixed(800); + vbios->low_voltage_max_dispclk = bw_int_to_fixed(352); + vbios->mid_voltage_max_dispclk = bw_int_to_fixed(467); + vbios->high_voltage_max_dispclk = bw_int_to_fixed(643); + vbios->low_voltage_max_phyclk = bw_int_to_fixed(540); + vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->high_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->data_return_bus_width = bw_int_to_fixed(32); + vbios->trc = bw_int_to_fixed(50); + vbios->dmifmc_urgent_latency = bw_int_to_fixed(4); + vbios->stutter_self_refresh_exit_latency = bw_frc_to_fixed(158, 10); + vbios->stutter_self_refresh_entry_latency = bw_int_to_fixed(0); + vbios->nbp_state_change_latency = bw_frc_to_fixed(2008, 100); + vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10); + vbios->scatter_gather_enable = true; + vbios->down_spread_percentage = bw_frc_to_fixed(5, 10); + vbios->cursor_width = 32; + vbios->average_compression_rate = 4; + vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; + vbios->blackout_duration = bw_int_to_fixed(0); /* us */ + vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0); + + dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; + dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; + dceip->percent_of_ideal_port_bw_received_after_urgent_latency = 100; + dceip->large_cursor = false; + dceip->dmif_request_buffer_size = bw_int_to_fixed(768); + dceip->dmif_pipe_en_fbc_chunk_tracker = false; + dceip->cursor_max_outstanding_group_num = 1; + dceip->lines_interleaved_into_lb = 2; + dceip->chunk_width = 256; + dceip->number_of_graphics_pipes = 2; + dceip->number_of_underlay_pipes = 1; + dceip->low_power_tiling_mode = 0; + dceip->display_write_back_supported = false; + dceip->argb_compression_support = true; + dceip->underlay_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35556, 10000); - dceip.underlay_vscaler_efficiency8_bit_per_component = + dceip->underlay_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.underlay_vscaler_efficiency10_bit_per_component = + dceip->underlay_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.underlay_vscaler_efficiency12_bit_per_component = + dceip->underlay_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.graphics_vscaler_efficiency6_bit_per_component = + dceip->graphics_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35, 10); - dceip.graphics_vscaler_efficiency8_bit_per_component = + dceip->graphics_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.graphics_vscaler_efficiency10_bit_per_component = + dceip->graphics_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.graphics_vscaler_efficiency12_bit_per_component = + dceip->graphics_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); - dceip.max_dmif_buffer_allocated = 2; - dceip.graphics_dmif_size = 12288; - dceip.underlay_luma_dmif_size = 19456; - dceip.underlay_chroma_dmif_size = 23552; - dceip.pre_downscaler_enabled = true; - dceip.underlay_downscale_prefetch_enabled = true; - dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); - dceip.lb_size_per_component444 = bw_int_to_fixed(82176); - dceip.graphics_lb_nodownscaling_multi_line_prefetching = false; - dceip.stutter_and_dram_clock_state_change_gated_before_cursor = + dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3); + dceip->max_dmif_buffer_allocated = 2; + dceip->graphics_dmif_size = 12288; + dceip->underlay_luma_dmif_size = 19456; + dceip->underlay_chroma_dmif_size = 23552; + dceip->pre_downscaler_enabled = true; + dceip->underlay_downscale_prefetch_enabled = true; + dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1); + dceip->lb_size_per_component444 = bw_int_to_fixed(82176); + dceip->graphics_lb_nodownscaling_multi_line_prefetching = false; + dceip->stutter_and_dram_clock_state_change_gated_before_cursor = bw_int_to_fixed(0); - dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed( + dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.underlay420_chroma_lb_size_per_component = + dceip->underlay420_chroma_lb_size_per_component = bw_int_to_fixed(164352); - dceip.underlay422_lb_size_per_component = bw_int_to_fixed( + dceip->underlay422_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.cursor_chunk_width = bw_int_to_fixed(64); - dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); - dceip.underlay_maximum_width_efficient_for_tiling = + dceip->cursor_chunk_width = bw_int_to_fixed(64); + dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4); + dceip->underlay_maximum_width_efficient_for_tiling = bw_int_to_fixed(1920); - dceip.underlay_maximum_height_efficient_for_tiling = + dceip->underlay_maximum_height_efficient_for_tiling = bw_int_to_fixed(1080); - dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = + dceip->peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = bw_frc_to_fixed(3, 10); - dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = + dceip->peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = bw_int_to_fixed(25); - dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed( + dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed( 2); - dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = + dceip->maximum_total_outstanding_pte_requests_allowed_by_saw = bw_int_to_fixed(128); - dceip.limit_excessive_outstanding_dmif_requests = true; - dceip.linear_mode_line_request_alternation_slice = + dceip->limit_excessive_outstanding_dmif_requests = true; + dceip->linear_mode_line_request_alternation_slice = bw_int_to_fixed(64); - dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = + dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode = 32; - dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; - dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; - dceip.request_efficiency = bw_frc_to_fixed(8, 10); - dceip.dispclk_per_request = bw_int_to_fixed(2); - dceip.dispclk_ramping_factor = bw_frc_to_fixed(105, 100); - dceip.display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); - dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; - dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); + dceip->display_write_back420_luma_mcifwr_buffer_size = 12288; + dceip->display_write_back420_chroma_mcifwr_buffer_size = 8192; + dceip->request_efficiency = bw_frc_to_fixed(8, 10); + dceip->dispclk_per_request = bw_int_to_fixed(2); + dceip->dispclk_ramping_factor = bw_frc_to_fixed(105, 100); + dceip->display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); + dceip->scatter_gather_pte_request_rows_in_tiling_mode = 2; + dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); break; case BW_CALCS_VERSION_VEGA10: - vbios.memory_type = bw_def_hbm; - vbios.dram_channel_width_in_bits = 128; - vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits; - vbios.number_of_dram_banks = 16; - vbios.high_yclk = bw_int_to_fixed(2400); - vbios.mid_yclk = bw_int_to_fixed(1700); - vbios.low_yclk = bw_int_to_fixed(1000); - vbios.low_sclk = bw_int_to_fixed(300); - vbios.mid1_sclk = bw_int_to_fixed(350); - vbios.mid2_sclk = bw_int_to_fixed(400); - vbios.mid3_sclk = bw_int_to_fixed(500); - vbios.mid4_sclk = bw_int_to_fixed(600); - vbios.mid5_sclk = bw_int_to_fixed(700); - vbios.mid6_sclk = bw_int_to_fixed(760); - vbios.high_sclk = bw_int_to_fixed(776); - vbios.low_voltage_max_dispclk = bw_int_to_fixed(460); - vbios.mid_voltage_max_dispclk = bw_int_to_fixed(670); - vbios.high_voltage_max_dispclk = bw_int_to_fixed(1133); - vbios.low_voltage_max_phyclk = bw_int_to_fixed(540); - vbios.mid_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.high_voltage_max_phyclk = bw_int_to_fixed(810); - vbios.data_return_bus_width = bw_int_to_fixed(32); - vbios.trc = bw_int_to_fixed(48); - vbios.dmifmc_urgent_latency = bw_int_to_fixed(3); - vbios.stutter_self_refresh_exit_latency = bw_frc_to_fixed(75, 10); - vbios.stutter_self_refresh_entry_latency = bw_frc_to_fixed(19, 10); - vbios.nbp_state_change_latency = bw_int_to_fixed(39); - vbios.mcifwrmc_urgent_latency = bw_int_to_fixed(10); - vbios.scatter_gather_enable = false; - vbios.down_spread_percentage = bw_frc_to_fixed(5, 10); - vbios.cursor_width = 32; - vbios.average_compression_rate = 4; - vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 8; - vbios.blackout_duration = bw_int_to_fixed(0); /* us */ - vbios.maximum_blackout_recovery_time = bw_int_to_fixed(0); - - dceip.max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; - dceip.max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; - dceip.percent_of_ideal_port_bw_received_after_urgent_latency = 100; - dceip.large_cursor = false; - dceip.dmif_request_buffer_size = bw_int_to_fixed(2304); - dceip.dmif_pipe_en_fbc_chunk_tracker = true; - dceip.cursor_max_outstanding_group_num = 1; - dceip.lines_interleaved_into_lb = 2; - dceip.chunk_width = 256; - dceip.number_of_graphics_pipes = 6; - dceip.number_of_underlay_pipes = 0; - dceip.low_power_tiling_mode = 0; - dceip.display_write_back_supported = true; - dceip.argb_compression_support = true; - dceip.underlay_vscaler_efficiency6_bit_per_component = + vbios->memory_type = bw_def_hbm; + vbios->dram_channel_width_in_bits = 128; + vbios->number_of_dram_channels = asic_id.vram_width / vbios->dram_channel_width_in_bits; + vbios->number_of_dram_banks = 16; + vbios->high_yclk = bw_int_to_fixed(2400); + vbios->mid_yclk = bw_int_to_fixed(1700); + vbios->low_yclk = bw_int_to_fixed(1000); + vbios->low_sclk = bw_int_to_fixed(300); + vbios->mid1_sclk = bw_int_to_fixed(350); + vbios->mid2_sclk = bw_int_to_fixed(400); + vbios->mid3_sclk = bw_int_to_fixed(500); + vbios->mid4_sclk = bw_int_to_fixed(600); + vbios->mid5_sclk = bw_int_to_fixed(700); + vbios->mid6_sclk = bw_int_to_fixed(760); + vbios->high_sclk = bw_int_to_fixed(776); + vbios->low_voltage_max_dispclk = bw_int_to_fixed(460); + vbios->mid_voltage_max_dispclk = bw_int_to_fixed(670); + vbios->high_voltage_max_dispclk = bw_int_to_fixed(1133); + vbios->low_voltage_max_phyclk = bw_int_to_fixed(540); + vbios->mid_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->high_voltage_max_phyclk = bw_int_to_fixed(810); + vbios->data_return_bus_width = bw_int_to_fixed(32); + vbios->trc = bw_int_to_fixed(48); + vbios->dmifmc_urgent_latency = bw_int_to_fixed(3); + vbios->stutter_self_refresh_exit_latency = bw_frc_to_fixed(75, 10); + vbios->stutter_self_refresh_entry_latency = bw_frc_to_fixed(19, 10); + vbios->nbp_state_change_latency = bw_int_to_fixed(39); + vbios->mcifwrmc_urgent_latency = bw_int_to_fixed(10); + vbios->scatter_gather_enable = false; + vbios->down_spread_percentage = bw_frc_to_fixed(5, 10); + vbios->cursor_width = 32; + vbios->average_compression_rate = 4; + vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel = 8; + vbios->blackout_duration = bw_int_to_fixed(0); /* us */ + vbios->maximum_blackout_recovery_time = bw_int_to_fixed(0); + + dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation = 100; + dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation = 100; + dceip->percent_of_ideal_port_bw_received_after_urgent_latency = 100; + dceip->large_cursor = false; + dceip->dmif_request_buffer_size = bw_int_to_fixed(2304); + dceip->dmif_pipe_en_fbc_chunk_tracker = true; + dceip->cursor_max_outstanding_group_num = 1; + dceip->lines_interleaved_into_lb = 2; + dceip->chunk_width = 256; + dceip->number_of_graphics_pipes = 6; + dceip->number_of_underlay_pipes = 0; + dceip->low_power_tiling_mode = 0; + dceip->display_write_back_supported = true; + dceip->argb_compression_support = true; + dceip->underlay_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35556, 10000); - dceip.underlay_vscaler_efficiency8_bit_per_component = + dceip->underlay_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.underlay_vscaler_efficiency10_bit_per_component = + dceip->underlay_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.underlay_vscaler_efficiency12_bit_per_component = + dceip->underlay_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.graphics_vscaler_efficiency6_bit_per_component = + dceip->graphics_vscaler_efficiency6_bit_per_component = bw_frc_to_fixed(35, 10); - dceip.graphics_vscaler_efficiency8_bit_per_component = + dceip->graphics_vscaler_efficiency8_bit_per_component = bw_frc_to_fixed(34286, 10000); - dceip.graphics_vscaler_efficiency10_bit_per_component = + dceip->graphics_vscaler_efficiency10_bit_per_component = bw_frc_to_fixed(32, 10); - dceip.graphics_vscaler_efficiency12_bit_per_component = + dceip->graphics_vscaler_efficiency12_bit_per_component = bw_int_to_fixed(3); - dceip.alpha_vscaler_efficiency = bw_int_to_fixed(3); - dceip.max_dmif_buffer_allocated = 4; - dceip.graphics_dmif_size = 24576; - dceip.underlay_luma_dmif_size = 19456; - dceip.underlay_chroma_dmif_size = 23552; - dceip.pre_downscaler_enabled = true; - dceip.underlay_downscale_prefetch_enabled = false; - dceip.lb_write_pixels_per_dispclk = bw_int_to_fixed(1); - dceip.lb_size_per_component444 = bw_int_to_fixed(245952); - dceip.graphics_lb_nodownscaling_multi_line_prefetching = true; - dceip.stutter_and_dram_clock_state_change_gated_before_cursor = + dceip->alpha_vscaler_efficiency = bw_int_to_fixed(3); + dceip->max_dmif_buffer_allocated = 4; + dceip->graphics_dmif_size = 24576; + dceip->underlay_luma_dmif_size = 19456; + dceip->underlay_chroma_dmif_size = 23552; + dceip->pre_downscaler_enabled = true; + dceip->underlay_downscale_prefetch_enabled = false; + dceip->lb_write_pixels_per_dispclk = bw_int_to_fixed(1); + dceip->lb_size_per_component444 = bw_int_to_fixed(245952); + dceip->graphics_lb_nodownscaling_multi_line_prefetching = true; + dceip->stutter_and_dram_clock_state_change_gated_before_cursor = bw_int_to_fixed(1); - dceip.underlay420_luma_lb_size_per_component = bw_int_to_fixed( + dceip->underlay420_luma_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.underlay420_chroma_lb_size_per_component = + dceip->underlay420_chroma_lb_size_per_component = bw_int_to_fixed(164352); - dceip.underlay422_lb_size_per_component = bw_int_to_fixed( + dceip->underlay422_lb_size_per_component = bw_int_to_fixed( 82176); - dceip.cursor_chunk_width = bw_int_to_fixed(64); - dceip.cursor_dcp_buffer_lines = bw_int_to_fixed(4); - dceip.underlay_maximum_width_efficient_for_tiling = + dceip->cursor_chunk_width = bw_int_to_fixed(64); + dceip->cursor_dcp_buffer_lines = bw_int_to_fixed(4); + dceip->underlay_maximum_width_efficient_for_tiling = bw_int_to_fixed(1920); - dceip.underlay_maximum_height_efficient_for_tiling = + dceip->underlay_maximum_height_efficient_for_tiling = bw_int_to_fixed(1080); - dceip.peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = + dceip->peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display = bw_frc_to_fixed(3, 10); - dceip.peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = + dceip->peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation = bw_int_to_fixed(25); - dceip.minimum_outstanding_pte_request_limit = bw_int_to_fixed( + dceip->minimum_outstanding_pte_request_limit = bw_int_to_fixed( 2); - dceip.maximum_total_outstanding_pte_requests_allowed_by_saw = + dceip->maximum_total_outstanding_pte_requests_allowed_by_saw = bw_int_to_fixed(128); - dceip.limit_excessive_outstanding_dmif_requests = true; - dceip.linear_mode_line_request_alternation_slice = + dceip->limit_excessive_outstanding_dmif_requests = true; + dceip->linear_mode_line_request_alternation_slice = bw_int_to_fixed(64); - dceip.scatter_gather_lines_of_pte_prefetching_in_linear_mode = + dceip->scatter_gather_lines_of_pte_prefetching_in_linear_mode = 32; - dceip.display_write_back420_luma_mcifwr_buffer_size = 12288; - dceip.display_write_back420_chroma_mcifwr_buffer_size = 8192; - dceip.request_efficiency = bw_frc_to_fixed(8, 10); - dceip.dispclk_per_request = bw_int_to_fixed(2); - dceip.dispclk_ramping_factor = bw_frc_to_fixed(105, 100); - dceip.display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); - dceip.scatter_gather_pte_request_rows_in_tiling_mode = 2; - dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); + dceip->display_write_back420_luma_mcifwr_buffer_size = 12288; + dceip->display_write_back420_chroma_mcifwr_buffer_size = 8192; + dceip->request_efficiency = bw_frc_to_fixed(8, 10); + dceip->dispclk_per_request = bw_int_to_fixed(2); + dceip->dispclk_ramping_factor = bw_frc_to_fixed(105, 100); + dceip->display_pipe_throughput_factor = bw_frc_to_fixed(105, 100); + dceip->scatter_gather_pte_request_rows_in_tiling_mode = 2; + dceip->mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); break; default: break; } - *bw_dceip = dceip; - *bw_vbios = vbios; + *bw_dceip = *dceip; + *bw_vbios = *vbios; + kfree(dceip); + kfree(vbios); } /** From patchwork Mon Jan 11 19:19:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360553 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139599jai; Mon, 11 Jan 2021 11:20:13 -0800 (PST) X-Google-Smtp-Source: ABdhPJz3AzNRc0JLkwCo9YqXmz9vjuptSY11XlM9NXQ1uab4CKS9VVdZ5PnfKqt45epilBaRVrUS X-Received: by 2002:aa7:8483:0:b029:1a5:b071:fb8e with SMTP id u3-20020aa784830000b02901a5b071fb8emr883262pfn.48.1610392813472; Mon, 11 Jan 2021 11:20:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392813; cv=none; d=google.com; s=arc-20160816; b=gs2tPLdKyPuwORaVVBeg4n1v3nklmC3EcJp551nbxmVh0fNwDHrArZNXr+MhrT6g6M zq/T4ckiZ5q7QrssY2s9myfRZVWRw5zLEUaim8HcWvyHnu9Uo2p0hoRFAb98L/ax5UpY WkagbZBrj7Wc1vH1JL8qbVbgT8H+hqemZDUDeRdoRv5EnbxrwyljrUEuPxNPUiJASkFF MTQrJ054u13N8m22MGYaeKQF7fCGp7tOW6si9JQ5lEpoPsgTJ1fpQdpvmMHZ31hM70rf YiXNqW4nBCKGLtu9BtLeQDF8ugxB0HmMofeoGIPyFj1hxnerqT2j2xLcm525VBD9BPLh 9Alw== ARC-Message-Signature: i=1; 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[131.252.210.177]) by mx.google.com with ESMTPS id e12si450222pgs.103.2021.01.11.11.20.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=B81lzbUz; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E894897E3; Mon, 11 Jan 2021 19:19:57 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8B33E89E2B for ; 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Mon, 11 Jan 2021 11:19:50 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:49 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 15/40] drm/amd/display/dc/dce120/dce120_resource: Staticify local functions Date: Mon, 11 Jan 2021 19:19:01 +0000 Message-Id: <20210111191926.3688443-16-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Anthony Koo , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:426:32: warning: no previous prototype for ‘dce120_opp_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:440:17: warning: no previous prototype for ‘dce120_aux_engine_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:478:20: warning: no previous prototype for ‘dce120_i2c_hw_create’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Anthony Koo Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c index f1e3d2888eacc..c65e4d125c8e2 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c @@ -423,7 +423,7 @@ static const struct dce110_clk_src_mask cs_mask = { CS_COMMON_MASK_SH_LIST_DCE_112(_MASK) }; -struct output_pixel_processor *dce120_opp_create( +static struct output_pixel_processor *dce120_opp_create( struct dc_context *ctx, uint32_t inst) { @@ -437,7 +437,7 @@ struct output_pixel_processor *dce120_opp_create( ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); return &opp->base; } -struct dce_aux *dce120_aux_engine_create( +static struct dce_aux *dce120_aux_engine_create( struct dc_context *ctx, uint32_t inst) { @@ -475,7 +475,7 @@ static const struct dce_i2c_mask i2c_masks = { I2C_COMMON_MASK_SH_LIST_DCE110(_MASK) }; -struct dce_i2c_hw *dce120_i2c_hw_create( +static struct dce_i2c_hw *dce120_i2c_hw_create( struct dc_context *ctx, uint32_t inst) { From patchwork Mon Jan 11 19:19:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360551 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139526jai; Mon, 11 Jan 2021 11:20:07 -0800 (PST) X-Google-Smtp-Source: ABdhPJxsld4fHbtY77Vr1/vF0xg9mQ+8uP1vk8E4JJwGmRTHTzDDEusQ1Bkc4YNvJnsMLxywomdP X-Received: by 2002:a17:90a:fb8a:: with SMTP id cp10mr384409pjb.136.1610392807621; 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Mon, 11 Jan 2021 11:19:51 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:50 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 16/40] drm/amd/display/dc/dce120/dce120_timing_generator: Demote non-kerneldoc headers Date: Mon, 11 Jan 2021 19:19:02 +0000 Message-Id: <20210111191926.3688443-17-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:602:13: warning: ‘dce120_timing_generator_get_position’ defined but not used [-Wunused-function] drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:73: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:593: warning: Cannot understand ***************************************************************************** Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Lee Jones Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c index ebc7d61e8bf36..d02ecb983c9cd 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c @@ -69,7 +69,7 @@ #define CRTC_REG_SET_3(reg, field1, val1, field2, val2, field3, val3) \ CRTC_REG_SET_N(reg, 3, FD(reg##__##field1), val1, FD(reg##__##field2), val2, FD(reg##__##field3), val3) -/** +/* ***************************************************************************** * Function: is_in_vertical_blank * @@ -589,7 +589,7 @@ static void dce120_timing_generator_set_drr( } } -/** +/* ***************************************************************************** * Function: dce120_timing_generator_get_position * From patchwork Mon Jan 11 19:19:03 2021 Content-Type: text/plain; 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Mon, 11 Jan 2021 11:19:52 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:52 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 17/40] drm/amd/display/dc/dce/dce_aux: Remove duplicate line causing 'field overwritten' issue Date: Mon, 11 Jan 2021 19:19:03 +0000 Message-Id: <20210111191926.3688443-18-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:59: drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10014:58: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro ‘AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:127:2: note: in expansion of macro ‘AUX_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:177:2: note: in expansion of macro ‘DCE_AUX_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10014:58: note: (near initialization for ‘aux_shift.AUX_SW_AUTOINCREMENT_DISABLE’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro ‘AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:127:2: note: in expansion of macro ‘AUX_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:177:2: note: in expansion of macro ‘DCE_AUX_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10013:56: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro ‘AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:127:2: note: in expansion of macro ‘AUX_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:181:2: note: in expansion of macro ‘DCE_AUX_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10013:56: note: (near initialization for ‘aux_mask.AUX_SW_AUTOINCREMENT_DISABLE’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro ‘AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:127:2: note: in expansion of macro ‘AUX_SF’ Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce/dce_aux.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.h b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.h index 382465862f297..277484cf853e4 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.h @@ -124,7 +124,6 @@ struct dce110_aux_registers { AUX_SF(AUX_SW_CONTROL, AUX_SW_GO, mask_sh),\ AUX_SF(AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\ AUX_SF(AUX_SW_DATA, AUX_SW_DATA_RW, mask_sh),\ - AUX_SF(AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\ AUX_SF(AUX_SW_DATA, AUX_SW_INDEX, mask_sh),\ AUX_SF(AUX_SW_DATA, AUX_SW_DATA, mask_sh),\ AUX_SF(AUX_SW_STATUS, AUX_SW_REPLY_BYTE_COUNT, mask_sh),\ From patchwork Mon Jan 11 19:19:04 2021 Content-Type: text/plain; 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[2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id y68si467749pfg.288.2021.01.11.11.20.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=lI4dH5WM; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 991F889E2B; Mon, 11 Jan 2021 19:19:57 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5869F89CF1 for ; Mon, 11 Jan 2021 19:19:55 +0000 (UTC) Received: by mail-wm1-x329.google.com with SMTP id a6so247163wmc.2 for ; Mon, 11 Jan 2021 11:19:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GqONQ/c46HwLlMHyZcb5Hym3CQTe21MZsvbjJWaglwo=; b=lI4dH5WM0yKxFmFhaUmduedrt7oA/k406RlSyI5Ux9gBEFO4EleT7ZFuBWV5XS+1Uj R3U7bK4Ji+8VXN0LERBhRByhIRpG+C6vM956Ma+xSCTIrAoR1O2FM28aFskCt/Fnj+Vx 7eufP92JLw8Sk9JCBNs2DLL2sxbLv6yfDsgOUn4ykryXdDzJKKRT2VzKCylnLTs4uw4r qqrCUcssPkpjWaC6vlalD/+ZHCKR0lx8D18oxG0OJphSVNgHeBcP3REPGSX7D5UfdK3x bnSxjYILquF4ENw9PQjcKw2uqlhAdFYCkScuD/D5eFatHWunb/HPllVFf7QiU2EZxdg0 P1uA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GqONQ/c46HwLlMHyZcb5Hym3CQTe21MZsvbjJWaglwo=; b=Lk1w4ogat3w9T6LJfOSMILYQ+dyvbyPGlgBglLpcfEpfCSFqskPBAhC9R1auHVhc13 H0g5IaUXA3peT5QbwzDcE08Gb21+tjaVkUDdwN9QJhicrSA+vlLQQDQ7JKdd0ctoMdGg i+002bDsm22siPeRUVCq2PpImP5cRek7vcn+aIfjcWRBz6hltDgDN8OLHpzIGoZv/Vy/ DKVH+u9Ub4/q6C4puLkG7EzYifE6MMQsOa3u05NePdvDywmwPdhU9jx9qKlmTzOyssJm UM5N6u1+u5OfDZY40IYJ5dpjIRFIhFc+AJPHq8Wd744PRsj6QSleF1ECzM1nPnNT8gjO Ondw== X-Gm-Message-State: AOAM531dsi0pxbBrXLFbHQVJPkAlrYbEEDq2+pZaXS9M10Z0f6QTnuVp eN5kJtfmt2oNzyKmD5Dw5wId7Q== X-Received: by 2002:a7b:c306:: with SMTP id k6mr293979wmj.52.1610392794010; Mon, 11 Jan 2021 11:19:54 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:53 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 18/40] drm/amd/display/dc/dce112/Makefile: Ignore -Woverride-init warning Date: Mon, 11 Jan 2021 19:19:04 +0000 Message-Id: <20210111191926.3688443-19-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This file uses a complex abstracted set of hierarchical macros to setup its applicable register lists within constant structures. However in the case of TMDS_CNTL we wish to mark it as not applicable for this use-case. One method would be to de-const all of the definitions and users, then manually zero out TMDS_CNTL from the list. Another would be to create a new set of hierarchical macros to omit TMDS_CNTL entirely. Both would entail a great deal of unnecessary changes and maintenance burden. Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:290:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: note: (near initialization for ‘stream_enc_regs[0].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:290:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:291:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: note: (near initialization for ‘stream_enc_regs[1].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:291:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:292:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: note: (near initialization for ‘stream_enc_regs[2].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:292:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:293:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: note: (near initialization for ‘stream_enc_regs[3].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:293:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:294:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: note: (near initialization for ‘stream_enc_regs[4].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:294:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:295:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:286:15: note: (near initialization for ‘stream_enc_regs[5].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:295:2: note: in expansion of macro ‘stream_enc_regs’ Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce112/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce112/Makefile b/drivers/gpu/drm/amd/display/dc/dce112/Makefile index 8e090446d5119..9de6501702d2c 100644 --- a/drivers/gpu/drm/amd/display/dc/dce112/Makefile +++ b/drivers/gpu/drm/amd/display/dc/dce112/Makefile @@ -23,6 +23,8 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. +CFLAGS_$(AMDDALPATH)/dc/dce112/dce112_resource.o = $(call cc-disable-warning, override-init) + DCE112 = dce112_compressor.o dce112_hw_sequencer.o \ dce112_resource.o From patchwork Mon Jan 11 19:19:05 2021 Content-Type: text/plain; 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[2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id r130si473500pfc.271.2021.01.11.11.20.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=rjSyoFGb; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C7E6389F27; Mon, 11 Jan 2021 19:20:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by gabe.freedesktop.org (Postfix) with ESMTPS id AFBC589E2B for ; Mon, 11 Jan 2021 19:19:56 +0000 (UTC) Received: by mail-wm1-x32e.google.com with SMTP id c124so233270wma.5 for ; Mon, 11 Jan 2021 11:19:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4f0FtZXp9xVs1vBA+TFZeeAO+I8q3YihV8u/Z7zvpoM=; b=rjSyoFGbyoA6OFHvEnHL5eOuRnQB8feiOHf2dVoaV0cnhK1LHvbxXhQNf5fpny64TM V0BurbwGgCi2pGIl+/muaxAZcbrIOwlZ4JSl5ynfsznPn24tPcngDhW/KzLsgB6AR+Tr +TeysSR2e3qbwg+6JD8qJmHkbGLLrMCQkp1szP8svGFRnhZgaV2l3prirUlF1OwKdveK 0ll2Y080EHI//ECwaQRonRJZQnLWJcPnrXOB3Gz5yunY45AMBo6BgOPiChBAq3aPBADo brVG2yU/r7JffymFfbfBhmMFDNZqQEyv4OKTQEnc1kycnmPkosze7rgJ9GIoGb+JCf3S qSCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4f0FtZXp9xVs1vBA+TFZeeAO+I8q3YihV8u/Z7zvpoM=; b=ZG1OkQYv3EV2GonXaaf2PtM+X75GPrBl+w4qFx8yBk44QLhKcDoP/v/HQ3/GX6d0Iv lRezHad/GPcyDsYtz9cQJYzK8vR9Wpw+GIaSMktqQN69sW97EN+cibtOYxysg0WZ0Vwb JhOSyTEdc2TloMZbPO9XcocCSsF2pAR+4/o+hoA3psiizIN3HCk0LnHR7GqJm38Sq8eT kqI0k016GWecdNPLnYZHET22Rt/raRwOXi2fhsZ4mNjDROQxYImdWAGTh5Uiwa4TcLbj ND3xLZRn30RrlYbcTscUmo2dFCJ3h6fDFA0yOuyxVkcnVAgv8v+jgDPAqeaYQavZnJDd 6vBA== X-Gm-Message-State: AOAM533KOhuKWAUGPaTGq+E3qtqz8KoE6pbXyt5CxDNVjQgOKv0tRrPe MJnuBFUt64zKB1e+r2nzt/YQ4Q== X-Received: by 2002:a7b:cf30:: with SMTP id m16mr255039wmg.145.1610392795315; Mon, 11 Jan 2021 11:19:55 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:54 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 19/40] drm/amd/display/dc/dce/dce_opp: Remove duplicate entries causing 'field overwritten' issues Date: Mon, 11 Jan 2021 19:19:05 +0000 Message-Id: <20210111191926.3688443-20-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Mauro Rossi , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:59: drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10480:62: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in expansion of macro ‘FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__SHIFT’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in expansion of macro ‘OPP_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in expansion of macro ‘OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:321:2: note: in expansion of macro ‘OPP_COMMON_MASK_SH_LIST_DCE_112’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10480:62: note: (near initialization for ‘opp_shift.FMT_TEMPORAL_DITHER_EN’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in expansion of macro ‘FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__SHIFT’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in expansion of macro ‘OPP_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in expansion of macro ‘OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:321:2: note: in expansion of macro ‘OPP_COMMON_MASK_SH_LIST_DCE_112’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10479:60: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in expansion of macro ‘FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MASK’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in expansion of macro ‘OPP_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in expansion of macro ‘OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:325:2: note: in expansion of macro ‘OPP_COMMON_MASK_SH_LIST_DCE_112’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10479:60: note: (near initialization for ‘opp_mask.FMT_TEMPORAL_DITHER_EN’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in expansion of macro ‘FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MASK’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in expansion of macro ‘OPP_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in expansion of macro ‘OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE’ Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Mauro Rossi Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce/dce_opp.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h index 4d484ef60f357..bf1ffc3629c7f 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h @@ -111,7 +111,6 @@ enum dce110_opp_reg_type { OPP_SF(FMT_DITHER_RAND_R_SEED, FMT_RAND_R_SEED, mask_sh),\ OPP_SF(FMT_DITHER_RAND_G_SEED, FMT_RAND_G_SEED, mask_sh),\ OPP_SF(FMT_DITHER_RAND_B_SEED, FMT_RAND_B_SEED, mask_sh),\ - OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\ OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_RESET, mask_sh),\ OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_OFFSET, mask_sh),\ OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_DEPTH, mask_sh),\ @@ -219,7 +218,6 @@ enum dce110_opp_reg_type { OPP_SF(FMT_DITHER_RAND_R_SEED, FMT_RAND_R_SEED, mask_sh),\ OPP_SF(FMT_DITHER_RAND_G_SEED, FMT_RAND_G_SEED, mask_sh),\ OPP_SF(FMT_DITHER_RAND_B_SEED, FMT_RAND_B_SEED, mask_sh),\ - OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\ OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_RESET, mask_sh),\ OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_OFFSET, mask_sh),\ OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_DEPTH, mask_sh),\ From patchwork Mon Jan 11 19:19:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360555 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139636jai; Mon, 11 Jan 2021 11:20:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJz3fwUgJ+BCoESsAZunMcQm14L1dqMjl1Y/yLYSc5mqsnKxurU1BcC0uZNf+0GY89CFoCFt X-Received: by 2002:a17:90b:14c7:: with SMTP id jz7mr401745pjb.40.1610392816511; Mon, 11 Jan 2021 11:20:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392816; cv=none; d=google.com; s=arc-20160816; b=q7eKtXM6KRXdoEozOY0jwpFrqwrguTJiC2mrLS9MegjyjO5+AFxPVO4ciqnlosIMXa HyafhXXF9tKkTjkbZ+nRxg3wyEiu/zpm0oOx7mRbBKH3xuF75HRTZFrUiNnhqVLVgyGh mmDrqTQOCJqLBNEdGKPCdrbCIk1GUPN4TeWHbLRTJmAvpRz0O3ZPz6covGu4MjwukiKL DvnLne3GFGzPzD7h0Dh4D6R3dLMfCRdVHkxrNrThYSLKeXeoBlfRt4IfYgdPh+DKcG49 sAliKmptwuN8dARjZ/x/3PwG3iu2o9NLS37EABl7iK2gbS8XQkXXz67Pt95XfsECw2cu Z6kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to; bh=tj1deYFWEMvl42lDvZU/vqsbc42iE9H0ScSpQHPl1MA=; b=t5iGifDfb4YYUdJAH7VPkxziJ7h+CDHw0nbt44fXJtm+53Hcixi/M5+EwoXSG7cNs8 EMMpDRDhclL/DWNVXa0P/gMohyDO0jR7NhSttrjgiQKjyQJdtt4vD7Mx+USVzXIobpH9 efmiEidhiZeERwBjDFOgm3ZYkN6suyPSNIcVp0VoonqYvP2d486wDu7tRE+GUae69W3j Kg48NMNzPjJ1ZnWouc0TcrA8npYipu/y15YJuEYrhgH8Ipvwgj9x22CztKMKNGT5cB9P lB2yABGykOAYGUGKCtYdnsBiKXuin3WA4DXAIGbTBOhIvZo8WJKC4zCCl5re0rTxIYyN 0QvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=A7rFEb0N; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. 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Mon, 11 Jan 2021 11:19:56 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:55 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 20/40] drm/amd/display/dc/dce110/dce110_timing_generator: Remove unused variable 'value_crtc_vtotal' Date: Mon, 11 Jan 2021 19:19:06 +0000 Message-Id: <20210111191926.3688443-21-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Anthony Koo , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , Tony Cheng , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6?= =?utf-8?q?nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c: In function ‘dce110_timing_generator_tear_down_global_swap_lock’: drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1354:12: warning: variable ‘value_crtc_vtotal’ set but not used [-Wunused-but-set-variable] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Aric Cyr Cc: Anthony Koo Cc: Tony Cheng Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c index 1ea7db8eeb988..9a6c411bb7fe6 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c @@ -1351,10 +1351,7 @@ void dce110_timing_generator_tear_down_global_swap_lock( /* Restore DCP_GSL_PURPOSE_SURFACE_FLIP */ { - uint32_t value_crtc_vtotal; - - value_crtc_vtotal = dm_read_reg(tg->ctx, - CRTC_REG(mmCRTC_V_TOTAL)); + dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_V_TOTAL)); set_reg_field_value(value, 0, From patchwork Mon Jan 11 19:19:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360558 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139698jai; Mon, 11 Jan 2021 11:20:21 -0800 (PST) X-Google-Smtp-Source: ABdhPJwL0TZU8lcaQb6dSWVy0QHn2SzlFep5H2BKv0LcpqUnDQ8PelMrUuIpmmn8esuSte4hfDEE X-Received: by 2002:a17:902:c155:b029:da:9460:99a0 with SMTP id 21-20020a170902c155b02900da946099a0mr1257094plj.20.1610392821363; Mon, 11 Jan 2021 11:20:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392821; cv=none; d=google.com; s=arc-20160816; b=oMVJHnpOgwPOQkYHvTm1p7ciPnJ5HS10tyeVuyeP1EL/xNp4by6kWfumcZ+kM/bk/U LiERbJ6GMG8Xm4iJnnobsWHI9j/lS87tX4owyVcwqSMJaQ7Rh2n15zYGnGbnO1HTEDqI rXPKKSFn8k3Aan2dMghyNhgJtEZxgaIhnTsM9KG5ksjbQqs8fBpx4Q74zmdD2mWpe4ta yZjj1eD4oPp2Vau7dDyorQDUXGJZS3VS8h1qxY+4I1/s0w9eUFnRv0XGgBzHKvAnlnSp S3kOktrI4swZlYFTXcwS6DP/cnVH2zGQZC7wxSQY8pKhehuMTDmIS5d9LiuY5Z2HHSOz Mh4A== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:19:57 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:57 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 21/40] drm/amd/display/dc/dce110/dce110_compressor: Remove unused function 'dce110_get_required_compressed_surfacesize Date: Mon, 11 Jan 2021 19:19:07 +0000 Message-Id: <20210111191926.3688443-22-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_compressor.c:415:6: warning: no previous prototype for ‘dce110_get_required_compressed_surfacesize’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../amd/display/dc/dce110/dce110_compressor.c | 30 ------------------- 1 file changed, 30 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c index 72b580a4eb856..18b0a69b0b1e8 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c @@ -412,36 +412,6 @@ void dce110_compressor_destroy(struct compressor **compressor) *compressor = NULL; } -bool dce110_get_required_compressed_surfacesize(struct fbc_input_info fbc_input_info, - struct fbc_requested_compressed_size size) -{ - bool result = false; - - unsigned int max_x = FBC_MAX_X, max_y = FBC_MAX_Y; - - get_max_support_fbc_buffersize(&max_x, &max_y); - - if (fbc_input_info.dynamic_fbc_buffer_alloc == 0) { - /* - * For DCE11 here use Max HW supported size: HW Support up to 3840x2400 resolution - * or 18000 chunks. - */ - size.preferred_size = size.min_size = align_to_chunks_number_per_line(max_x) * max_y * 4; /* (For FBC when LPT not supported). */ - size.preferred_size_alignment = size.min_size_alignment = 0x100; /* For FBC when LPT not supported */ - size.bits.preferred_must_be_framebuffer_pool = 1; - size.bits.min_must_be_framebuffer_pool = 1; - - result = true; - } - /* - * Maybe to add registry key support with optional size here to override above - * for debugging purposes - */ - - return result; -} - - void get_max_support_fbc_buffersize(unsigned int *max_x, unsigned int *max_y) { *max_x = FBC_MAX_X; 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Mon, 11 Jan 2021 11:19:59 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:58 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 22/40] drm/amd/display/dc/dce110/dce110_hw_sequencer: Demote non-conformant kernel-doc header Date: Mon, 11 Jan 2021 19:19:08 +0000 Message-Id: <20210111191926.3688443-23-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:1639: warning: Function parameter or member 'dc' not described in 'dce110_enable_accelerated_mode' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:1639: warning: Function parameter or member 'context' not described in 'dce110_enable_accelerated_mode' Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 4c230f1de9a30..c57405fa4bebc 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -1628,7 +1628,7 @@ static struct dc_link *get_edp_link_with_sink( return link; } -/** +/* * When ASIC goes from VBIOS/VGA mode to driver/accelerated mode we need: * 1. Power down all DC HW blocks * 2. Disable VGA engine on all controllers From patchwork Mon Jan 11 19:19:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360560 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139764jai; Mon, 11 Jan 2021 11:20:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJyp6QMCHkPdss1ltFCmluFEg9CH1e9bN6yjyqgBBg64000eU7vcgKrfehWBTl5gf6u0cYgn X-Received: by 2002:a65:55ca:: with SMTP id k10mr951330pgs.431.1610392825581; Mon, 11 Jan 2021 11:20:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392825; cv=none; d=google.com; s=arc-20160816; b=UPl6cKYzAVoY2t9m0ynW4nLhJX5M2cA5Dh6q6aZCLdnWAF55fL/zL4ZHzA0Aw05K2H NsFcIBxXraSgFBJD+9JJ84Vb2UKiPniZZBNgmi42SgHcV09sJzlklggzYHs9/uiOYWHG LkwmdorXWou3dscG1XD6s65nEjrMsHq8wBoR0Y+7iOB1/HOoy2b0x+DlP0jxHCXQzDRx N8qNu9nmDWESrQ/btwQy46ns39l8MOdDCFu3HWdHubgHLgoGndLMACLQylq1yclS2179 aYbzKrUwFm41MWENgKkjP9NMG8bLuxMS3JSCHqMTUkE1Dbhi+JxPGYwaWMHBY4blZMln woGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to; bh=b5SBs/WSRE8Ed79C+CkaUrLj79e2d3xU+C+fSbUqT9s=; b=cwWTj1jgOrcWd49oe49gzhRdiMUonVRIKrWZAf0H0F2j8WkZ/eG96YFIz71kXLC88y NPUs2OtvH37GVlhCCyzU7F3NG4qdD/UcXeYrfoHrbHcWpwYmvYtm29h7Sfv3cmffoBIz yO7zBwYYXyt181QIz7HxwuRkBaoZJPfFTMplromgShday8m9g7KjB0X5gyCxFEnvz2yZ mz1xgoDyp2+vDMluuScvpyU6xJcnf3T5Cu90APvyJsipYLVrabCTtRGLWWoVsV5IhtMB R80RFt1//Ni0uPbWlIxUssdgxbJW018kDsPbzvdSZiaGqUnKSPkgxQLEaWuYJ5oPSjVH SojQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=gdrU0FCu; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. 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Mon, 11 Jan 2021 11:20:00 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.19.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:19:59 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 23/40] drm/amd/display/dc/dce110/dce110_mem_input_v: Make local functions static Date: Mon, 11 Jan 2021 19:19:09 +0000 Message-Id: <20210111191926.3688443-24-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:471:6: warning: no previous prototype for ‘dce_mem_input_v_is_surface_pending’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:486:6: warning: no previous prototype for ‘dce_mem_input_v_program_surface_flip_and_addr’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:563:6: warning: no previous prototype for ‘dce_mem_input_v_program_pte_vm’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:636:6: warning: no previous prototype for ‘dce_mem_input_v_program_surface_config’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:922:6: warning: no previous prototype for ‘dce_mem_input_v_program_display_marks’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:945:6: warning: no previous prototype for ‘dce_mem_input_program_chroma_display_marks’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:966:6: warning: no previous prototype for ‘dce110_allocate_mem_input_v’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:1008:6: warning: no previous prototype for ‘dce110_free_mem_input_v’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../amd/display/dc/dce110/dce110_mem_input_v.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c index d54172d88f5f3..19b1976139b69 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c @@ -468,7 +468,7 @@ static void program_pixel_format( } } -bool dce_mem_input_v_is_surface_pending(struct mem_input *mem_input) +static bool dce_mem_input_v_is_surface_pending(struct mem_input *mem_input) { struct dce_mem_input *mem_input110 = TO_DCE_MEM_INPUT(mem_input); uint32_t value; @@ -483,7 +483,7 @@ bool dce_mem_input_v_is_surface_pending(struct mem_input *mem_input) return false; } -bool dce_mem_input_v_program_surface_flip_and_addr( +static bool dce_mem_input_v_program_surface_flip_and_addr( struct mem_input *mem_input, const struct dc_plane_address *address, bool flip_immediate) @@ -560,7 +560,7 @@ static const unsigned int *get_dvmm_hw_setting( } } -void dce_mem_input_v_program_pte_vm( +static void dce_mem_input_v_program_pte_vm( struct mem_input *mem_input, enum surface_pixel_format format, union dc_tiling_info *tiling_info, @@ -633,7 +633,7 @@ void dce_mem_input_v_program_pte_vm( dm_write_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL_C, value); } -void dce_mem_input_v_program_surface_config( +static void dce_mem_input_v_program_surface_config( struct mem_input *mem_input, enum surface_pixel_format format, union dc_tiling_info *tiling_info, @@ -919,7 +919,7 @@ static void program_nbp_watermark_c( marks); } -void dce_mem_input_v_program_display_marks( +static void dce_mem_input_v_program_display_marks( struct mem_input *mem_input, struct dce_watermarks nbp, struct dce_watermarks stutter, @@ -942,7 +942,7 @@ void dce_mem_input_v_program_display_marks( } -void dce_mem_input_program_chroma_display_marks( +static void dce_mem_input_program_chroma_display_marks( struct mem_input *mem_input, struct dce_watermarks nbp, struct dce_watermarks stutter, @@ -963,7 +963,7 @@ void dce_mem_input_program_chroma_display_marks( stutter); } -void dce110_allocate_mem_input_v( +static void dce110_allocate_mem_input_v( struct mem_input *mi, uint32_t h_total,/* for current stream */ uint32_t v_total,/* for current stream */ @@ -1005,7 +1005,7 @@ void dce110_allocate_mem_input_v( } -void dce110_free_mem_input_v( +static void dce110_free_mem_input_v( struct mem_input *mi, uint32_t total_stream_num) { From patchwork Mon Jan 11 19:19:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360559 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139724jai; Mon, 11 Jan 2021 11:20:23 -0800 (PST) X-Google-Smtp-Source: ABdhPJwikMS409CPjAnTgcqOP/ubIZ/8BLhAK9CnAYNjNIlEK0HTnz/QLPMWoUexU0AaqmMoFsjs X-Received: by 2002:a17:90b:228b:: with SMTP id kx11mr397801pjb.122.1610392823247; Mon, 11 Jan 2021 11:20:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392823; cv=none; d=google.com; s=arc-20160816; b=LihYTJzlKBQDluznD8trQnIWuStCirIK/YXF3t/JKbCw9qclyCSRIXnHa9dv2s54Ey Xz+iPybrg21+HaqbhfdwTV532Wes6hY18mYVGuwWqpwL4NKRrwNYvNQfZ+PKwObeXS7N wVMpYPIl68SFgOmPPTMKh1waL7idRhKQaZvnj92AK1/TRQgYra0S69gMrlLSK5BYjnHC 8cGj4Q4IJOZ75zEvtq+dyoQ+Gv1DAC+xX0S8CmOdEzssmGsjwNuV74vg85tGv9dlCNRZ Dy60Q6ly/wtFHPLv3Wf6g7P5WTszYX9QtRosdeIEffXc4AMA65an3DZlHnCgJSuE71/s YJ0g== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:20:01 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:01 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 24/40] drm/amd/pm/swsmu/smu11/vangogh_ppt: Make local function 'vangogh_clk_dpm_is_enabled' static Date: Mon, 11 Jan 2021 19:19:10 +0000 Message-Id: <20210111191926.3688443-25-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Xiaojian Du , David Airlie , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6?= =?utf-8?q?nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:613:6: warning: no previous prototype for ‘vangogh_clk_dpm_is_enabled’ [-Wmissing-prototypes] Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Xiaojian Du Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c index 75ddcadf3802a..37bd4c647418d 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c @@ -610,8 +610,8 @@ static int vangogh_get_profiling_clk_mask(struct smu_context *smu, return 0; } -bool vangogh_clk_dpm_is_enabled(struct smu_context *smu, - enum smu_clk_type clk_type) +static bool vangogh_clk_dpm_is_enabled(struct smu_context *smu, + enum smu_clk_type clk_type) { enum smu_feature_mask feature_id = 0; From patchwork Mon Jan 11 19:19:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360561 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139777jai; Mon, 11 Jan 2021 11:20:26 -0800 (PST) X-Google-Smtp-Source: ABdhPJzmB1jCbhhEBqdd2UglD2O9U9osyOPvsbdNuVwVyAe49rzi0H/sN87LR46HSskgO6TaCsIf X-Received: by 2002:aa7:9885:0:b029:1aa:8dda:1944 with SMTP id r5-20020aa798850000b02901aa8dda1944mr800463pfl.35.1610392826783; Mon, 11 Jan 2021 11:20:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392826; cv=none; d=google.com; s=arc-20160816; b=TkpxjChmbC+OYxaBVOZw4wt7xkq5F7KfBm9mX1WU1Hn8A6BZX1oRoc6+w8YSLP/GWG sMvLFf30zEOttensTPmoP9nCgbgMavqKR7+9iHkKBuVEU42oxQID7k0sGZqFLE01K3Y+ crcc7sEjDA2EK4GUF8OPCK8k9f9dBfY3BiOdOd6BWnvOPUUgnCe6aWZ7Fo9y5gAFAiEv mwK0+sCSqsgTmpvVZNmgV/LaOAZ84EHFFiK6QODzHJkYq+qVQHbntklnUNBytd7lp3H9 a70GZ1UEZsdlqY0Nw0kIvepb4/CAp6/YquN/nr1MRoomNcIp3t2eVA0ooZyUjum17FEx oGAA== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:20:02 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:02 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 25/40] drm/amd/display/dc/dce120/dce120_timing_generator: Remove unused function 'dce120_timing_generator_get_position' Date: Mon, 11 Jan 2021 19:19:11 +0000 Message-Id: <20210111191926.3688443-26-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.c:602:13: warning: ‘dce120_timing_generator_get_position’ defined but not used [-Wunused-function] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Lee Jones Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../dc/dce120/dce120_timing_generator.c | 43 ------------------- 1 file changed, 43 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c index d02ecb983c9cd..b57c466124e76 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c @@ -589,49 +589,6 @@ static void dce120_timing_generator_set_drr( } } -/* - ***************************************************************************** - * Function: dce120_timing_generator_get_position - * - * @brief - * Returns CRTC vertical/horizontal counters - * - * @param [out] position - ***************************************************************************** - */ -static void dce120_timing_generator_get_position(struct timing_generator *tg, - struct crtc_position *position) -{ - uint32_t value; - struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); - - value = dm_read_reg_soc15( - tg->ctx, - mmCRTC0_CRTC_STATUS_POSITION, - tg110->offsets.crtc); - - position->horizontal_count = get_reg_field_value( - value, - CRTC0_CRTC_STATUS_POSITION, - CRTC_HORZ_COUNT); - - position->vertical_count = get_reg_field_value( - value, - CRTC0_CRTC_STATUS_POSITION, - CRTC_VERT_COUNT); - - value = dm_read_reg_soc15( - tg->ctx, - mmCRTC0_CRTC_NOM_VERT_POSITION, - tg110->offsets.crtc); - - position->nominal_vcount = get_reg_field_value( - value, - CRTC0_CRTC_NOM_VERT_POSITION, - CRTC_VERT_COUNT_NOM); -} - - static void dce120_timing_generator_get_crtc_scanoutpos( struct timing_generator *tg, uint32_t *v_blank_start, From patchwork Mon Jan 11 19:19:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360564 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139897jai; 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lee.jones@linaro.org Subject: [PATCH 26/40] drm/amd/display/dc/dce110/dce110_timing_generator: Demote kernel-doc abuses to standard function headers Date: Mon, 11 Jan 2021 19:19:12 +0000 Message-Id: <20210111191926.3688443-27-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Anthony Koo , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:79: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:124: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_enable_crtc' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:179: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:233: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_disable_crtc' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:258: warning: Function parameter or member 'tg' not described in 'program_horz_count_by_2' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:258: warning: Function parameter or member 'timing' not described in 'program_horz_count_by_2' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:284: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_program_timing_generator' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:284: warning: Function parameter or member 'dc_crtc_timing' not described in 'dce110_timing_generator_program_timing_generator' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:356: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:525: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:561: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1118: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_validate_timing' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1118: warning: Function parameter or member 'timing' not described in 'dce110_timing_generator_validate_timing' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1118: warning: Function parameter or member 'signal' not described in 'dce110_timing_generator_validate_timing' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1174: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_wait_for_vblank' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1198: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_wait_for_vactive' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1208: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1386: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1768: warning: Cannot understand ***************************************************************************** drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1801: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_disable_vga' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1851: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_set_overscan_color_black' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1851: warning: Function parameter or member 'color' not described in 'dce110_timing_generator_set_overscan_color_black' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.c:1851: warning: Excess function parameter 'param' description in 'dce110_timing_generator_set_overscan_color_black' Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Anthony Koo Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../dc/dce110/dce110_timing_generator.c | 71 +++++++++---------- 1 file changed, 34 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c index 9a6c411bb7fe6..d88a74559edd7 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c @@ -75,7 +75,7 @@ static void dce110_timing_generator_apply_front_porch_workaround( } } -/** +/* ***************************************************************************** * Function: is_in_vertical_blank * @@ -116,7 +116,7 @@ void dce110_timing_generator_set_early_control( dm_write_reg(tg->ctx, address, regval); } -/** +/* * Enable CRTC * Enable CRTC - call ASIC Control Object to enable Timing generator. */ @@ -175,7 +175,7 @@ void dce110_timing_generator_program_blank_color( dm_write_reg(tg->ctx, addr, value); } -/** +/* ***************************************************************************** * Function: disable_stereo * @@ -226,7 +226,7 @@ static void disable_stereo(struct timing_generator *tg) } #endif -/** +/* * disable_crtc - call ASIC Control Object to disable Timing generator. */ bool dce110_timing_generator_disable_crtc(struct timing_generator *tg) @@ -247,11 +247,10 @@ bool dce110_timing_generator_disable_crtc(struct timing_generator *tg) return result == BP_RESULT_OK; } -/** -* program_horz_count_by_2 -* Programs DxCRTC_HORZ_COUNT_BY2_EN - 1 for DVI 30bpp mode, 0 otherwise -* -*/ +/* + * program_horz_count_by_2 + * Programs DxCRTC_HORZ_COUNT_BY2_EN - 1 for DVI 30bpp mode, 0 otherwise + */ static void program_horz_count_by_2( struct timing_generator *tg, const struct dc_crtc_timing *timing) @@ -273,7 +272,7 @@ static void program_horz_count_by_2( CRTC_REG(mmCRTC_COUNT_CONTROL), regval); } -/** +/* * program_timing_generator * Program CRTC Timing Registers - DxCRTC_H_*, DxCRTC_V_*, Pixel repetition. * Call ASIC Control Object to program Timings. @@ -352,7 +351,7 @@ bool dce110_timing_generator_program_timing_generator( return result == BP_RESULT_OK; } -/** +/* ***************************************************************************** * Function: set_drr * @@ -521,7 +520,7 @@ uint32_t dce110_timing_generator_get_vblank_counter(struct timing_generator *tg) return field; } -/** +/* ***************************************************************************** * Function: dce110_timing_generator_get_position * @@ -557,7 +556,7 @@ void dce110_timing_generator_get_position(struct timing_generator *tg, CRTC_VERT_COUNT_NOM); } -/** +/* ***************************************************************************** * Function: get_crtc_scanoutpos * @@ -1106,11 +1105,11 @@ void dce110_timing_generator_set_test_pattern( } } -/** -* dce110_timing_generator_validate_timing -* The timing generators support a maximum display size of is 8192 x 8192 pixels, -* including both active display and blanking periods. Check H Total and V Total. -*/ +/* + * dce110_timing_generator_validate_timing + * The timing generators support a maximum display size of is 8192 x 8192 pixels, + * including both active display and blanking periods. Check H Total and V Total. + */ bool dce110_timing_generator_validate_timing( struct timing_generator *tg, const struct dc_crtc_timing *timing, @@ -1167,9 +1166,9 @@ bool dce110_timing_generator_validate_timing( return true; } -/** -* Wait till we are at the beginning of VBlank. -*/ +/* + * Wait till we are at the beginning of VBlank. + */ void dce110_timing_generator_wait_for_vblank(struct timing_generator *tg) { /* We want to catch beginning of VBlank here, so if the first try are @@ -1191,9 +1190,9 @@ void dce110_timing_generator_wait_for_vblank(struct timing_generator *tg) } } -/** -* Wait till we are in VActive (anywhere in VActive) -*/ +/* + * Wait till we are in VActive (anywhere in VActive) + */ void dce110_timing_generator_wait_for_vactive(struct timing_generator *tg) { while (dce110_timing_generator_is_in_vertical_blank(tg)) { @@ -1204,7 +1203,7 @@ void dce110_timing_generator_wait_for_vactive(struct timing_generator *tg) } } -/** +/* ***************************************************************************** * Function: dce110_timing_generator_setup_global_swap_lock * @@ -1215,7 +1214,6 @@ void dce110_timing_generator_wait_for_vactive(struct timing_generator *tg) * @param [in] gsl_params: setup data ***************************************************************************** */ - void dce110_timing_generator_setup_global_swap_lock( struct timing_generator *tg, const struct dcp_gsl_params *gsl_params) @@ -1382,7 +1380,7 @@ void dce110_timing_generator_tear_down_global_swap_lock( dm_write_reg(tg->ctx, address, value); } -/** +/* ***************************************************************************** * Function: is_counter_moving * @@ -1764,7 +1762,7 @@ void dce110_timing_generator_disable_reset_trigger( dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_TRIGB_CNTL), value); } -/** +/* ***************************************************************************** * @brief * Checks whether CRTC triggered reset occurred @@ -1791,7 +1789,7 @@ bool dce110_timing_generator_did_triggered_reset_occur( return (force || vert_sync); } -/** +/* * dce110_timing_generator_disable_vga * Turn OFF VGA Mode and Timing - DxVGA_CONTROL * VGA Mode and VGA Timing is used by VBIOS on CRT Monitors; @@ -1837,14 +1835,13 @@ void dce110_timing_generator_disable_vga( dm_write_reg(tg->ctx, addr, value); } -/** -* set_overscan_color_black -* -* @param :black_color is one of the color space -* :this routine will set overscan black color according to the color space. -* @return none -*/ - +/* + * set_overscan_color_black + * + * @param :black_color is one of the color space + * :this routine will set overscan black color according to the color space. + * @return none + */ void dce110_timing_generator_set_overscan_color_black( struct timing_generator *tg, const struct tg_color *color) From patchwork Mon Jan 11 19:19:13 2021 Content-Type: text/plain; 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Mon, 11 Jan 2021 11:20:05 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:05 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 27/40] drm/amd/display/dc/dce110/dce110_compressor: Strip out unused function 'controller_id_to_index' Date: Mon, 11 Jan 2021 19:19:13 +0000 Message-Id: <20210111191926.3688443-28-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_compressor.c:429:14: warning: no previous prototype for ‘controller_id_to_index’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Lee Jones Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../amd/display/dc/dce110/dce110_compressor.c | 25 ------------------- 1 file changed, 25 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c index 18b0a69b0b1e8..44564a4742b52 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c @@ -425,31 +425,6 @@ void get_max_support_fbc_buffersize(unsigned int *max_x, unsigned int *max_y) */ } - -unsigned int controller_id_to_index(enum controller_id controller_id) -{ - unsigned int index = 0; - - switch (controller_id) { - case CONTROLLER_ID_D0: - index = 0; - break; - case CONTROLLER_ID_D1: - index = 1; - break; - case CONTROLLER_ID_D2: - index = 2; - break; - case CONTROLLER_ID_D3: - index = 3; - break; - default: - break; - } - return index; -} - - static const struct compressor_funcs dce110_compressor_funcs = { .power_up_fbc = dce110_compressor_power_up_fbc, .enable_fbc = dce110_compressor_enable_fbc, From patchwork Mon Jan 11 19:19:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360562 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3139795jai; Mon, 11 Jan 2021 11:20:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJy2h2qjoIk/rXKiL1PRu6D925AGr1M3eCVxF+ki6LKgTj1vs+RTH6UTL9AW172fUY43zqNO X-Received: by 2002:a17:902:8d8d:b029:dc:4609:58a9 with SMTP id v13-20020a1709028d8db02900dc460958a9mr1213156plo.27.1610392828116; Mon, 11 Jan 2021 11:20:28 -0800 (PST) ARC-Seal: i=1; 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Mon, 11 Jan 2021 11:20:06 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:06 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 28/40] drm/amd/display/dc/calcs/dce_calcs: Demote non-conformant kernel-doc function headers Date: Mon, 11 Jan 2021 19:19:14 +0000 Message-Id: <20210111191926.3688443-29-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:2753: warning: Function parameter or member 'vbios' not described in 'is_display_configuration_supported' drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:2753: warning: Function parameter or member 'calcs_output' not described in 'is_display_configuration_supported' drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:3030: warning: Function parameter or member 'ctx' not described in 'bw_calcs' drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:3030: warning: Function parameter or member 'dceip' not described in 'bw_calcs' drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:3030: warning: Function parameter or member 'vbios' not described in 'bw_calcs' drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:3030: warning: Function parameter or member 'pipe' not described in 'bw_calcs' drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:3030: warning: Function parameter or member 'pipe_count' not described in 'bw_calcs' drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:3030: warning: Function parameter or member 'calcs_output' not described in 'bw_calcs' Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Lee Jones Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c index f69c2b84d432b..967d6d80bd38e 100644 --- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c @@ -2743,7 +2743,7 @@ void bw_calcs_init(struct bw_calcs_dceip *bw_dceip, kfree(vbios); } -/** +/* * Compare calculated (required) clocks against the clocks available at * maximum voltage (max Performance Level). */ @@ -3014,13 +3014,12 @@ static bool all_displays_in_sync(const struct pipe_ctx pipe[], return true; } -/** +/* * Return: * true - Display(s) configuration supported. * In this case 'calcs_output' contains data for HW programming * false - Display(s) configuration not supported (not enough bandwidth). */ - bool bw_calcs(struct dc_context *ctx, const struct bw_calcs_dceip *dceip, const struct bw_calcs_vbios *vbios, From patchwork Mon Jan 11 19:19:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360575 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3141217jai; Mon, 11 Jan 2021 11:22:29 -0800 (PST) X-Google-Smtp-Source: ABdhPJzjpTBnSVAoLneRwvhDLJSecEw5dgAODFv9cUdwLnno2tXKjfmQEGZA0pLKnU9aDQ+vQgpq X-Received: by 2002:aa7:9357:0:b029:1a5:43da:b90d with SMTP id 23-20020aa793570000b02901a543dab90dmr890923pfn.54.1610392831827; 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Mon, 11 Jan 2021 11:20:08 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:07 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 29/40] drm/amd/display/dc/dce112/dce112_resource: Make local functions and ones called by reference static Date: Mon, 11 Jan 2021 19:19:15 +0000 Message-Id: <20210111191926.3688443-30-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Anthony Koo , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:620:22: warning: no previous prototype for ‘dce112_link_encoder_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:674:32: warning: no previous prototype for ‘dce112_opp_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:689:17: warning: no previous prototype for ‘dce112_aux_engine_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:727:20: warning: no previous prototype for ‘dce112_i2c_hw_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:742:22: warning: no previous prototype for ‘dce112_clock_source_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:766:6: warning: no previous prototype for ‘dce112_clock_source_destroy’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:1027:16: warning: no previous prototype for ‘dce112_validate_global’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:1205:29: warning: no previous prototype for ‘dce112_resource_cap’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Anthony Koo Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../drm/amd/display/dc/dce112/dce112_resource.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c index f99b1c0845908..c68e576a21990 100644 --- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c @@ -617,7 +617,7 @@ static const struct encoder_feature_support link_enc_feature = { .flags.bits.IS_TPS4_CAPABLE = true }; -struct link_encoder *dce112_link_encoder_create( +static struct link_encoder *dce112_link_encoder_create( const struct encoder_init_data *enc_init_data) { struct dce110_link_encoder *enc110 = @@ -671,7 +671,7 @@ static struct input_pixel_processor *dce112_ipp_create( return &ipp->base; } -struct output_pixel_processor *dce112_opp_create( +static struct output_pixel_processor *dce112_opp_create( struct dc_context *ctx, uint32_t inst) { @@ -686,7 +686,7 @@ struct output_pixel_processor *dce112_opp_create( return &opp->base; } -struct dce_aux *dce112_aux_engine_create( +static struct dce_aux *dce112_aux_engine_create( struct dc_context *ctx, uint32_t inst) { @@ -724,7 +724,7 @@ static const struct dce_i2c_mask i2c_masks = { I2C_COMMON_MASK_SH_LIST_DCE110(_MASK) }; -struct dce_i2c_hw *dce112_i2c_hw_create( +static struct dce_i2c_hw *dce112_i2c_hw_create( struct dc_context *ctx, uint32_t inst) { @@ -739,7 +739,7 @@ struct dce_i2c_hw *dce112_i2c_hw_create( return dce_i2c_hw; } -struct clock_source *dce112_clock_source_create( +static struct clock_source *dce112_clock_source_create( struct dc_context *ctx, struct dc_bios *bios, enum clock_source_id id, @@ -763,7 +763,7 @@ struct clock_source *dce112_clock_source_create( return NULL; } -void dce112_clock_source_destroy(struct clock_source **clk_src) +static void dce112_clock_source_destroy(struct clock_source **clk_src) { kfree(TO_DCE110_CLK_SRC(*clk_src)); *clk_src = NULL; @@ -1024,7 +1024,7 @@ enum dc_status dce112_add_stream_to_ctx( return result; } -enum dc_status dce112_validate_global( +static enum dc_status dce112_validate_global( struct dc *dc, struct dc_state *context) { @@ -1202,7 +1202,7 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc) dm_pp_notify_wm_clock_changes(dc->ctx, &clk_ranges); } -const struct resource_caps *dce112_resource_cap( +static const struct resource_caps *dce112_resource_cap( struct hw_asic_id *asic_id) { if (ASIC_REV_IS_POLARIS11_M(asic_id->hw_internal_rev) || From patchwork Mon Jan 11 19:19:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360567 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3140849jai; 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Mon, 11 Jan 2021 11:20:09 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:08 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 30/40] drm/amd/display/dc/dce110/dce110_timing_generator_v: Demote kernel-doc abuse and line up comments Date: Mon, 11 Jan 2021 19:19:16 +0000 Message-Id: <20210111191926.3688443-31-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator_v.c:54: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_v_enable_crtc' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator_v.c:216: warning: Function parameter or member 'tg' not described in 'dce110_timing_generator_v_wait_for_vactive' Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../dc/dce110/dce110_timing_generator_v.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c index a13a2f58944e3..c509384fff543 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c @@ -46,17 +46,16 @@ * **********************************************************************************/ -/** -* Enable CRTCV -*/ +/* + * Enable CRTCV + */ static bool dce110_timing_generator_v_enable_crtc(struct timing_generator *tg) { /* -* Set MASTER_UPDATE_MODE to 0 -* This is needed for DRR, and also suggested to be default value by Syed. -*/ - + * Set MASTER_UPDATE_MODE to 0 + * This is needed for DRR, and also suggested to be default value by Syed. + */ uint32_t value; value = 0; @@ -209,9 +208,9 @@ static void dce110_timing_generator_v_wait_for_vblank(struct timing_generator *t } } -/** -* Wait till we are in VActive (anywhere in VActive) -*/ +/* + * Wait till we are in VActive (anywhere in VActive) + */ static void dce110_timing_generator_v_wait_for_vactive(struct timing_generator *tg) { while (dce110_timing_generator_v_is_in_vertical_blank(tg)) { From patchwork Mon Jan 11 19:19:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360568 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3140873jai; Mon, 11 Jan 2021 11:22:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJzGB/rh8SzdjluXkg1fXEZB+mYp/ZwLSE7JjFXELnMCVpmW0BoxWoBi4GCPcSfAmGUsgO39 X-Received: by 2002:a17:90a:3d4e:: with SMTP id o14mr398592pjf.44.1610392833369; Mon, 11 Jan 2021 11:20:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392833; cv=none; d=google.com; s=arc-20160816; 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Mon, 11 Jan 2021 11:20:10 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:10 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 31/40] drm/amd/display/dc/dce110/dce110_mem_input_v: Include our own header, containing prototypes Date: Mon, 11 Jan 2021 19:19:17 +0000 Message-Id: <20210111191926.3688443-32-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.c:1034:6: warning: no previous prototype for ‘dce110_mem_input_v_construct’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Lee Jones Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c index 19b1976139b69..8bbb499067f74 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c @@ -34,6 +34,7 @@ #include "inc/dce_calcs.h" #include "dce/dce_mem_input.h" +#include "dce110_mem_input_v.h" static void set_flip_control( struct dce_mem_input *mem_input110, From patchwork Mon Jan 11 19:19:18 2021 Content-Type: text/plain; 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Mon, 11 Jan 2021 11:20:11 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:11 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 32/40] drm/amd/display/dc/dce110/Makefile: Ignore -Woverride-init warning Date: Mon, 11 Jan 2021 19:19:18 +0000 Message-Id: <20210111191926.3688443-33-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:66: drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_0_sh_mask.h:5936:51: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.h:116:16: note: in expansion of macro ‘DIG_FE_CNTL__DIG_STEREOSYNC_SELECT__SHIFT’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.h:306:2: note: in expansion of macro ‘SE_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:272:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_0_sh_mask.h:5936:51: note: (near initialization for ‘se_shift.DIG_STEREOSYNC_SELECT’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.h:116:16: note: in expansion of macro ‘DIG_FE_CNTL__DIG_STEREOSYNC_SELECT__SHIFT’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.h:306:2: note: in expansion of macro ‘SE_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:272:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_0_sh_mask.h:5938:52: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.h:116:16: note: in expansion of macro ‘DIG_FE_CNTL__DIG_STEREOSYNC_GATE_EN__SHIFT’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.h:307:2: note: in expansion of macro ‘SE_SF’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:272:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_0_sh_mask.h:5938:52: note: (near initialization for ‘se_shift.DIG_STEREOSYNC_GATE_EN’) NB: Snipped for brevity Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce110/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/Makefile b/drivers/gpu/drm/amd/display/dc/dce110/Makefile index d564c0eb8b045..84ab48df0c261 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/Makefile +++ b/drivers/gpu/drm/amd/display/dc/dce110/Makefile @@ -23,6 +23,8 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. +CFLAGS_$(AMDDALPATH)/dc/dce110/dce110_resource.o = $(call cc-disable-warning, override-init) + DCE110 = dce110_timing_generator.o \ dce110_compressor.o dce110_hw_sequencer.o dce110_resource.o \ dce110_opp_regamma_v.o dce110_opp_csc_v.o dce110_timing_generator_v.o \ From patchwork Mon Jan 11 19:19:19 2021 Content-Type: text/plain; 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11:20:12 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 33/40] drm/amd/display/dc/dce110/dce110_resource: Make local functions invoked by reference static Date: Mon, 11 Jan 2021 19:19:19 +0000 Message-Id: <20210111191926.3688443-34-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Anthony Koo , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:262:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:266:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:262:15: note: (near initialization for ‘stream_enc_regs[0].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:266:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:262:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:267:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:262:15: note: (near initialization for ‘stream_enc_regs[1].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:267:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:262:15: warning: initialized field overwritten [-Woverride-init] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:268:2: note: in expansion of macro ‘stream_enc_regs’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:262:15: note: (near initialization for ‘stream_enc_regs[2].TMDS_CNTL’) drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:268:2: note: in expansion of macro ‘stream_enc_regs’ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:66: drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:272:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:272:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:272:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:272:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:276:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:276:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:276:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:276:3: note: in expansion of macro ‘SE_COMMON_MASK_SH_LIST_DCE110’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:553:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:553:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:553:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:553:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:557:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:557:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:557:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:557:3: note: in expansion of macro ‘HWSEQ_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:594:3: note: in expansion of macro ‘MI_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:594:3: note: in expansion of macro ‘MI_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:599:3: note: in expansion of macro ‘MI_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:599:3: note: in expansion of macro ‘MI_DCE11_MASK_SH_LIST’ drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:718:17: warning: no previous prototype for ‘dce110_aux_engine_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:756:20: warning: no previous prototype for ‘dce110_i2c_hw_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:771:22: warning: no previous prototype for ‘dce110_clock_source_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:795:6: warning: no previous prototype for ‘dce110_clock_source_destroy’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:1037:16: warning: no previous prototype for ‘dce110_validate_plane’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:1092:16: warning: no previous prototype for ‘dce110_validate_global’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_resource.c:1336:29: warning: no previous prototype for ‘dce110_resource_cap’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Anthony Koo Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../drm/amd/display/dc/dce110/dce110_resource.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index af208f9bd03be..73a924ed2b71e 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c @@ -715,7 +715,7 @@ static struct output_pixel_processor *dce110_opp_create( return &opp->base; } -struct dce_aux *dce110_aux_engine_create( +static struct dce_aux *dce110_aux_engine_create( struct dc_context *ctx, uint32_t inst) { @@ -753,7 +753,7 @@ static const struct dce_i2c_mask i2c_masks = { I2C_COMMON_MASK_SH_LIST_DCE110(_MASK) }; -struct dce_i2c_hw *dce110_i2c_hw_create( +static struct dce_i2c_hw *dce110_i2c_hw_create( struct dc_context *ctx, uint32_t inst) { @@ -768,7 +768,7 @@ struct dce_i2c_hw *dce110_i2c_hw_create( return dce_i2c_hw; } -struct clock_source *dce110_clock_source_create( +static struct clock_source *dce110_clock_source_create( struct dc_context *ctx, struct dc_bios *bios, enum clock_source_id id, @@ -792,7 +792,7 @@ struct clock_source *dce110_clock_source_create( return NULL; } -void dce110_clock_source_destroy(struct clock_source **clk_src) +static void dce110_clock_source_destroy(struct clock_source **clk_src) { struct dce110_clk_src *dce110_clk_src; @@ -1034,8 +1034,8 @@ static bool dce110_validate_bandwidth( return result; } -enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state, - struct dc_caps *caps) +static enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state, + struct dc_caps *caps) { if (((plane_state->dst_rect.width * 2) < plane_state->src_rect.width) || ((plane_state->dst_rect.height * 2) < plane_state->src_rect.height)) @@ -1089,7 +1089,7 @@ static bool dce110_validate_surface_sets( return true; } -enum dc_status dce110_validate_global( +static enum dc_status dce110_validate_global( struct dc *dc, struct dc_state *context) { @@ -1333,7 +1333,7 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc) 1000); } -const struct resource_caps *dce110_resource_cap( +static const struct resource_caps *dce110_resource_cap( struct hw_asic_id *asic_id) { if (ASIC_REV_IS_STONEY(asic_id->hw_internal_rev)) From patchwork Mon Jan 11 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Mon, 11 Jan 2021 11:20:14 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:13 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 34/40] drm/amd/display/dc/dce110/dce110_transform_v: Demote kernel-doc abuse Date: Mon, 11 Jan 2021 19:19:20 +0000 Message-Id: <20210111191926.3688443-35-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_transform_v.c:228: warning: bad line: void drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_transform_v.c:233: warning: Function parameter or member 'xfm_dce' not described in 'program_overscan' drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_transform_v.c:233: warning: Function parameter or member 'data' not described in 'program_overscan' Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../display/dc/dce110/dce110_transform_v.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c index b1aaab5590cc6..29438c6050dbb 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c @@ -217,16 +217,15 @@ static bool setup_scaling_configuration( return is_scaling_needed; } -/** -* Function: -* void program_overscan -* -* Purpose: Programs overscan border -* Input: overscan -* -* Output: - void -*/ +/* + * Function: + * void program_overscan + * + * Purpose: Programs overscan border + * Input: overscan + * + * Output: void + */ static void program_overscan( struct dce_transform *xfm_dce, const struct scaler_data *data) From patchwork Mon Jan 11 19:19:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360574 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3141194jai; Mon, 11 Jan 2021 11:22:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJzg3+jkPgEzJ5kmhfbgpsq1wuOzd0MaEd3yusmAAJ8VU/0zjTgJm0s6emG3G6rM6xle6LSN X-Received: by 2002:a17:902:9341:b029:dc:102f:c36c with SMTP id g1-20020a1709029341b02900dc102fc36cmr1208343plp.61.1610392838455; Mon, 11 Jan 2021 11:20:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392838; cv=none; d=google.com; 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Mon, 11 Jan 2021 11:20:16 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:15 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 35/40] drm/amd/display/dc/dce60/dce60_timing_generator: Make 'dce60_configure_crc' invoked by reference static Date: Mon, 11 Jan 2021 19:19:21 +0000 Message-Id: <20210111191926.3688443-36-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Mauro Rossi , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_timing_generator.c:192:6: warning: no previous prototype for ‘dce60_configure_crc’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Mauro Rossi Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c index fc1af0ff0ca4c..c1a85ee374d9d 100644 --- a/drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c @@ -189,8 +189,8 @@ static bool dce60_is_tg_enabled(struct timing_generator *tg) return field == 1; } -bool dce60_configure_crc(struct timing_generator *tg, - const struct crc_params *params) +static bool dce60_configure_crc(struct timing_generator *tg, + const struct crc_params *params) { /* Cannot configure crc on a CRTC that is disabled */ if (!dce60_is_tg_enabled(tg)) From patchwork Mon Jan 11 19:19:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360570 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3141065jai; Mon, 11 Jan 2021 11:22:18 -0800 (PST) X-Google-Smtp-Source: ABdhPJxLWqAEE/22GB0mF7G/Rs8alWAbbdDjTKUjTvOd4W4uG6Dahlo7n7GXDEuqf1orGdgRkLhW X-Received: by 2002:a17:90a:f00f:: with SMTP id bt15mr339596pjb.209.1610392837041; Mon, 11 Jan 2021 11:20:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392837; cv=none; d=google.com; s=arc-20160816; b=mKDTnm83TFUNQXq/IP3i1WIfbUUv/kfgTELEFN+mRMqf/ncZApyYpVVw7vDpnsIsy/ lEtT9bRrzAN3KXfw4VQ3TjCdU3P50UEFSvc9272Iyqw5SxFFr+BZYdq+61xhXPp8jzrW mBi1V/GcaROblWUzzU3d8PA7xVQ1KqemE6sK1KNFitJPPZTLCblzrSEQk9ZJal7j1drO BRkywSD7oLtQfHG6A0QBLZ/U1eEUYzi0gU8n6fb7LNYWsz0Gzm/g0Np61X6xpv1XAPoy BJwb1XryZDJUYPx3NvMSiS2iLMDK3RvoT3E/dygifVWg7FmAymSKeVBaKU/7Xrzqyh6l jkxA== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:20:19 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:19 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 38/40] drm/amd/display/dc/dce80/dce80_resource: Make local functions static Date: Mon, 11 Jan 2021 19:19:24 +0000 Message-Id: <20210111191926.3688443-39-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Anthony Koo , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:527:17: warning: no previous prototype for ‘dce80_aux_engine_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:565:20: warning: no previous prototype for ‘dce80_i2c_hw_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:581:20: warning: no previous prototype for ‘dce80_i2c_sw_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:715:22: warning: no previous prototype for ‘dce80_link_encoder_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:754:22: warning: no previous prototype for ‘dce80_clock_source_create’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:778:6: warning: no previous prototype for ‘dce80_clock_source_destroy’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:868:6: warning: no previous prototype for ‘dce80_validate_bandwidth’ [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:913:16: warning: no previous prototype for ‘dce80_validate_global’ [-Wmissing-prototypes] Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Anthony Koo Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- .../drm/amd/display/dc/dce80/dce80_resource.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c index 26fe25caa2813..fe5d716084363 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c @@ -524,7 +524,7 @@ static struct output_pixel_processor *dce80_opp_create( return &opp->base; } -struct dce_aux *dce80_aux_engine_create( +static struct dce_aux *dce80_aux_engine_create( struct dc_context *ctx, uint32_t inst) { @@ -562,7 +562,7 @@ static const struct dce_i2c_mask i2c_masks = { I2C_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(_MASK) }; -struct dce_i2c_hw *dce80_i2c_hw_create( +static struct dce_i2c_hw *dce80_i2c_hw_create( struct dc_context *ctx, uint32_t inst) { @@ -578,7 +578,7 @@ struct dce_i2c_hw *dce80_i2c_hw_create( return dce_i2c_hw; } -struct dce_i2c_sw *dce80_i2c_sw_create( +static struct dce_i2c_sw *dce80_i2c_sw_create( struct dc_context *ctx) { struct dce_i2c_sw *dce_i2c_sw = @@ -712,7 +712,7 @@ static const struct encoder_feature_support link_enc_feature = { .flags.bits.IS_TPS3_CAPABLE = true }; -struct link_encoder *dce80_link_encoder_create( +static struct link_encoder *dce80_link_encoder_create( const struct encoder_init_data *enc_init_data) { struct dce110_link_encoder *enc110 = @@ -751,7 +751,7 @@ static struct panel_cntl *dce80_panel_cntl_create(const struct panel_cntl_init_d return &panel_cntl->base; } -struct clock_source *dce80_clock_source_create( +static struct clock_source *dce80_clock_source_create( struct dc_context *ctx, struct dc_bios *bios, enum clock_source_id id, @@ -775,7 +775,7 @@ struct clock_source *dce80_clock_source_create( return NULL; } -void dce80_clock_source_destroy(struct clock_source **clk_src) +static void dce80_clock_source_destroy(struct clock_source **clk_src) { kfree(TO_DCE110_CLK_SRC(*clk_src)); *clk_src = NULL; @@ -865,7 +865,7 @@ static void dce80_resource_destruct(struct dce110_resource_pool *pool) } } -bool dce80_validate_bandwidth( +static bool dce80_validate_bandwidth( struct dc *dc, struct dc_state *context, bool fast_validate) @@ -910,7 +910,7 @@ static bool dce80_validate_surface_sets( return true; } -enum dc_status dce80_validate_global( +static enum dc_status dce80_validate_global( struct dc *dc, struct dc_state *context) { From patchwork Mon Jan 11 19:19:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360576 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3141272jai; 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Mon, 11 Jan 2021 11:20:21 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:20 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 39/40] drm/amd/display/dc/core/dc_surface: Demote kernel-doc abuse Date: Mon, 11 Jan 2021 19:19:25 +0000 Message-Id: <20210111191926.3688443-40-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , Josip Pavic , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , Aurabindo Pillai , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6?= =?utf-8?q?nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_surface.c:119: warning: Cannot understand ***************************************************************************** Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Aurabindo Pillai Cc: Josip Pavic Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/core/dc_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c index 3d7d27435f15e..e6b9c6a718413 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c @@ -115,7 +115,7 @@ struct dc_plane_state *dc_create_plane_state(struct dc *dc) return plane_state; } -/** +/* ***************************************************************************** * Function: dc_plane_get_status * From patchwork Mon Jan 11 19:19:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 360566 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3140051jai; Mon, 11 Jan 2021 11:20:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJw0eBh6nOXGF3s6Wi2Mng+8KZrj/tgJT82CSbS2BJ5VEXzAw0Z3Wvh/tqrVyRPZoxfskdin X-Received: by 2002:a62:ab10:0:b029:1ae:68de:f003 with SMTP id p16-20020a62ab100000b02901ae68def003mr1089321pff.56.1610392846177; Mon, 11 Jan 2021 11:20:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610392846; cv=none; d=google.com; s=arc-20160816; b=0rApRj+XV5vr4zzKeR2mBw+fw/GzwQPJP8tFbLWTSW+l3GGgj5KkgrRgAgqSOInzFU 6W/Maj7HKZotMDpgPwIBBI7Q+X4XrBjnO9PMSeHDecQ0oOgHRoxOPx8Ytpv6tNIHBgTR CL9vt9KSAlT2WfN1RQEEeXB5TIVeS5tmUoRluXrZUBROpUx/kTcaFm2iv8uXc3nc9L/K /UnAfIAz93R8evmdM+PuIC+/bCWUraIlGa44/mrvOAF7jrCE3Ad8Lgy1kOgTurKe3fRp 5gkV8gMlUUvDMoo/dMwh2Qv3eMFccAKFM2DpBFq5iiQFYrqHKVD4SzgGJ++ybnan6EU2 YkLw== ARC-Message-Signature: i=1; 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Mon, 11 Jan 2021 11:20:22 -0800 (PST) Received: from dell.default ([91.110.221.229]) by smtp.gmail.com with ESMTPSA id n3sm778090wrw.61.2021.01.11.11.20.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 11:20:21 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 40/40] drm/amd/display/dc/core/dc_stream: Demote non-conformant kernel-doc headers Date: Mon, 11 Jan 2021 19:19:26 +0000 Message-Id: <20210111191926.3688443-41-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111191926.3688443-1-lee.jones@linaro.org> References: <20210111191926.3688443-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Li , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, David Airlie , dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c:253: warning: Function parameter or member 'pStream' not described in 'dc_optimize_timing_for_fsft' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c:253: warning: Function parameter or member 'max_input_rate_in_khz' not described in 'dc_optimize_timing_for_fsft' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c:270: warning: Function parameter or member 'stream' not described in 'dc_stream_set_cursor_attributes' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c:270: warning: Function parameter or member 'attributes' not described in 'dc_stream_set_cursor_attributes' Cc: Harry Wentland Cc: Leo Li Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index c103f858375d0..25fa712a78474 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -244,7 +244,7 @@ struct dc_stream_status *dc_stream_get_status( } #ifndef TRIM_FSFT -/** +/* * dc_optimize_timing_for_fsft() - dc to optimize timing */ bool dc_optimize_timing_for_fsft( @@ -260,8 +260,7 @@ bool dc_optimize_timing_for_fsft( } #endif - -/** +/* * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address */ bool dc_stream_set_cursor_attributes(