From patchwork Fri Jan 8 01:51:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 358923 Delivered-To: patches@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp133761jai; Thu, 7 Jan 2021 17:51:22 -0800 (PST) X-Received: by 2002:a62:2bd4:0:b029:1ae:4d9f:60da with SMTP id r203-20020a622bd40000b02901ae4d9f60damr1421903pfr.20.1610070682610; Thu, 07 Jan 2021 17:51:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610070682; cv=none; d=google.com; s=arc-20160816; b=jWnqavQhpqyqDPqQo5yilXhES7xivPgGUdZUG8HNy25kTDibpdzv25fuQb0T9hL/+k R0MwIel0blOpI8q7Ois+zjgtUJVmPPqwk43sbdwe/JhSdaeRbuKnb2eq/Qs2YM0lhjgs jQtPGXqvski/aVsRw1f9j2zsDZWKHpqwOmbkGzbsum86AuQ8wPInibli340HTe2kJSuo 3Sc+Ps/HcDHR/NG9lx+7YqcRavRtQ7KL6I+ouEBywD2Q3wq7vu0dEuVm7LMQbhzmmtg/ Bg3b9K6YgWeN2tB5Wp5jQzO+Dl+9EbilCrDeQ7Ua4IB5TAzMNCQJ9CGx6XxaN5fryjB1 RUoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:dkim-signature; bh=/9yRUK3ifPn4jWkGqxydFEM9X/uNu0aPyF+TlRNBzFw=; b=D1ogTFfp3P4onyMuBcSxHT/RqmyPLJFaUYqwtCtr0xM/DSz9P4gfARQ9x2jQEo4hI6 WmpEsFlCI+DkFSYgyjLJUKNn1CgzUho6x4rOqdrg3WRvADoNxza1dLF8w82aW+fX7Myo Jl0edOnSPaEYzGpdsR0O991xkjSpTUF17ZDYrq85WejgJ2kPQZdEyyq1LAHktL5YxLS9 cE5Ff3wUdXyinZwzHDDa4S2unX3ugcMB9u6q3/Bl+fJM9SDGZN5A0yA4Gbm8M2OrWVDZ f3UXq9t7/RB5px8K9bECAxm0gUfabcXlBVLtvlIooA0zuGKtXy0zCTZy/JxeAz/4azoD YHDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qaEUGAlh; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.41 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id y196sor3542580pfc.55.2021.01.07.17.51.22 for (Google Transport Security); Thu, 07 Jan 2021 17:51:22 -0800 (PST) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qaEUGAlh; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.41 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=/9yRUK3ifPn4jWkGqxydFEM9X/uNu0aPyF+TlRNBzFw=; b=qaEUGAlhSBJJz0k547jBxG2kJxrjPzoD7C87YteZVKHStDtMmN+mdXS7ljLfYPMX8D bSfj32/jzcvyHmod0BtAVPfUIQR7Jz5xH9mvv+Uizi9FK6+zV0hPsVt96gGUcmc4FtJZ /TQB7biXj6E5+tSYoP6WPTU/pAqBQSjUZob4Ciy2Jy6lqvV5fPH0DrlRVs0g5sX4ZcJS qS0XxVbe9MD2W35BDeRfnD3FiWiGGS65C4IOpt1HOhfxDWL+RE/ONCaxy0oXkSV6ce5G ThoJmGcKGaO4Ygo8wBftsDtjGcCi2RnUSxD6GTPHOcEa+LGu2V/mPoyK7Sfo7jvK/1hB IRFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=/9yRUK3ifPn4jWkGqxydFEM9X/uNu0aPyF+TlRNBzFw=; b=VtJDJWfWYZ2WZvkCarb9kksn+FTPsPUtduvQwEpJ5r3gEUGi27OdKjrox1MqFsSII1 IoCKm7yDhQOvcAAj5rjjWNlm51BQKDjerTIt1wGXbMJRozGUAjZWKsuqlRpDh3h9bRTV 9g9OP+VJbo4gZuzVdVcA55F9n0XspUj4bY/Gjaok0uZf1nD1m+c5z5FBLWuRA05jrhLE EaQsmTUzrhgU0DRaUvPodGLxO/t6xIBatgjiNI8Ut0g01SAwD4uWjqv9TdjeJxOKq9CB 6fA+C9YMBZf5wq1Rlt+1zMue88723nf8ZCjBd98J3w4m58EKqG4uxTMW4UjEQzAF208Y dlJg== X-Gm-Message-State: AOAM5302aPPKvodM/FnLJBiFYqvq2aqDjMlTvJsu5rEppMnCZgtZsBW8 gX2qxM0Vg7iC9MqAWNuXRUyOjVKi X-Google-Smtp-Source: ABdhPJyreAjnxcrKczefp93YqgxrjjRc2/Fen+5GwEWM9pqajXC5EAzflLZ2kqmzioOVLu7KUBwrBw== X-Received: by 2002:a62:5844:0:b029:1a8:b9dc:77bf with SMTP id m65-20020a6258440000b02901a8b9dc77bfmr1422210pfb.39.1610070682061; Thu, 07 Jan 2021 17:51:22 -0800 (PST) Return-Path: Received: from localhost.localdomain ([2601:1c2:680:1319:692:26ff:feda:3a81]) by smtp.gmail.com with ESMTPSA id fw12sm6142756pjb.43.2021.01.07.17.51.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 17:51:20 -0800 (PST) From: John Stultz To: lkml Cc: Yu Chen , Felipe Balbi , Tejas Joglekar , Yang Fei , YongQin Liu , Andrzej Pietrasiewicz , Thinh Nguyen , Jun Li , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-usb@vger.kernel.org, John Stultz Subject: [PATCH v3 1/2] usb: dwc3: Trigger a GCTL soft reset when switching modes in DRD Date: Fri, 8 Jan 2021 01:51:14 +0000 Message-Id: <20210108015115.27920-1-john.stultz@linaro.org> X-Mailer: git-send-email 2.17.1 From: Yu Chen Just resending this, as discussion died out a bit and I'm not sure how to make further progress. See here for debug data that was requested last time around: https://lore.kernel.org/lkml/CALAqxLXdnaUfJKx0aN9xWwtfWVjMWigPpy2aqsNj56yvnbU80g@mail.gmail.com/ With the current dwc3 code on the HiKey960 we often see the COREIDLE flag get stuck off in __dwc3_gadget_start(), which seems to prevent the reset irq and causes the USB gadget to fail to initialize. We had seen occasional initialization failures with older kernels but with recent 5.x era kernels it seemed to be becoming much more common, so I dug back through some older trees and realized I dropped this quirk from Yu Chen during upstreaming as I couldn't provide a proper rational for it and it didn't seem to be necessary. I now realize I was wrong. After resubmitting the quirk, Thinh Nguyen pointed out that it shouldn't be a quirk at all and it is actually mentioned in the programming guide that it should be done when switching modes in DRD. So, to avoid these !COREIDLE lockups seen on HiKey960, this patch issues GCTL soft reset when switching modes if the controller is in DRD mode. Cc: Felipe Balbi Cc: Tejas Joglekar Cc: Yang Fei Cc: YongQin Liu Cc: Andrzej Pietrasiewicz Cc: Thinh Nguyen Cc: Jun Li Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org Signed-off-by: Yu Chen Signed-off-by: John Stultz --- v2: * Rework to always call the GCTL soft reset in DRD mode, rather then using a quirk as suggested by Thinh Nguyen v3: * Move GCTL soft reset under the spinlock as suggested by Thinh Nguyen --- drivers/usb/dwc3/core.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.17.1 diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 841daec70b6e..b6a6b90eb2d5 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -114,10 +114,24 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) dwc->current_dr_role = mode; } +static void dwc3_gctl_core_soft_reset(struct dwc3 *dwc) +{ + int reg; + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg |= (DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~(DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); +} + static void __dwc3_set_mode(struct work_struct *work) { struct dwc3 *dwc = work_to_dwc(work); unsigned long flags; + int hw_mode; int ret; u32 reg; @@ -156,6 +170,11 @@ static void __dwc3_set_mode(struct work_struct *work) spin_lock_irqsave(&dwc->lock, flags); + /* Execute a GCTL Core Soft Reset when switch mode in DRD*/ + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); + if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD) + dwc3_gctl_core_soft_reset(dwc); + dwc3_set_prtcap(dwc, dwc->desired_dr_role); spin_unlock_irqrestore(&dwc->lock, flags); From patchwork Fri Jan 8 01:51:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 358924 Delivered-To: patches@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp133779jai; Thu, 7 Jan 2021 17:51:24 -0800 (PST) X-Received: by 2002:a17:90b:ece:: with SMTP id gz14mr1345522pjb.158.1610070684057; Thu, 07 Jan 2021 17:51:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610070684; cv=none; d=google.com; s=arc-20160816; b=aBMPohH/MJD+PWIRPPokCreIavJxQc7rBoZlReVy+PNYoOysgUQrOwuDqq9CMmoEpo 9pPNDipxfu2b14E411UMFSpngKL4NN4JdvR9V1k/W6Qf0L4tFnxwC/PkwM19PP/RgPG1 I9Wdn6YVu9qA+iiOMb3e5YQ2nkG4pACes8rO6fDw5UGL9Fhn2bF9s1ZBxVVfns/rvQ7y B4ckQLK0pJNEYUY9uOWmdW33tkJxiLnm77Wt+CgoYLrNQe6Q4Rohst9mOXuA+UiDlp/6 ea9KbEx39F5ixc//6e7vx2oKgXJf1B0B7lfz0mAzDMXaQP7ec7pUX3plfov8x6Ywus2s qbrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eaHrQpKpeurHZv+OYTMBBGGPpB4FZE1mWJW48Z/oiNs=; b=UQgKAZqyRX4kTc4bDhEL8/8rz7xGtkO2HWyD7sqxrRXLaWZfPh1ARdB7XawyJyN/e6 Z9Lde8Z9SFcon+X2tlP8+/PEPBLrYSuQCPgJI4C9bO5Gk/LDb2XQKi3MOrPMsDHHhoQD BFNv3mSDgfhOdpNNCqYCJL+fb+wZTzwRXY5JBDB0azSPoLX6AOMErGTL+5Xi61GDRQO9 pu5JMy+esqykBZT4vqzFiww4XnFPhB1Q+9WgcMJ9nItXo3Y4uSI9dorEj2465DQ9CyJ2 y5fmQdxayxHEX7K+ZsPTlCNmLi1r0GqBVyCNyOVYuQPNmxbgfVe5GKJC5RltXZ+uA4aC wHPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AP8eKNDX; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.41 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id z11sor4043229pga.41.2021.01.07.17.51.23 for (Google Transport Security); Thu, 07 Jan 2021 17:51:24 -0800 (PST) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AP8eKNDX; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.41 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eaHrQpKpeurHZv+OYTMBBGGPpB4FZE1mWJW48Z/oiNs=; b=AP8eKNDXK+f3yABttnermAH/48jx7jQD5O+GUTNSbdHW4WUqvESmttKvccFPZgp9Sz A/YcciJTOSsQ6+nNIXjhfmrvn0z5OHXeNczZZtuJ9rOh7lSh2pqKfx1H2QasQsPXu2uW b1XW6ubHyF2oGGSxPTrqhF2hOxNrVgHdoUz0tmPRsD9X+RpmSPMkEOi+kpNicXxGr+Uh dly3HIYPB8GjbhlHvWkUJleD9z8FLiohhDzF1EsJjM3RLPjrtmilqEhb2JCvPpLx5+jP zvTUmqdeh6WWeEkQNyu6ssL4OkK/K2O/JsOZIJZzTcpa872nVlRHmbZtZOl5GIBDIbrq 36WA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eaHrQpKpeurHZv+OYTMBBGGPpB4FZE1mWJW48Z/oiNs=; b=LF3t3LIqvk4KjspY1xqI1ZBd7fLwZ0Xb217vHFoh6kQuaCbucOtYlLTsyl6+sKNSVp 2WshN3fDrC6dgYAHTOpUazgF0U7BmoUgufkS4YGikN6Cm93p14D9UywuABO4TLPO+fZO vB63vFLAQS/yYB4TiTVGbHgdNU2yn0w/DX14qdE42MsIjot6viL7MZ7xLhcKk9kgJ44w qvINVXwgKJvxyEpK53zwLGKIlAygjPCr9DF4xW39NJmW1xhLsZzg0b+g26LkwsJcxgMt Arvb0GYHfacTBHryF+ug6uvC4LV8M5lX4syM+R8ENSOvsK6DsbFOqzsqgLP4o+YGFdGU VQUw== X-Gm-Message-State: AOAM53168lz0NFi8HGchl8YVNE1UIriIOKSUDKGK9XCK0wvYxAlFYW2w lZlWQmsWDEy95Sh60qHe2LN+PLDpwDqV+RcF X-Google-Smtp-Source: ABdhPJxSbJhBpM2A0dR5cqQKxAWgztVnTaKnRROtWkb337/i7shPcaEJlVeBtCPmt827WMdg7g/VlA== X-Received: by 2002:a63:1261:: with SMTP id 33mr4538228pgs.213.1610070683769; Thu, 07 Jan 2021 17:51:23 -0800 (PST) Return-Path: Received: from localhost.localdomain ([2601:1c2:680:1319:692:26ff:feda:3a81]) by smtp.gmail.com with ESMTPSA id fw12sm6142756pjb.43.2021.01.07.17.51.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 17:51:22 -0800 (PST) From: John Stultz To: lkml Cc: John Stultz , Felipe Balbi , Tejas Joglekar , Yang Fei , YongQin Liu , Andrzej Pietrasiewicz , Thinh Nguyen , Jun Li , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-usb@vger.kernel.org Subject: [PATCH v3 2/2] usb: dwc3: Fix DRD mode change sequence following programming guide Date: Fri, 8 Jan 2021 01:51:15 +0000 Message-Id: <20210108015115.27920-2-john.stultz@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210108015115.27920-1-john.stultz@linaro.org> References: <20210108015115.27920-1-john.stultz@linaro.org> In reviewing the previous patch, Thinh Nguyen pointed out that the DRD mode change sequence should be like the following when switching from host -> device according to the programming guide (for all DRD IPs): 1. Reset controller with GCTL.CoreSoftReset 2. Set GCTL.PrtCapDir(device) 3. Soft reset with DCTL.CSftRst 4. Then follow up with the initializing registers sequence The current code does: a. Soft reset with DCTL.CSftRst on driver probe b. Reset controller with GCTL.CoreSoftReset (added in previous patch) c. Set GCTL.PrtCapDir(device) d. < missing DCTL.CSftRst > e. Then follow up with initializing registers sequence So this patch adds the DCTL.CSftRst soft reset that was currently missing from the dwc3 mode switching. Cc: Felipe Balbi Cc: Tejas Joglekar Cc: Yang Fei Cc: YongQin Liu Cc: Andrzej Pietrasiewicz Cc: Thinh Nguyen Cc: Jun Li Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org Signed-off-by: John Stultz --- Feedback would be appreciated. I'm a little worried I should be conditionalizing the DCTL.CSftRst on DRD mode controllers, but I'm really not sure what the right thing to do is for non-DRD mode controllers. --- drivers/usb/dwc3/core.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index b6a6b90eb2d5..71f8b07ecb99 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -40,6 +40,8 @@ #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ +static int dwc3_core_soft_reset(struct dwc3 *dwc); + /** * dwc3_get_dr_mode - Validates and sets dr_mode * @dwc: pointer to our context structure @@ -177,6 +179,7 @@ static void __dwc3_set_mode(struct work_struct *work) dwc3_set_prtcap(dwc, dwc->desired_dr_role); + dwc3_core_soft_reset(dwc); spin_unlock_irqrestore(&dwc->lock, flags); switch (dwc->desired_dr_role) {