From patchwork Thu Feb 15 13:26:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 128424 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1749179ljc; Thu, 15 Feb 2018 05:28:46 -0800 (PST) X-Google-Smtp-Source: AH8x225idipz+Ojfias9ZaSF2B6XMzjC0tkMNWny9Fh63fSMdZoDftFH2BEaleLjrRmlIfoZ/pTn X-Received: by 10.98.198.143 with SMTP id x15mr2675067pfk.22.1518701326100; Thu, 15 Feb 2018 05:28:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518701326; cv=none; d=google.com; s=arc-20160816; b=n9xFwjrqwJEtqufR7CbJGQUn5xweP8aY1ruvqAEawh92AXhSVeEqE8Dm8Z241HMzXe M9tbWO0qlZnqXZxIamUl8j7WrSDvSrj1PBNAxNIXDXK/xcbsORYNkYOLZ8Rj/SpQ2fgf PEgkjPOokcIdoHCzHrx3CjvHNwXEfRNe4HhfAV+m5ZS/xgBFv+TXXqkzm+tldG8uAu/D BiDgKsf9DHVpSvfwKU1YwbiltlVnRGJge0QuriKi0qGGiUch6CFv414FcxR27x3v3CgS QfqY1iNNrnMx38Nvosv9jS8wyaBWMEB8ukWf+Y3sle2U4ax2vtIC36yAUUut2QkONGqp sZiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=i1Y4vtfZM5jaZ4yjiGsuONjRfDTzmx9G7X5YNc5zYz4=; b=gjHLaJTwXEEWYN4CB9NAPxifeJGXMk6fQxHWGeaj+3TGErnJsdTatdlTITU5GP1sX2 vK1AafPWEPFCSN6o+Z1JmqnYU9ixqQ78YhqMPLfz2tc164UAi6g0225P0BILlqbhPPTy mUrG6XmUJ6Dc38ofGmowcJ1gYWCQXm3iGc6/s9asHdvvAAhGz1vmc2MrtEj9tuHimGvo R0dU6zyawtYZsyjDDZ/e15LfAPotOWAsfjWUGF9hmVgKXcljTGPurlreWPjd29Zpf+/y fFZsbQI+O4/jHTWqqdx1dL3KhoYhn/5/EuxzwZYJq0x+YtAnZbAVsJhLkN4hGDFPzCbf w1Jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=f5Gbgq1X; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g5-v6si3013475pll.488.2018.02.15.05.28.45; Thu, 15 Feb 2018 05:28:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=f5Gbgq1X; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032208AbeBON2p (ORCPT + 6 others); Thu, 15 Feb 2018 08:28:45 -0500 Received: from mail-wr0-f196.google.com ([209.85.128.196]:37891 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030561AbeBON2n (ORCPT ); Thu, 15 Feb 2018 08:28:43 -0500 Received: by mail-wr0-f196.google.com with SMTP id n7so3351996wrn.5 for ; Thu, 15 Feb 2018 05:28:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Q4HY/K8/raa7bklFFefWoIy4lO2enmK/0bKLh36GlOg=; b=f5Gbgq1X49TzM4isLvcXbTCZatNMyLwySyTVa+CnGIxCyesO2hLsXDHd0O4cWd9xhv sA3WRw309F+4R140jU2f8Fp2Vn0LXBB4ODHdA+zVlwzi8OnW9ldbmdcYpYLsvBOFx275 saUOkcT+D7n13PMEngqzsTqWwIeoP3A6nhwkU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Q4HY/K8/raa7bklFFefWoIy4lO2enmK/0bKLh36GlOg=; b=PUv3G27yShzzd30k1srHIFL6TLWjCfRDzw4S/upCnpWzYNlxP9oof7uu+rczZUdo/C OD3HFgTvsXmhIlojpF9Kdz+V0VyAh2z2FsSPSIqKn7W+OCmEpV7fm0ysDZVm/lPIYfrM RsBm7KTEj0M2AGZ0l7a8evZ4vXYK5kvTULgI6diFZg+Owsybq+I9ZCI+nw3qv5G1DeET Bg20YfuMCQ+a0MoYi9O//myRvp5SHh0QtSsQLuyPi3yB48+TEK3p0zDP0+DZQe/7n+rs Kzkr+A/jqYO+kDfjLFvLKxIt6VCDXwa5OVQNqYtBdsjTsDOhd+17qzsW/4km5MJw2YJM PG/A== X-Gm-Message-State: APf1xPBuW1DUnisoK3UmzhMvkEIYNEXpLT/uF5ignybNunhSy2/BlVLS JoJPs+WeRjVn34AmIx04NwCeyA== X-Received: by 10.223.183.39 with SMTP id l39mr2712881wre.214.1518701322458; Thu, 15 Feb 2018 05:28:42 -0800 (PST) Received: from localhost.localdomain (cpc90716-aztw32-2-0-cust92.18-1.cable.virginm.net. [86.26.100.93]) by smtp.gmail.com with ESMTPSA id v20sm14687252wrd.32.2018.02.15.05.28.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 Feb 2018 05:28:41 -0800 (PST) From: srinivas.kandagatla@linaro.org To: stanimir.varbanov@linaro.org, svarbanov@mm-sol.com, linux-pci@vger.kernel.org, bhelgaas@google.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2] PCI: qcom: use regulator bulk api for apq8064 supplies Date: Thu, 15 Feb 2018 13:26:37 +0000 Message-Id: <20180215132637.5673-1-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.15.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Srinivas Kandagatla This patch converts existing regulators to use regulator bulk apis, to make it consistent with msm8996 changes also cut down some redundant code. Signed-off-by: Srinivas Kandagatla --- Changes since v1: updated index correctly and use ARRAY_SIZE drivers/pci/dwc/pcie-qcom.c | 52 +++++++++++++-------------------------------- 1 file changed, 15 insertions(+), 37 deletions(-) -- 2.15.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Stanimir Varbanov diff --git a/drivers/pci/dwc/pcie-qcom.c b/drivers/pci/dwc/pcie-qcom.c index e3f20e09a18d..50ff9b879c27 100644 --- a/drivers/pci/dwc/pcie-qcom.c +++ b/drivers/pci/dwc/pcie-qcom.c @@ -79,6 +79,7 @@ #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358 #define SLV_ADDR_SPACE_SZ 0x10000000 +#define QCOM_PCIE_2_1_0_MAX_SUPPLY 3 struct qcom_pcie_resources_2_1_0 { struct clk *iface_clk; struct clk *core_clk; @@ -88,9 +89,7 @@ struct qcom_pcie_resources_2_1_0 { struct reset_control *ahb_reset; struct reset_control *por_reset; struct reset_control *phy_reset; - struct regulator *vdda; - struct regulator *vdda_phy; - struct regulator *vdda_refclk; + struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY]; }; struct qcom_pcie_resources_1_0_0 { @@ -218,18 +217,15 @@ static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; + int ret; - res->vdda = devm_regulator_get(dev, "vdda"); - if (IS_ERR(res->vdda)) - return PTR_ERR(res->vdda); - - res->vdda_phy = devm_regulator_get(dev, "vdda_phy"); - if (IS_ERR(res->vdda_phy)) - return PTR_ERR(res->vdda_phy); - - res->vdda_refclk = devm_regulator_get(dev, "vdda_refclk"); - if (IS_ERR(res->vdda_refclk)) - return PTR_ERR(res->vdda_refclk); + res->supplies[0].supply = "vdda"; + res->supplies[1].supply = "vdda_phy"; + res->supplies[2].supply = "vdda_refclk"; + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(res->supplies), + res->supplies); + if (ret) + return ret; res->iface_clk = devm_clk_get(dev, "iface"); if (IS_ERR(res->iface_clk)) @@ -275,9 +271,7 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie) clk_disable_unprepare(res->iface_clk); clk_disable_unprepare(res->core_clk); clk_disable_unprepare(res->phy_clk); - regulator_disable(res->vdda); - regulator_disable(res->vdda_phy); - regulator_disable(res->vdda_refclk); + regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); } static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) @@ -288,24 +282,12 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) u32 val; int ret; - ret = regulator_enable(res->vdda); - if (ret) { - dev_err(dev, "cannot enable vdda regulator\n"); + ret = regulator_bulk_enable(ARRAY_SIZE(res->supplies), res->supplies); + if (ret < 0) { + dev_err(dev, "cannot enable regulators\n"); return ret; } - ret = regulator_enable(res->vdda_refclk); - if (ret) { - dev_err(dev, "cannot enable vdda_refclk regulator\n"); - goto err_refclk; - } - - ret = regulator_enable(res->vdda_phy); - if (ret) { - dev_err(dev, "cannot enable vdda_phy regulator\n"); - goto err_vdda_phy; - } - ret = reset_control_assert(res->ahb_reset); if (ret) { dev_err(dev, "cannot assert ahb reset\n"); @@ -389,11 +371,7 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) err_clk_phy: clk_disable_unprepare(res->iface_clk); err_assert_ahb: - regulator_disable(res->vdda_phy); -err_vdda_phy: - regulator_disable(res->vdda_refclk); -err_refclk: - regulator_disable(res->vdda); + regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies); return ret; }