From patchwork Wed Dec 30 15:51:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 355324 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D80DC433DB for ; Wed, 30 Dec 2020 15:52:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5422320575 for ; Wed, 30 Dec 2020 15:52:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726552AbgL3PwX (ORCPT ); Wed, 30 Dec 2020 10:52:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726420AbgL3PwX (ORCPT ); Wed, 30 Dec 2020 10:52:23 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEC3EC06179B; Wed, 30 Dec 2020 07:51:42 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id lt17so22391855ejb.3; Wed, 30 Dec 2020 07:51:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kXDPufsV/CJlhPK091V+/kgxs0loRtpY8e0jDMSC9UU=; b=U9fVpPIwoEg5IMxL7DQjkJxhIbf7p13gmiST+pWTqUE379YZJA93O6agfMpYqoCFMs QqSwthaLzb06et0jj4mXT0rMIO+MWoue5IqCSJbC7KiNtLckt3la+KWVfLQ+m+UAHgGb ZJk3xncARWvGSBNWh4yvYf7/1pX0rIZLcny4KMtHcEQtgN+XdIrSkTOBDW9wGyYDipUM 3ZeVvQoyx1rr3opPS+DuUhT/2pkc/pu4Fa8wxEccXiexOAvnlmVfIKl+gOEYqHX2LhEV 0f60P//6bJBBS2NLBPlM2uq4ZPDDh0DmfdFzIuFUB7gLfF+HQ8GDLUWysssKA/BHlKqU eH3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kXDPufsV/CJlhPK091V+/kgxs0loRtpY8e0jDMSC9UU=; b=a5jeeAZWkccv3dezlHWgsU5uAEhWI9Vg7kf9Kl6fHzixpFKoIEbOghPzzQDwcuRQOy kYD+vDSzlnfofxmSrXnCKcpeB9ZlSZAj5qgobbAsZxZcZAQUXbTbugPWEPwuvN+IncHq tsz5G5Hs2/PojfvNeYUHR4xoWj9TaIQofvfGDEDWWS2o+tcnjcILJOc6wOdbzPy4VkhU tytqifAAqH79iU0M8Z0ridV7UAi3XbUY0YgH5nFwNQW5+yaCG1Bn1q1cT5GbabB4xDvw WzphX1n9whypwbvB5hAEicIMzgp4Kbg7OXFHV6yPQBB5itdGJuozz7wzPab3QNkyF/7E Z1Ug== X-Gm-Message-State: AOAM533r3WCVyhun8zGQGUoVImICcIingrb6AozYWS80HzVzYfNrTHh/ FQ017GmLjcY1ruTc0KmC+3w= X-Google-Smtp-Source: ABdhPJy6NpVN8AMBKK45PHRfNCxHZXoWSu6SVHE2UoWggd+lqZ/Ai3gzAewYypvjRfZtZvaE1vuSGQ== X-Received: by 2002:a17:906:e18:: with SMTP id l24mr48340138eji.434.1609343501664; Wed, 30 Dec 2020 07:51:41 -0800 (PST) Received: from localhost (178-169-161-196.razgrad.ddns.bulsat.com. [178.169.161.196]) by smtp.gmail.com with ESMTPSA id u9sm38183530edd.54.2020.12.30.07.51.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Dec 2020 07:51:41 -0800 (PST) From: Iskren Chernev To: Bjorn Andersson Cc: Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Iskren Chernev , ~postmarketos/upstreaming@lists.sr.ht, Brian Masney Subject: [PATCH 1/4] ARM: dts: qcom: msm8974: add gpu support Date: Wed, 30 Dec 2020 17:51:29 +0200 Message-Id: <20201230155132.3661292-1-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Brian Masney Add support for the a3xx GPU Signed-off-by: Brian Masney Reviewed-by: Brian Masney Tested-by: Alexey Minnekhanov Tested-by: Alexey Minnekhanov --- arch/arm/boot/dts/qcom-msm8974.dtsi | 45 +++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) base-commit: d7a03a44a5e93f39ece70ec75d25c6088caa0fdb prerequisite-patch-id: aba6f684932cab35d98457c21e4ff7a5ac75c753 prerequisite-patch-id: 4884d57df1bd197896b69e115d9002d6c26ae2e2 prerequisite-patch-id: 4f1aba3c3675236b18578eedbe71b0cdca01ed77 prerequisite-patch-id: cbfe6ccfebb142370baff15bbdf3cf2f34ee77df diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 51f5f904f9eb9..c399446d8154e 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1399,6 +1399,51 @@ cnoc: interconnect@fc480000 { <&rpmcc RPM_SMD_CNOC_A_CLK>; }; + gpu_opp_table: opp_table { + status = "disabled"; + + compatible = "operating-points-v2"; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + }; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + }; + + opp-275000000 { + opp-hz = /bits/ 64 <275000000>; + }; + }; + + gpu: adreno@fdb00000 { + status = "disabled"; + + compatible = "qcom,adreno-330.2", + "qcom,adreno"; + reg = <0xfdb00000 0x10000>; + reg-names = "kgsl_3d0_reg_memory"; + interrupts = ; + interrupt-names = "kgsl_3d0_irq"; + clock-names = "core", + "iface", + "mem_iface"; + clocks = <&mmcc OXILI_GFX3D_CLK>, + <&mmcc OXILICX_AHB_CLK>, + <&mmcc OXILICX_AXI_CLK>; + sram = <&gmu_sram>; + power-domains = <&mmcc OXILICX_GDSC>; + operating-points-v2 = <&gpu_opp_table>; + + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>, + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>; + interconnect-names = "gfx-mem", + "ocmem"; + + // iommus = <&gpu_iommu 0>; + }; + mdss: mdss@fd900000 { status = "disabled"; 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[178.169.161.196]) by smtp.gmail.com with ESMTPSA id j23sm25028276edv.45.2020.12.30.07.51.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Dec 2020 07:51:45 -0800 (PST) From: Iskren Chernev To: Bjorn Andersson Cc: Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Iskren Chernev , ~postmarketos/upstreaming@lists.sr.ht, Samuel Pascua Subject: [PATCH 3/4] ARM: dts: qcom: msm8974-klte: add support for display Date: Wed, 30 Dec 2020 17:51:31 +0200 Message-Id: <20201230155132.3661292-3-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201230155132.3661292-1-iskren.chernev@gmail.com> References: <20201230155132.3661292-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Samuel Pascua Add initial support for the display found on the Samsung Galaxy 5 (klte) phone. This is based on work from Jonathan Marek & Brian Masney. Please note that this patch depends on dt-binding patch in [1] [1] https://lkml.org/lkml/2020/12/30/293 Signed-off-by: Samuel Pascua --- .../boot/dts/qcom-msm8974-samsung-klte.dts | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts index 1d5e8abdbda79..8b7e95b748e39 100644 --- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts @@ -453,6 +453,16 @@ int { bias-pull-down; }; }; + + panel_pin: panel { + te { + pins = "gpio12"; + function = "mdp_vsync"; + + drive-strength = <2>; + bias-disable; + }; + }; }; sdhc_1: sdhci@f9824900 { @@ -705,6 +715,54 @@ opp_table { adreno@fdb00000 { status = "ok"; }; + + mdss@fd900000 { + status = "ok"; + + mdp@fd900000 { + status = "ok"; + }; + + dsi@fd922800 { + status = "ok"; + + vdda-supply = <&pma8084_l2>; + vdd-supply = <&pma8084_l22>; + vddio-supply = <&pma8084_l12>; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + port@1 { + endpoint { + remote-endpoint = <&panel_in>; + data-lanes = <0 1 2 3>; + }; + }; + }; + + panel: panel@0 { + reg = <0>; + compatible = "samsung,s6e3fa2"; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_pin>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + }; + + dsi-phy@fd922a00 { + status = "ok"; + + vddio-supply = <&pma8084_l12>; + }; + }; }; &spmi_bus {