From patchwork Wed Dec 23 20:27:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Wahren X-Patchwork-Id: 352042 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95B66C433E9 for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 61B5E221FA for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728791AbgLWUah (ORCPT ); Wed, 23 Dec 2020 15:30:37 -0500 Received: from mout.kundenserver.de ([217.72.192.75]:48961 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728524AbgLWUah (ORCPT ); Wed, 23 Dec 2020 15:30:37 -0500 Received: from localhost.localdomain ([37.4.249.194]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.183]) with ESMTPSA (Nemesis) id 1N6svJ-1jzMda1QVT-018INl; Wed, 23 Dec 2020 21:27:53 +0100 From: Stefan Wahren To: Eric Anholt , Maxime Ripard , David Airlie , Daniel Vetter , Rob Herring , Nicolas Saenz Julienne Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/4] drm/v3d: Use platform_get_irq_optional() to get optional IRQs Date: Wed, 23 Dec 2020 21:27:22 +0100 Message-Id: <1608755245-18069-2-git-send-email-stefan.wahren@i2se.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> References: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> X-Provags-ID: V03:K1:UmY82BR7rIwpmorUyFeWjROyE6WY47qOwlB8r+JVH4RCPmQCUcf /JAGJRQ1tV8xmoYrFUuafXTqdVrjQ9cCxvPb4ZSUL/Mq42AN8lqRPE4Sx65leZXNTl+2pbu QQmcwUxOscziTZqGaYEjMAodD1vdQ6GbqkTIBJKxxQGAzh55CkCcFgPE9TsM90GsXXxo0KW SehPGRQ+7K4fvJFfyJReg== X-UI-Out-Filterresults: notjunk:1; V03:K0:YpfT4Hbc914=:vzmdHssbJr5JSEhdeJHnM3 PvEO9/QH1pUQ9Pe/xXra0Ojd1XPu/bPXF0ua4n8X4PvsgAMv1QRdd8Oy++HRU7c5Y80o9oI8p CnWvWT92nKFGy3Ko+Gf78lQgTgLOGx6A2nqgBCQ+YZhasOQiolVi58sEgPw0drfZkut2QUoDz WQH8TZqc5SLA7cfRNiVTyFI8qPZqUnGGSCXUL3YeaFf0Sou7SdeILH7bvmvfac8QZpuffq9hy pNE2AidnNuUtUNrdPz4lEefGglvJBfUNlAFp6rJyVrOSPJVrQaIuh97Hm3gu9eI9haQmMNiVF L7kMCxKjofSbAkmIbwr0AXfanvhWfDMmqDReZtP759lnhagJs52yFfs0ivn1MjZ0tti6pZeK9 xi1N9//gqZlosRMN9zQtKIJd3ZDHTPpb7odrOGNZFzyfe6+qse0DTHNxWELfhGptzs0m1Wqp5 jVE89yAs8A== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Nicolas Saenz Julienne Aside from being more correct, the non optional version of the function prints an error when failing to find the IRQ. Signed-off-by: Nicolas Saenz Julienne --- drivers/gpu/drm/v3d/v3d_irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c index c886864..0be2eb7 100644 --- a/drivers/gpu/drm/v3d/v3d_irq.c +++ b/drivers/gpu/drm/v3d/v3d_irq.c @@ -217,7 +217,7 @@ v3d_irq_init(struct v3d_dev *v3d) V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS); V3D_WRITE(V3D_HUB_INT_CLR, V3D_HUB_IRQS); - irq1 = platform_get_irq(v3d_to_pdev(v3d), 1); + irq1 = platform_get_irq_optional(v3d_to_pdev(v3d), 1); if (irq1 == -EPROBE_DEFER) return irq1; if (irq1 > 0) { From patchwork Wed Dec 23 20:27:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Wahren X-Patchwork-Id: 352041 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7C69C4332B for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7FB9C221F5 for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728795AbgLWUah (ORCPT ); Wed, 23 Dec 2020 15:30:37 -0500 Received: from mout.kundenserver.de ([212.227.17.10]:53135 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728563AbgLWUah (ORCPT ); Wed, 23 Dec 2020 15:30:37 -0500 Received: from localhost.localdomain ([37.4.249.194]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.183]) with ESMTPSA (Nemesis) id 1N1whr-1juOHo3Ia1-012GVD; Wed, 23 Dec 2020 21:27:53 +0100 From: Stefan Wahren To: Eric Anholt , Maxime Ripard , David Airlie , Daniel Vetter , Rob Herring , Nicolas Saenz Julienne Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Phil Elwell Subject: [PATCH 2/4] drm/v3d: Set dma_mask as well as coherent_dma_mask Date: Wed, 23 Dec 2020 21:27:23 +0100 Message-Id: <1608755245-18069-3-git-send-email-stefan.wahren@i2se.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> References: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> X-Provags-ID: V03:K1:I6eIz9QT5FQaoqLrLyudDnWIK7ylWVUNJTT6VXZQmaNclBOqxaG QZjbnv5FMeEat5VFJ+unjzj8N7FCH3XIQ6EpPDqhfQiTHRnfhdL9e+Jfr4b4iLYDM/UCPCz 4tQOZuy1P/qUJgVav08EX+dGubKdBddKK4G/PVQ01mNVbqkyb9uV3MYO+s9PHUE3GoXo5OO tGzgkovKr2fvv9P3sk1mw== X-UI-Out-Filterresults: notjunk:1; V03:K0:JD8Xuhx8lwQ=:5DE7wkDO+8oe2MyhYPixS5 k8qrwxyZRxnACC2HLuOL+R0odh2fOcWWKN8zbzrMwWr5g5fajw4zJMjopDoeyuwbWZ785p+OZ sj/3XhiJswOL0+MlJHHxIY3HjvbIX6YX9xaTRrLLrt/36/rc90XRBaGB3YY8yslv1MYgB+GRl bWBdF+NX9fn03kuGCRqyVgqmkZDXq0i4fe14ZoWlkdTBwiHTqdVIJeqRk9jca/J8vcMXokygR 0sfswBY3hENVahp4Khi/AlXKuqL98lt7D7hl1T197qqLfYw2nKLc57QiY7RM2yAjxnoR14KrA 4NVZBOa9teWRsM07/OQVDbDOBrKU0cQjj9a5jDQT+Veh61V1xohJG5yp6sEZIxkgk+FV9K2TH aczu1UrasgifeeQ5OTWyJn2WCqwuTmzNJnc0w0Krn+18wq0xGjWmdEmQDTk/2VMjbN9/bfbg6 pG0FPQnVig== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Phil Elwell Both coherent_dma_mask and dma_mask act as constraints on allocations and bounce buffer usage, so be sure to set dma_mask to the appropriate value otherwise the effective mask could be incorrect. Signed-off-by: Phil Elwell --- drivers/gpu/drm/v3d/v3d_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/v3d/v3d_drv.c b/drivers/gpu/drm/v3d/v3d_drv.c index 42d401f..99e22be 100644 --- a/drivers/gpu/drm/v3d/v3d_drv.c +++ b/drivers/gpu/drm/v3d/v3d_drv.c @@ -232,8 +232,8 @@ static int v3d_platform_drm_probe(struct platform_device *pdev) return ret; mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO); - dev->coherent_dma_mask = - DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)); + dma_set_mask_and_coherent(dev, + DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH))); v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH); ident1 = V3D_READ(V3D_HUB_IDENT1); From patchwork Wed Dec 23 20:27:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Wahren X-Patchwork-Id: 351526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA4D7C4332D for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A2077221FA for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728563AbgLWUai (ORCPT ); Wed, 23 Dec 2020 15:30:38 -0500 Received: from mout.kundenserver.de ([217.72.192.75]:50429 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727187AbgLWUai (ORCPT ); Wed, 23 Dec 2020 15:30:38 -0500 Received: from localhost.localdomain ([37.4.249.194]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MRmo8-1kTS3U0i30-00TCnc; Wed, 23 Dec 2020 21:27:54 +0100 From: Stefan Wahren To: Eric Anholt , Maxime Ripard , David Airlie , Daniel Vetter , Rob Herring , Nicolas Saenz Julienne Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Phil Elwell Subject: [PATCH 3/4] drm/v3d: Don't clear MMU control bits on exception Date: Wed, 23 Dec 2020 21:27:24 +0100 Message-Id: <1608755245-18069-4-git-send-email-stefan.wahren@i2se.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> References: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> X-Provags-ID: V03:K1:0tOEdDp6fR0bZbqYWT127G8PNcCAxolyfkayHeulx2DS57jbIDQ XlgCEGoOcHZIlmdGZG19UAOC3Q5kKIAhbXO8PxpaqyQwJzvnjDa5DG34KzCDO/LWNboNs8o 45M4mEJ3jiN/nOzDUKkiewC/zJ7Jv9vcrxAWL5UN4L9GDbhqY37XCKp02eQ6Tq3HeWdflqw r4e61G4wyZpYGuPvX0pWw== X-UI-Out-Filterresults: notjunk:1; V03:K0:8+48t7PoDdU=:qUNCbfuT6OyNheBimZ+kNu lRWFX8fzqYgCE+k+t+ucZvVFNWC5+iXRA/RbPxyfe18s4mpV18k4G2Ox0YHGZITIwWtjPhj1u 1rtqam8JUcUCqwD+78W4L9Cy6QXAahBKz2bb9k38ydMQpYeaN2ZKJUSVXedU3jxGjuggk6gzy 5nuT0MBShvVcaS52DaIx6JeTkcvgNlmz3GTui51gXS5aNbXlzfHSUsw4JFPseXSmSbik2F6Vy 2gAoCOKhhYxq1YE+OI3D6MrGT3tdaFP0vGgf8UNoJCSd1E1wluHX0oUgG0xf3WqiY9+l6Ht8g IOW5GX2lfXpsW8sdiXDM/8AJyc/UEOsXS903OigOuNuDGlIVmm4iwmeEPhBzda3fBNQgVqhZ8 WTHvq4RW3hJGV8VYNyu5cWFZ2Sw54Up6uRQT1VHF6hSjaTfsQME6nPWsvs3Y9H1wiBoo0wYHR wgqol2yDNA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Phil Elwell MMU exception conditions are reported in the V3D_MMU_CTRL register as write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any exceptions, but does so by masking out any other bits and writing the result back. There are some important control bits in that register, including MMU_ENABLE, so a safer approach is to simply write back the value just read unaltered. Signed-off-by: Phil Elwell --- drivers/gpu/drm/v3d/v3d_irq.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c index 0be2eb7..e714d53 100644 --- a/drivers/gpu/drm/v3d/v3d_irq.c +++ b/drivers/gpu/drm/v3d/v3d_irq.c @@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg) }; const char *client = "?"; - V3D_WRITE(V3D_MMU_CTL, - V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED | - V3D_MMU_CTL_PT_INVALID | - V3D_MMU_CTL_WRITE_VIOLATION)); + V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL)); if (v3d->ver >= 41) { axi_id = axi_id >> 5; From patchwork Wed Dec 23 20:27:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Wahren X-Patchwork-Id: 352040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08778C4332E for ; Wed, 23 Dec 2020 20:30:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CBA01221F5 for ; Wed, 23 Dec 2020 20:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727187AbgLWUai (ORCPT ); Wed, 23 Dec 2020 15:30:38 -0500 Received: from mout.kundenserver.de ([217.72.192.75]:52473 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728524AbgLWUai (ORCPT ); Wed, 23 Dec 2020 15:30:38 -0500 Received: from localhost.localdomain ([37.4.249.194]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MWAWq-1kXruK2Ok6-00XaWK; Wed, 23 Dec 2020 21:27:54 +0100 From: Stefan Wahren To: Eric Anholt , Maxime Ripard , David Airlie , Daniel Vetter , Rob Herring , Nicolas Saenz Julienne Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Stefan Wahren Subject: [PATCH 4/4] dt-bindings: gpu: Convert v3d to json-schema Date: Wed, 23 Dec 2020 21:27:25 +0100 Message-Id: <1608755245-18069-5-git-send-email-stefan.wahren@i2se.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> References: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> X-Provags-ID: V03:K1:pX/LN56hT9ajMLlvxi29HcfZUurA9LJeN+C603L1/ANg4ENBvmH w8uwkjHfG6FBZOFYjf91uWTVS/K0USc5MX0apWyoBD+22FozIOQ6/wN95vavl47a/80dTji RUQrvmeCw/ZYYws++GuhRIa9GvSLxmdtRGcRUu2gjJgB89mAya4j41QMQDK0keaYHUqzrUz 88bgQvA0pJMUS2pJzpYww== X-UI-Out-Filterresults: notjunk:1; V03:K0:rvmANF2DETk=:iUfSGjqZA22mOgY1peyWtD LWY/4a2JplXHfh5Fs1s22faqkSDd7w43ceEyG+sNm3d8h18ehAz1x0NZfCx7nL7G+7u9SwnfH ELjKDu3r43orXRQDkwKiJbK4yZhb7Mcmbuz6tohQI4KHtsQCwBHA4nY/w8+vi8IMB0JfTZZXD VNlTO7h8lBTLPVUIKIO/PYHouvMDdcdhkqandpY5bN/EKqBDDta/yoYcD2E15gT/8+nsoeaGu QiO1pXGG7RipZ2Kv6VKXKfjyFvASLqeLrtFAnGy2x00Lp0oKqjf7+P+nwaoUsVw2xaXyVfr6E QvDtsmduAqOpL0cmIXAifjeAPhmiD4rRk6quq6vPJ3xSSyy8HZbWVp9PD+Pt5h2jjz/ecbO5I oyA37QqS89immqVAbtwRUmuy9KBXCOKyltUYkFI3GZarTy32qf/ht3Etl/PoqZKuC6cDdXtNY uM9HxKs/nw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This converts the v3d bindings to yaml format. Signed-off-by: Stefan Wahren --- .../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 ---------- .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 76 ++++++++++++++++++++++ 2 files changed, 76 insertions(+), 33 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt deleted file mode 100644 index b2df82b..0000000 --- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt +++ /dev/null @@ -1,33 +0,0 @@ -Broadcom V3D GPU - -Only the Broadcom V3D 3.x and newer GPUs are covered by this binding. -For V3D 2.x, see brcm,bcm-vc4.txt. - -Required properties: -- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d" -- reg: Physical base addresses and lengths of the register areas -- reg-names: Names for the register areas. The "hub" and "core0" - register areas are always required. The "gca" register area - is required if the GCA cache controller is present. The - "bridge" register area is required if an external reset - controller is not present. -- interrupts: The interrupt numbers. The first interrupt is for the hub, - while the following interrupts are separate interrupt lines - for the cores (if they don't share the hub's interrupt). - See bindings/interrupt-controller/interrupts.txt - -Optional properties: -- clocks: The core clock the unit runs on -- resets: The reset line for v3d, if not using a mapping of the bridge - See bindings/reset/reset.txt - -v3d { - compatible = "brcm,7268-v3d"; - reg = <0xf1204000 0x100>, - <0xf1200000 0x4000>, - <0xf1208000 0x4000>, - <0xf1204100 0x100>; - reg-names = "bridge", "hub", "core0", "gca"; - interrupts = <0 78 4>, - <0 77 4>; -}; diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml new file mode 100644 index 0000000..a2b06d42 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom V3D GPU Bindings + +maintainers: + - Eric Anholt + - Nicolas Saenz Julienne + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + + compatible: + enum: + - brcm,7268-v3d + - brcm,7278-v3d + + reg: + items: + - description: hub register + - description: core0 register + - description: GCA cache controller register (if GCA controller) + - description: bridge register (if no external reset controller) + minItems: 2 + maxItems: 4 + + reg-names: + items: + enum: [ bridge, core0, gca, hub ] + minItems: 2 + maxItems: 4 + + interrupts: + items: + - description: hub interrupt + - description: core interrupt (if it doesn't share the hub's interrupt) + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + gpu@f1200000 { + compatible = "brcm,7268-v3d"; + reg = <0xf1204000 0x100>, + <0xf1200000 0x4000>, + <0xf1208000 0x4000>, + <0xf1204100 0x100>; + reg-names = "bridge", "hub", "core0", "gca"; + interrupts = <0 78 4>, + <0 77 4>; + }; + +...