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Tue, 15 Dec 2020 08:37:59 +0000 From: "Alice Guo (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com Subject: [PATCH v7 2/4] arm64: dts: imx8m: add SoC ID compatible Date: Tue, 15 Dec 2020 16:35:49 +0800 Message-Id: <20201215083551.6067-2-alice.guo@oss.nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201215083551.6067-1-alice.guo@oss.nxp.com> References: <20201215083551.6067-1-alice.guo@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR06CA0250.apcprd06.prod.outlook.com (2603:1096:4:ac::34) To AM6PR04MB6053.eurprd04.prod.outlook.com (2603:10a6:20b:b9::10) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from nxf55104-OptiPlex-7060.ap.freescale.net (119.31.174.71) by SG2PR06CA0250.apcprd06.prod.outlook.com (2603:1096:4:ac::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.12 via Frontend Transport; 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Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alice Guo --- Changes for v7: - none Changes for v6: - leave only the changelog under '---' Changes for v5: - none Changes for v4: - change subject and commit message - add Reviewed-by Changes for v3: - none Changes for v2: - remove the subject prefix "LF-2571-2" arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index c824f2615fe8..d457ce815e68 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -257,7 +257,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mm-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index ee1790230490..db50e6e01ac5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -241,7 +241,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mn-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index ecccfbb4f5ad..ec6ac523ecfc 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -218,7 +218,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mp-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index a841a023e8e0..9b6d9307e5d7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -286,7 +286,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mq-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; From patchwork Tue Dec 15 08:35:50 2020 Content-Type: text/plain; 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Tue, 15 Dec 2020 08:38:04 +0000 From: "Alice Guo (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com Subject: [PATCH v7 3/4] arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique ID Date: Tue, 15 Dec 2020 16:35:50 +0800 Message-Id: <20201215083551.6067-3-alice.guo@oss.nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201215083551.6067-1-alice.guo@oss.nxp.com> References: <20201215083551.6067-1-alice.guo@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR06CA0250.apcprd06.prod.outlook.com (2603:1096:4:ac::34) To AM6PR04MB6053.eurprd04.prod.outlook.com (2603:10a6:20b:b9::10) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from nxf55104-OptiPlex-7060.ap.freescale.net (119.31.174.71) by SG2PR06CA0250.apcprd06.prod.outlook.com (2603:1096:4:ac::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.12 via Frontend Transport; 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CAT:NONE; SFS:(4636009)(136003)(376002)(346002)(366004)(396003)(39860400002)(83380400001)(6666004)(16526019)(186003)(66476007)(86362001)(26005)(8676002)(5660300002)(6486002)(8936002)(316002)(66556008)(66946007)(2906002)(4326008)(1076003)(6512007)(478600001)(2616005)(956004)(52116002)(6506007)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: /8zjayraom9RFXwrGLCm29XTWw0yVSkctY5SrgoCNAyYyaPeLkdxWvepXwhfE3E6FroUYP61xE9c1KXh48b8OFDyqTsq1YvMAapSCfpBGjLZfUbfxyIX7I2JWNpf2cnovxncsDNlmIKC6pyxsrC3XV4N5dcmPYtnG8tM+inVkcgXQL+qryUEB6WxB1TEIGJ7+08TSFWzaNF2WC4XjIEKDLN0v3ZjyK6R1YT/zunJPU7XfGhvc9ue+qTYbOsKDfwcH0jGzWI8TkHaRiMHhDggobCTES4H5Wf1+cyLUlFAOvhOvvYjN2pi+jmo3iiVzCp2btoe7DeW6Js0mfo/AMVElU5fSTbX+gNWKKMz1Dy8RoOPEnNY2ib7Kr705leMk/1Xov5SSsAhfAxhJWDlVU1rVrYKr+b3lCCqKk3dwlWORRSH2/0beQHWb3GBJFL7nUD8Q/1YNovtc5wW1klMZZFF78R85vlBUUvUwpgSfpGoDpOXdnha2KtLHR3F5SgMwCZrmJePRqz4naG2jJwH/GoXATn0LR7VadZj9vhbDFA64BDF5jDa8gBeS1RIhgpiQEHrOv2fq4HDGTprlxEmATcDjWBELvRm7WMA13BETW+qa2YSyDkY7AoSA7z6quVa61h7swTnYPuftgcLsCsmfBwl09bQWKFC+Lpbky9HIn2pjC7lf4HgCi51MIKjGf7u3LhimgGEb3WnswFRl8WkHFMfl7vwSZ3ceTDOQNu3Epb0TVoxKX189z0kGPhxo1gI6CU6b6Syjg+aaYdJed9rZykoimjmuvwbUnKbLE/FZZQ24qS9NPFKq5qHnPf7a2DiU2KMUf3lzfCNTC/EsohznCwR5mbC5ObshpjMUNhX0tzgDabNd9O8Ab7Owk5oIq8oWyw3rJKLJrLmz2ub1cxR/RMx/5AcDCfm+Rfz4loJLtIBQe8IZ5/zae4/6yAt0rRLAteXYIHTC0iInxG+civ5JUB7b9/FpP8ndqfR59nhQk35EQE0uYelbtHYo7rVtwQzGFqn X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB6053.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2020 08:38:04.2759 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 979a4ad3-8c98-4ba9-389b-08d8a0d4bd66 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: rJIIZTWygxFSZusKIVtGUppAYxe9so+lfEug/3/CDxU5UnNrMxcQ67PReolFz98Ija6gPTsw87jB1ePyOKQ7gA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR04MB6807 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Alice Guo In order to be able to use NVMEM APIs to read soc unique ID, add the nvmem data cell and name for nvmem-cells to the "soc" node, and add a nvmem node which provides soc unique ID to efuse@30350000. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alice Guo --- Changes for v7: - add Reviewed-by Changes for v6: - leave only the changelog under '---' Changes for v5: - change underscore of device node to hyphen Changes for v4: - delete "stuff" in subject and commit message - add detailed description Changes for v3: - convert register addresses and sizes to hex Changes for v2: - remove the subject prefix "LF-2571-3" arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++ 4 files changed, 24 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index d457ce815e68..9bee6f1889a4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -261,6 +261,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mm_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -518,6 +520,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mm_uid: unique-id@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index db50e6e01ac5..b344fdc16534 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -245,6 +245,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mn_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -531,6 +533,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mn_uid: unique-id@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index ec6ac523ecfc..9401e92f1c84 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -222,6 +222,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mp_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -328,6 +330,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mp_uid: unique-id@420 { + reg = <0x8 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 9b6d9307e5d7..a2a885f1a07a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -291,6 +291,8 @@ #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; dma-ranges = <0x40000000 0x0 0x40000000 0xc0000000>; + nvmem-cells = <&imx8mq_uid>; + nvmem-cell-names = "soc_unique_id"; bus@30000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; @@ -555,6 +557,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mq_uid: soc-uid@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; };