From patchwork Thu Mar 23 08:03:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 95894 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp625075qgd; Thu, 23 Mar 2017 01:05:16 -0700 (PDT) X-Received: by 10.84.215.155 with SMTP id l27mr1775336pli.31.1490256316150; Thu, 23 Mar 2017 01:05:16 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 23 Mar 2017 08:03:48 +0000 (GMT) From: Marek Szyprowski To: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Lee Jones , Bartlomiej Zolnierkiewicz , Chanwoo Choi Subject: [PATCH v4 4/6] mfd: exynos-lpass: Add support for clocks Date: Thu, 23 Mar 2017 09:03:25 +0100 Message-id: <1490256207-10061-5-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1490256207-10061-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrKIsWRmVeSWpSXmKPExsWy7djP87oZjZcjDBYdEbTYOGM9q8X1L89Z Lc6f38Bucf/rUUaLKX+WM1lsenyN1WLz/D+MFpd3zWGzmHF+H5PF2iN32S0Ov2lntVi16w+j A4/Hzll32T02repk87hzbQ+bx+Yl9R59W1YxenzeJBfAFsVlk5Kak1mWWqRvl8CVMfOdQMF9 2Yrl57eyNDCekOhi5OSQEDCR2HJuFguELSZx4d56ti5GLg4hgWWMElO+z2eBcD4zSmy59Iod puPRx7escFW72s+wQzgNTBLds44ygVSxCRhKdL3tApslItDOKHG3r4MJxGEWuMEk0XJ/KhtI lbCAo8S37fcYQWwWAVWJ6TNfMYPYvAIeEh/75jBD7JOTOHlsMiuIzSngKXF1zUGoa+exS3z+ WtLFyAFky0psOgBV7iIxaf4CJghbWOLV8S1QZ8tIXJ7cDdXazyjR1KoNYc9glDj3lhfCtpY4 fPwi2CpmAT6JSdumM0OM55XoaBOCMD0k5s0wg6h2lOhc+AUaXHMYJfoenmabwCizgJFhFaNI amlxbnpqsaFecWJucWleul5yfu4mRmDkn/53/P0OxqfNIYcYBTgYlXh4I2ouRQixJpYVV+Ye YpTgYFYS4bUtvBwhxJuSWFmVWpQfX1Sak1p8iFGag0VJnHfvgivhQgLpiSWp2ampBalFMFkm Dk6pBsZ0xffKM7a/DVh132ipSdtEkcvXtQzXet1I1w4OC5Bt3KIfUZwZP/fEWtMtj/fdrPde 2rimfM/8o4ITiqLMbZat+fitvfJFQ1sep5Lt5zeZC5o0vnf2F2xIaz3Jbfpu1sck0Yu6dZbT v65Xca17UW+fXxD6VeX+S4tVb7QuCgVp8qRddXk330KJpTgj0VCLuag4EQDHXUmm+AIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmplkeLIzCtJLcpLzFFi42I5/e/4Fd2SxssRBt/uy1tsnLGe1eL6l+es FufPb2C3uP/1KKPFlD/LmSw2Pb7GarF5/h9Gi8u75rBZzDi/j8li7ZG77BaH37SzWqza9YfR gcdj56y77B6bVnWyedy5tofNY/OSeo++LasYPT5vkgtgi3KzyUhNTEktUkjNS85PycxLt1UK DXHTtVBSyEvMTbVVitD1DQlSUihLzCkF8owM0ICDc4B7sJK+XYJbxsx3AgX3ZSuWn9/K0sB4 QqKLkZNDQsBE4tHHt6wQtpjEhXvr2UBsIYEljBI3/ih3MXIB2U1MEmvXvGYHSbAJGEp0ve1i A0mICLQzSry+fY0JJMEscIdJYsPLFBBbWMBR4tv2e4wgNouAqsT0ma+YQWxeAQ+Jj31zmCG2 yUmcPDYZbDOngKfE1TUHWSA2e0hsuPOJfQIj7wJGhlWMIqmlxbnpucVGesWJucWleel6yfm5 mxiBUbDt2M8tOxi73gUfYhTgYFTi4d1QdylCiDWxrLgy9xCjBAezkgivbeHlCCHelMTKqtSi /Pii0pzU4kOMpkBHTWSWEk3OB0ZoXkm8oYmhuaWhkbGFhbmRkZI479QPV8KFBNITS1KzU1ML Uotg+pg4OKUaGNM3XGS6osUWV78lmini85x1bR47pK1+az34H7Qmu6Cmb6XuTofFHgmepQ6r e2vtJ16q+3xpYZ2D85NnwqWiu5yPs//Ys7TcaXPf868zy1Mzzm1wEVw8q+Of2G4xvj/TbPNm 7ZkaLaBj5B4Zusz77vm+08azzEQ2udaXt3Sc1A8pjanYxSkUqcRSnJFoqMVcVJwIAKWYSQiY AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170323080349eucas1p11187befd30ab70554373fb6d818cd851 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170323080349eucas1p11187befd30ab70554373fb6d818cd851 X-RootMTR: 20170323080349eucas1p11187befd30ab70554373fb6d818cd851 References: <1490256207-10061-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Exynos LPASS requires some clocks to be enabled to make any access to its registers. This patch adds code for handling such clocks. For current set of registers it is enough to keep sfr0_ctrl clock enabled. Till now it worked only because those clocks were enabled by bootloader and driver probe() happened before they were disabled by clock core because of lack of users. Handling those clocks is also needed to make it possible to enable support for audio power domain. This patch requires adding sfr0_ctrl clock to device tree. Signed-off-by: Marek Szyprowski Reviewed-by: Krzysztof Kozlowski Acked-by: Sylwester Nawrocki Acked-by: Rob Herring Acked-for-MFD-by: Lee Jones --- .../devicetree/bindings/mfd/samsung,exynos5433-lpass.txt | 6 ++++++ drivers/mfd/exynos-lpass.c | 10 ++++++++++ 2 files changed, 16 insertions(+) -- 1.9.1 diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt index a8deaee82c44..df664018c148 100644 --- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt +++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt @@ -5,6 +5,10 @@ Required properties: - compatible : "samsung,exynos5433-lpass" - reg : should contain the LPASS top SFR region location and size + - clock-names : should contain following required clocks: "sfr0_ctrl" + - clocks : should contain clock specifiers of all clocks, which + input names have been specified in clock-names + property, in same order. - #address-cells : should be 1 - #size-cells : should be 1 - ranges : must be present @@ -24,6 +28,8 @@ Example: audio-subsystem { compatible = "samsung,exynos5433-lpass"; reg = <0x11400000 0x100>, <0x11500000 0x08>; + clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>; + clock-names = "sfr0_ctrl"; #address-cells = <1>; #size-cells = <1>; ranges; diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c index 17915daa2e80..be264988bdc9 100644 --- a/drivers/mfd/exynos-lpass.c +++ b/drivers/mfd/exynos-lpass.c @@ -14,6 +14,7 @@ * only version 2 as published by the Free Software Foundation. */ +#include #include #include #include @@ -52,6 +53,7 @@ struct exynos_lpass { /* pointer to the LPASS TOP regmap */ struct regmap *top; + struct clk *sfr0_clk; }; static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask) @@ -71,6 +73,8 @@ static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask) static void exynos_lpass_enable(struct exynos_lpass *lpass) { + clk_prepare_enable(lpass->sfr0_clk); + /* Unmask SFR, DMA and I2S interrupt */ regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S); @@ -88,6 +92,8 @@ static void exynos_lpass_disable(struct exynos_lpass *lpass) /* Mask any unmasked IP interrupt sources */ regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, 0); regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, 0); + + clk_disable_unprepare(lpass->sfr0_clk); } static const struct regmap_config exynos_lpass_reg_conf = { @@ -114,6 +120,10 @@ static int exynos_lpass_probe(struct platform_device *pdev) if (IS_ERR(base_top)) return PTR_ERR(base_top); + lpass->sfr0_clk = devm_clk_get(dev, "sfr0_ctrl"); + if (IS_ERR(lpass->sfr0_clk)) + return PTR_ERR(lpass->sfr0_clk); + lpass->top = regmap_init_mmio(dev, base_top, &exynos_lpass_reg_conf); if (IS_ERR(lpass->top)) { From patchwork Thu Mar 23 08:03:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 95895 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp625194qgd; Thu, 23 Mar 2017 01:05:34 -0700 (PDT) X-Received: by 10.98.252.211 with SMTP id e202mr1481387pfh.118.1490256334751; Thu, 23 Mar 2017 01:05:34 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 23 Mar 2017 08:03:49 +0000 (GMT) From: Marek Szyprowski To: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Lee Jones , Bartlomiej Zolnierkiewicz , Chanwoo Choi Subject: [PATCH v4 6/6] mfd: exynos-lpass: Add runtime PM support Date: Thu, 23 Mar 2017 09:03:27 +0100 Message-id: <1490256207-10061-7-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1490256207-10061-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAAzWRX0hTcRTH/d1/uxvOLtPqh9rQgQ8uMoWFl7Ro4cN6kSCyUQ818k6lTW1T S8H8U6ktmpaVIppKZjAU5zRRUdPNbdkfly2dZsvAzHLuQaaEaZrz1tvncD58D+ccEhV8w0LJ jMwcRpOpUIkIHtZjWx8/pCxxymMbVsR0Z20HTrtWF3Ha4TBy6Lk1K6Afbj5HaNP8FE53NW4C 2tlfT9C1jiGEbh91c2jLcjlOG/o3wYlAWV+dmyMzGe4Qss9TA4Ssq6VIpu82AJnPJDxNnOcl pjKqjDxGc/j4JV66zyzJdlHX182DoBg0B+kASUJKAofvJesAdwf3wfdfOggd4JEC6hmAv3Ve 4G8IKB+A2/OFrCSBxmonykqtAM6OVKKsVIzAGYPKzwQVB3Ve3W5SCFUOoFtfgfgLlJpG4K25 R4TfCqaksN1n2WWMioIu6wDiZz4lg/3bHg47TgjHbNW4n7nUKTjZNoL5gyD1hAPffmrhsDsc gKZhlPWT4HRpCcFyMFyyd//LCYfO6rsYy5UAlt4+yHItgONePssJ0GKf2J2FUkHwQU8Nysbz YUWZgFVk0Nq+DliWQuNGJ8Zeoh7APyvNeBUIbwIBBhDC5GrVaYxWEqNVqLW5mWkxl7PUJrDz +zdb9tVe8NR21AwoEogC+cYbH+QCXJGnzVebASRRUQj/2FWnXMBPVeQXMJqsi5pcFaM1gzAS E+3nDzR9PCeg0hQ5zBWGyWY0/7sIyQ0tBvzBxoTordf3W8aI7bNlrgL3WEqNcPRI3s2qaOvC UkB9VEN63aRzreTkmcIZb8zLn7rZx/qINuWsMnnB8+qrdEgXf2HO444d1y/apC/kz1q5PxY9 e8Xver+LHEU5o5blqniheOnanoWhtonIlL4wQaIyItL5C9nAa+zypCSEFGHadEWcGNVoFX8B iHVKmfcCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmplkeLIzCtJLcpLzFFi42I5/e/4Fd3SxssRBodfqFpsnLGe1eL6l+es FufPb2C3uP/1KKPFlD/LmSw2Pb7GarF5/h9Gi8u75rBZzDi/j8li7ZG77BaH37SzWqza9YfR gcdj56y77B6bVnWyedy5tofNY/OSeo++LasYPT5vkgtgi3KzyUhNTEktUkjNS85PycxLt1UK DXHTtVBSyEvMTbVVitD1DQlSUihLzCkF8owM0ICDc4B7sJK+XYJbxudDJgXXBSp+HtrL2MC4 kK+LkZNDQsBEYsPky8wQtpjEhXvr2UBsIYEljBIr/rp2MXIB2U1MEguunmcBSbAJGEp0ve1i A0mICLQzSry+fY0JJMEscIdJYsPLFBBbWMBRYu3nw2CTWARUJa4f3QNWwyvgIbHr/2t2iG1y EiePTWYFsTkFPCWurjnIArHZQ2LDnU/sExh5FzAyrGIUSS0tzk3PLTbSK07MLS7NS9dLzs/d xAiMgm3Hfm7Zwdj1LvgQowAHoxIP74a6SxFCrIllxZW5hxglOJiVRHhtCy9HCPGmJFZWpRbl xxeV5qQWH2I0BTpqIrOUaHI+MELzSuINTQzNLQ2NjC0szI2MlMR5p364Ei4kkJ5YkpqdmlqQ WgTTx8TBKdXAqMp0dCrLOVF/s9Zc/Yg39R4h2teDNuQe3Pr72ERNrZ2b3jSmC2/ibO7ka4hr ydwWyhv62On+tFf+NSG5j1tcH/2uEq5o0rucM9WYY8/azaJbJpWonmNqCLpT2VGn2BGVqPd3 3i3vm8+ObX269WvgD4OKxMsMk3f9UW98y3/U0/bG41lm2twVSizFGYmGWsxFxYkAkZF1Z5gC AAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170323080350eucas1p273814a2f183f04f180f8f2a2a362b86e X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170323080350eucas1p273814a2f183f04f180f8f2a2a362b86e X-RootMTR: 20170323080350eucas1p273814a2f183f04f180f8f2a2a362b86e References: <1490256207-10061-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert exisitng lpass-suspend/resume callbacks into runtime PM callbacks. This way Exynos LPASS driver will be ready for use with power domains enabled. LPASS will be runtime resumed/suspended as a result of its child devices runtime PM transitions. Signed-off-by: Marek Szyprowski Acked-by: Krzysztof Kozlowski Acked-by: Sylwester Nawrocki Acked-for-MFD-by: Lee Jones --- drivers/mfd/exynos-lpass.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) -- 1.9.1 diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c index 9dbbedad916f..6d735e22acda 100644 --- a/drivers/mfd/exynos-lpass.c +++ b/drivers/mfd/exynos-lpass.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -132,6 +133,8 @@ static int exynos_lpass_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, lpass); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); exynos_lpass_enable(lpass); return of_platform_populate(dev->of_node, NULL, NULL, dev); @@ -141,7 +144,9 @@ static int exynos_lpass_remove(struct platform_device *pdev) { struct exynos_lpass *lpass = platform_get_drvdata(pdev); - exynos_lpass_disable(lpass); + pm_runtime_disable(&pdev->dev); + if (!pm_runtime_status_suspended(&pdev->dev)) + exynos_lpass_disable(lpass); regmap_exit(lpass->top); return 0; @@ -165,8 +170,11 @@ static int __maybe_unused exynos_lpass_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(lpass_pm_ops, exynos_lpass_suspend, - exynos_lpass_resume); +static const struct dev_pm_ops lpass_pm_ops = { + SET_RUNTIME_PM_OPS(exynos_lpass_suspend, exynos_lpass_resume, NULL) + SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) +}; static const struct of_device_id exynos_lpass_of_match[] = { { .compatible = "samsung,exynos5433-lpass" },