From patchwork Fri Dec 11 17:02:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9BA3C4361B for ; Fri, 11 Dec 2020 18:28:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 51E2823DE3 for ; Fri, 11 Dec 2020 18:28:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393641AbgLKREJ (ORCPT ); Fri, 11 Dec 2020 12:04:09 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:5217 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389597AbgLKRD3 (ORCPT ); Fri, 11 Dec 2020 12:03:29 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 09:02:48 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 17:02:48 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 17:02:47 +0000 From: Sowjanya Komatineni To: , , , , , CC: , , , , Subject: [PATCH v4 01/13] media: tegra-video: Use zero crop settings if subdev has no get_selection Date: Fri, 11 Dec 2020 09:02:30 -0800 Message-ID: <1607706162-1548-2-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> References: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607706168; bh=ERCkCneZmXlmcSkkK9fGRHPBppn9DardS4Sr/wZUI/E=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=gcpA9QztErpYpOa7hcbyXufvoK9zMTFjezm2xAP6QqCdPh0kDWE4p8B/EzTY6XE4T m7zn7y7KnbU7oKLc1Aj0dj3wC6PguBqzagckEDeoOP0vciyN1EqZTwNn6+yNcH0TcU ErZJXDE089MLSEWEEMzBz3zXPeXMH/oJGwYToG2sCnUIumv4NgUC3v8jKgQ8FqOm+E ZVtrtDNsTg63xjw8zHnz1fdo2aheEr8Zw765gG4BNQ4XsUMXLRPqLVNYacKbvEC/7l RIVNfCFapTZxedT7cVQV6Xv6sxHscWirhdvbKf2OvveOwLsMzIEp5+Bl5t8fSm2RdW WhNXWvDmIFESg== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently try format implementation doesn't check if subdevice has get_selection ops implemented and returns -EINVAL on error from direct v4l2_subdev_call of get_selection. Selection API's are not mandatory for all V4L2 subdevices. This patch fixes it by adding v4l2_subdev_has_ops check prior to calling get_selection ops and continues with try or set format with zero crop settings for subdevices that don't have get_selection and returns -EINVAL only for subdevices that has get_selection ops. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/vi.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 560d8b3..7edd35c 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -533,11 +533,18 @@ static int __tegra_channel_try_format(struct tegra_vi_channel *chan, fse.code = fmtinfo->code; ret = v4l2_subdev_call(subdev, pad, enum_frame_size, pad_cfg, &fse); if (ret) { - ret = v4l2_subdev_call(subdev, pad, get_selection, NULL, &sdsel); - if (ret) - return -EINVAL; - pad_cfg->try_crop.width = sdsel.r.width; - pad_cfg->try_crop.height = sdsel.r.height; + if (!v4l2_subdev_has_op(subdev, pad, get_selection)) { + pad_cfg->try_crop.width = 0; + pad_cfg->try_crop.height = 0; + } else { + ret = v4l2_subdev_call(subdev, pad, get_selection, + NULL, &sdsel); + if (ret) + return -EINVAL; + + pad_cfg->try_crop.width = sdsel.r.width; + pad_cfg->try_crop.height = sdsel.r.height; + } } else { pad_cfg->try_crop.width = fse.max_width; pad_cfg->try_crop.height = fse.max_height; From patchwork Fri Dec 11 17:02:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37C6FC4361B for ; Fri, 11 Dec 2020 18:29:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F354623EF3 for ; Fri, 11 Dec 2020 18:29:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393699AbgLKREM (ORCPT ); Fri, 11 Dec 2020 12:04:12 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:2291 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389598AbgLKRD3 (ORCPT ); Fri, 11 Dec 2020 12:03:29 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 09:02:49 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 17:02:48 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 17:02:48 +0000 From: Sowjanya Komatineni To: , , , , , CC: , , , , Subject: [PATCH v4 02/13] media: tegra-video: Enable VI pixel transform for YUV and RGB formats Date: Fri, 11 Dec 2020 09:02:31 -0800 Message-ID: <1607706162-1548-3-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> References: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607706169; bh=3KvReLIRXcuW/kRnBsqtVyD+GiWXJeSQRRku54/yeMg=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=dT0/BYwE9AfZF5CrldrAWJVtDVccMVBbJIay7rjv18tiGJtmGnc6QH3T/ikiX90kQ BiOtVxUHJRvUrO5JPlmAJ9HxTfBmHbX4lIj+XBHx3a58RYKktnvUcjoNa9ytlVPxqV yu3bT20c6i26/337HRkJMH1A+89cMUAynmRWsu5cvXxAuF6w4b1IjU+F8pJb0KI3E3 bTiqlWL1wverKjK+D7KMq1mm5RHKx4PloCbFSivzp8kOVQCoktFTbyCGNAjMejPN5o xucLh8z4vBoFALe9cjtrjmKU4CEfg5kAs++ZbeVzPnV9+kjGFXFavTrekuw0W3HasJ kdBpI72ejumCg== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org VI Pixel transforms converts source pixel data to selected destination pixel formats in memory and aligns properly. YUV and RGB formats need this pixel transform to be enabled. RAW formats use T_R16_I destination pixel format in memory and does not need pixel transform as they support direct write to memory. So, this patch enables pixel transform for YUV and RGB and keeps it bypass for RAW formats. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/tegra210.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index ac066c0..6b23aa7 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -178,10 +178,23 @@ static int tegra_channel_capture_setup(struct tegra_vi_channel *chan) u32 format = chan->fmtinfo->img_fmt; u32 data_type = chan->fmtinfo->img_dt; u32 word_count = (width * chan->fmtinfo->bit_width) / 8; + u32 bypass_pixel_transform = BIT(BYPASS_PXL_TRANSFORM_OFFSET); + + /* + * VI Pixel transformation unit converts source pixels data format + * into selected destination pixel format and aligns properly while + * interfacing with memory packer. + * This pixel transformation should be enabled for YUV and RGB + * formats and should be bypassed for RAW formats as RAW formats + * only support direct to memory. + */ + if (chan->pg_mode || data_type == TEGRA_IMAGE_DT_YUV422_8 || + data_type == TEGRA_IMAGE_DT_RGB888) + bypass_pixel_transform = 0; vi_csi_write(chan, TEGRA_VI_CSI_ERROR_STATUS, 0xffffffff); vi_csi_write(chan, TEGRA_VI_CSI_IMAGE_DEF, - ((chan->pg_mode ? 0 : 1) << BYPASS_PXL_TRANSFORM_OFFSET) | + bypass_pixel_transform | (format << IMAGE_DEF_FORMAT_OFFSET) | IMAGE_DEF_DEST_MEM); vi_csi_write(chan, TEGRA_VI_CSI_IMAGE_DT, data_type); From patchwork Fri Dec 11 17:02:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342093 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DCC6C4361B for ; Fri, 11 Dec 2020 18:33:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 731FA23EF5 for ; Fri, 11 Dec 2020 18:33:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393971AbgLKREO (ORCPT ); Fri, 11 Dec 2020 12:04:14 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:5324 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393576AbgLKRDw (ORCPT ); Fri, 11 Dec 2020 12:03:52 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 09:02:49 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 17:02:49 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 17:02:49 +0000 From: Sowjanya Komatineni To: , , , , , CC: , , , , Subject: [PATCH v4 03/13] media: tegra-video: Fix V4L2 pixel format RGB and YUV Date: Fri, 11 Dec 2020 09:02:32 -0800 Message-ID: <1607706162-1548-4-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> References: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607706170; bh=imcyi/Wf5bWSKWY3rp4OOsZll/aHA+UXIksKEb6CDQY=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=aBicalSEA11LNNKZFXiYpkLT0K99Wd8ij7bmTA8MgcxBd13Dhkj3NwByl6tP3Nz6b I3XlADhMOZrPQfrVyM+i7oCYO6F5empL0t0DZzuzKYCZnAqhTKPyqDRDX6V3eI7ah0 hhpZWKBDgB157Qywvgf0hVja5vo/8JnwBEfvB3WnSPb5cgGk/rXFgKZ9C9N56RnGY+ cNWr7IxaXoPldNi8J34UJ2tQy8W1Q2tV4UvGPempy0jLe3KToiEJJvaRY2eUliZIDT 8PeMXmiUK/HveLLLLTMeMdejq4LhXjENShLexQRYLvyKUEpAXAf1fwSpI308vVMT75 QshyQMC/yvkIA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org V4L2 pixel format is incorrect for RGB and YUV formats. This patch fixes it. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/tegra210.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index 6b23aa7..68f09e4 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -619,19 +619,19 @@ static const struct tegra_video_format tegra210_video_formats[] = { TEGRA210_VIDEO_FMT(RAW12, 12, SGBRG12_1X12, 2, T_R16_I, SGBRG12), TEGRA210_VIDEO_FMT(RAW12, 12, SBGGR12_1X12, 2, T_R16_I, SBGGR12), /* RGB888 */ - TEGRA210_VIDEO_FMT(RGB888, 24, RGB888_1X24, 4, T_A8R8G8B8, RGB24), + TEGRA210_VIDEO_FMT(RGB888, 24, RGB888_1X24, 4, T_A8R8G8B8, XBGR32), TEGRA210_VIDEO_FMT(RGB888, 24, RGB888_1X32_PADHI, 4, T_A8B8G8R8, - XBGR32), + RGBX32), /* YUV422 */ - TEGRA210_VIDEO_FMT(YUV422_8, 16, UYVY8_1X16, 2, T_U8_Y8__V8_Y8, UYVY), - TEGRA210_VIDEO_FMT(YUV422_8, 16, VYUY8_1X16, 2, T_V8_Y8__U8_Y8, VYUY), - TEGRA210_VIDEO_FMT(YUV422_8, 16, YUYV8_1X16, 2, T_Y8_U8__Y8_V8, YUYV), - TEGRA210_VIDEO_FMT(YUV422_8, 16, YVYU8_1X16, 2, T_Y8_V8__Y8_U8, YVYU), + TEGRA210_VIDEO_FMT(YUV422_8, 16, UYVY8_1X16, 2, T_U8_Y8__V8_Y8, YVYU), + TEGRA210_VIDEO_FMT(YUV422_8, 16, VYUY8_1X16, 2, T_V8_Y8__U8_Y8, YUYV), + TEGRA210_VIDEO_FMT(YUV422_8, 16, YUYV8_1X16, 2, T_Y8_U8__Y8_V8, VYUY), + TEGRA210_VIDEO_FMT(YUV422_8, 16, YVYU8_1X16, 2, T_Y8_V8__Y8_U8, UYVY), TEGRA210_VIDEO_FMT(YUV422_8, 16, UYVY8_1X16, 1, T_Y8__V8U8_N422, NV16), - TEGRA210_VIDEO_FMT(YUV422_8, 16, UYVY8_2X8, 2, T_U8_Y8__V8_Y8, UYVY), - TEGRA210_VIDEO_FMT(YUV422_8, 16, VYUY8_2X8, 2, T_V8_Y8__U8_Y8, VYUY), - TEGRA210_VIDEO_FMT(YUV422_8, 16, YUYV8_2X8, 2, T_Y8_U8__Y8_V8, YUYV), - TEGRA210_VIDEO_FMT(YUV422_8, 16, YVYU8_2X8, 2, T_Y8_V8__Y8_U8, YVYU), + TEGRA210_VIDEO_FMT(YUV422_8, 16, UYVY8_2X8, 2, T_U8_Y8__V8_Y8, YVYU), + TEGRA210_VIDEO_FMT(YUV422_8, 16, VYUY8_2X8, 2, T_V8_Y8__U8_Y8, YUYV), + TEGRA210_VIDEO_FMT(YUV422_8, 16, YUYV8_2X8, 2, T_Y8_U8__Y8_V8, VYUY), + TEGRA210_VIDEO_FMT(YUV422_8, 16, YVYU8_2X8, 2, T_Y8_V8__Y8_U8, UYVY), }; /* Tegra210 VI operations */ From patchwork Fri Dec 11 17:02:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342089 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0328C433FE for ; Fri, 11 Dec 2020 18:45:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AEA2423F29 for ; Fri, 11 Dec 2020 18:45:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405444AbgLKREv (ORCPT ); Fri, 11 Dec 2020 12:04:51 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:5363 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393715AbgLKREM (ORCPT ); Fri, 11 Dec 2020 12:04:12 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 09:02:53 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 17:02:52 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 17:02:52 +0000 From: Sowjanya Komatineni To: , , , , , CC: , , , , Subject: [PATCH v4 08/13] media: tegra-video: Add support for V4L2_EVENT_SOURCE_CHANGE Date: Fri, 11 Dec 2020 09:02:37 -0800 Message-ID: <1607706162-1548-9-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> References: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607706173; bh=N2+onGn+P/wtgXxXpkvV3u/wLb5I44E5LjNI+JkjEcA=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=Mq44NvMg21Pb6RMSTqJsz9FqOizTVvJsJAVTCDmlZ7ZYjjwVDvoXd3/Pa0yrm/Vj5 l76AmgKNh5/oacQx7ZudrlYUNKSBqYpL/PrZ8OSylMA+NtEE+g+d+BsxP5h9XUPKkh Dv0Xo1d51aIUc6f/WSnWv7pDhPLq2bBvN9c89GRBBL4G6WGSz+ZkZuIggRFUwHuIWB Fj3LarbKObTa1B/F9D5Yjfr0BKqV76GxvJtOv8QJTI+a3DPNoYiphfUHxRpTMX4jj6 sj/HrtySQhkFWDa7HBFIPeeKBbQdj8UqyEmyUFOOXRuBwrEbTSsWYWMvSJ6T+yQ/50 ZbhHN5XEb2dxw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Current implementation uses v4l2_ctrl_subscribe_event() and this does not handle V4L2_EVENT_SOURCE_CHANGE. So, update driver to handle V4L2_EVENT_SOURCE_CHANGE. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/vi.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index c280117..0a85e52 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -642,6 +642,18 @@ static int tegra_channel_set_subdev_active_fmt(struct tegra_vi_channel *chan) return 0; } +static int +tegra_channel_subscribe_event(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub) +{ + switch (sub->type) { + case V4L2_EVENT_SOURCE_CHANGE: + return v4l2_event_subscribe(fh, sub, 4, NULL); + } + + return v4l2_ctrl_subscribe_event(fh, sub); +} + static int tegra_channel_g_selection(struct file *file, void *priv, struct v4l2_selection *sel) { @@ -904,7 +916,7 @@ static const struct v4l2_ioctl_ops tegra_channel_ioctl_ops = { .vidioc_expbuf = vb2_ioctl_expbuf, .vidioc_streamon = vb2_ioctl_streamon, .vidioc_streamoff = vb2_ioctl_streamoff, - .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_subscribe_event = tegra_channel_subscribe_event, .vidioc_unsubscribe_event = v4l2_event_unsubscribe, .vidioc_g_selection = tegra_channel_g_selection, .vidioc_s_selection = tegra_channel_s_selection, From patchwork Fri Dec 11 17:02:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5478C4361B for ; Fri, 11 Dec 2020 18:38:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7163323F2A for ; Fri, 11 Dec 2020 18:38:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405480AbgLKREv (ORCPT ); Fri, 11 Dec 2020 12:04:51 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:2531 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393748AbgLKREM (ORCPT ); Fri, 11 Dec 2020 12:04:12 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 09:02:54 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 17:02:54 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 17:02:53 +0000 From: Sowjanya Komatineni To: , , , , , CC: , , , , Subject: [PATCH v4 10/13] media: v4l2-fwnode: Update V4L2_FWNODE_CSI2_MAX_DATA_LANES to 8 Date: Fri, 11 Dec 2020 09:02:39 -0800 Message-ID: <1607706162-1548-11-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> References: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607706174; bh=T2kKcHbh237nA+bLfoyfA+byZop0LilULPGoxcKxFf4=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=hfdETD9cA7/O9qBR/62R03oztZy6DA1uEbRUNfV/p+dLUivHdvdT6vR0MmkeuQHp9 wCKbXZskM2AXdVLxDFDS1unHBILKs06rbabMTkMVSDP5+xToohggP57FMR1fsPCzFb qf8Hgh+WHDvPms3khlPV78dvDXps6S9LaZ1rPvCmY72kPAyrBXQb4SWOLuHf19+CQF z6Sh24p7DopoqRt/zvIGUVI5o+BDQZjlxm/DMbS+QJ1iRoTKk0Vg/m0k3K5rOqy1kP saqPq2T6WPsidhWk76KW8scfWYC4eXcPA61V3V84XruBTJJjjNK5c9jP2Srpc22jKi 5RxO/a91hsVMw== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some CSI2 receivers support 8 data lanes. So, this patch updates CSI2 maximum data lanes to be 8. Acked-by: Sakari Ailus Signed-off-by: Sowjanya Komatineni --- include/media/v4l2-fwnode.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h index 4e1f6e1d..92401c1 100644 --- a/include/media/v4l2-fwnode.h +++ b/include/media/v4l2-fwnode.h @@ -25,7 +25,7 @@ struct fwnode_handle; struct v4l2_async_notifier; struct v4l2_async_subdev; -#define V4L2_FWNODE_CSI2_MAX_DATA_LANES 4 +#define V4L2_FWNODE_CSI2_MAX_DATA_LANES 8 /** * struct v4l2_fwnode_bus_mipi_csi2 - MIPI CSI-2 bus data structure From patchwork Fri Dec 11 17:02:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342090 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46A97C4361B for ; Fri, 11 Dec 2020 18:43:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F21DE23EF3 for ; Fri, 11 Dec 2020 18:43:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2394185AbgLKRFN (ORCPT ); Fri, 11 Dec 2020 12:05:13 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:2576 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390394AbgLKREy (ORCPT ); Fri, 11 Dec 2020 12:04:54 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 09:02:58 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 17:02:54 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 17:02:54 +0000 From: Sowjanya Komatineni To: , , , , , CC: , , , , Subject: [PATCH v4 11/13] dt-bindings: tegra: Update csi data-lanes to maximum 8 lanes Date: Fri, 11 Dec 2020 09:02:40 -0800 Message-ID: <1607706162-1548-12-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> References: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607706178; bh=cEfNDFkS84iV8njM0C+tDfF6JjQAU3GjXx81Qy0pDmM=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=aVU7Q2v++NRGQKefT3v2rXvF4KUIxXQ+SIhHXNUMzfQs/M1VBDSinP6CfZxXGYys9 1a+p3BH6KKdLO0yegHl3epGrqb4PEES3EzLG3kev3dxzRsQ41L/R2HS5qsZCgbVL3D w5ihePVE9PhTk8jai0NCxYJz3P31oX1TnfMNduaujnD0GFFgUGx/LTOy+gx6hg4WAh 2h7if5pk4w4AjcAQwl2u3Cu0r1lhrqwyBdrMzoUrxHfbRGDhtfJdwPow7fsBPsrZeN VF0lO8oIGzFw6vMzhbJeczePU7/doI9S73WJNuAgjIwp+pQnOV5/0m9gKrV2KTjhGW rMERHl/LofAwA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Tegra VI/CSI hardware don't have native 8 lane CSI RX port. But x8 capture can be supported by using consecutive x4 ports simultaneously with HDMI-to-CSI bridges where source image is split on to two x4 ports. This patch updates dt-bindings for csi endpoint data-lane property with maximum of 8 lanes. Acked-by: Rob Herring Acked-by: Sakari Ailus Signed-off-by: Sowjanya Komatineni --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index 34d9933..8a6d3e1 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -111,8 +111,8 @@ of the following host1x client modules: endpoint (required node) Required properties: - - data-lanes: an array of data lane from 1 to 4. Valid array - lengths are 1/2/4. + - data-lanes: an array of data lane from 1 to 8. Valid array + lengths are 1/2/4/8. - remote-endpoint: phandle to sensor 'endpoint' node. port@1 (required node) From patchwork Fri Dec 11 17:02:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 342088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D533C433FE for ; Fri, 11 Dec 2020 18:46:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ED02C23F37 for ; Fri, 11 Dec 2020 18:46:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387640AbgLKREl (ORCPT ); Fri, 11 Dec 2020 12:04:41 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:2532 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393735AbgLKREN (ORCPT ); Fri, 11 Dec 2020 12:04:13 -0500 Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Fri, 11 Dec 2020 09:02:56 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 11 Dec 2020 17:02:56 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Fri, 11 Dec 2020 17:02:55 +0000 From: Sowjanya Komatineni To: , , , , , CC: , , , , Subject: [PATCH v4 13/13] media: tegra-video: Add custom V4L2 control V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY Date: Fri, 11 Dec 2020 09:02:42 -0800 Message-ID: <1607706162-1548-14-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> References: <1607706162-1548-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1607706176; bh=OZJ/8SCNM9zia5Uy6aq+c9fc5V1L/LcrVZqaCjqF0cQ=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:X-NVConfidentiality:MIME-Version:Content-Type; b=rM7GR58q6tG4hSul58c3J89afQQFafj4IJ8PG1D+E+kEEXRNjBTUlqq1PSMp9mQoh x+U/yU/TQwZnuVvDTHljVgTfMHmPd84OlxgGXu8fq+L1MHpKeA53TZicALPEDBz5iU edq0OtrpYEgv12+2UhfKPXL9of9IeMhTILv8TnExpMlHhLW35CgjXTdt6AQ+J3m6HJ fwxpcptTUNimoCiz4o68Jpgb6MqNZVCYwWG9i6j/1/r42p3eo2/N7Bz3WNxl/2KHD0 td5gOAqqh8YlEbiCXywfuJmCFrGuhCNzmR2xdG/Jbb2gX/EyL5l0qkXc/kk6RYPLGn Hr2cdUj7pm4NA== Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds custom V4L2 control for syncpt timeout retry to continue capture on error for specified retries count through this control. This is useful for HDMI-to-CSI bridge debug purposes like for hotplug scenarios or for ignoring captures till HDMI input is stabilized. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/tegra210.c | 10 +++++++++- drivers/staging/media/tegra-video/vi.c | 26 +++++++++++++++++++++++++- drivers/staging/media/tegra-video/vi.h | 4 ++++ 3 files changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index 063d0a3..f10a041 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -454,6 +454,7 @@ static int chan_capture_kthread_start(void *data) { struct tegra_vi_channel *chan = data; struct tegra_channel_buffer *buf; + unsigned int retries = 0; int err = 0; while (1) { @@ -483,8 +484,15 @@ static int chan_capture_kthread_start(void *data) spin_unlock(&chan->start_lock); err = tegra_channel_capture_frame(chan, buf); - if (err) + if (!err) { + retries = 0; + continue; + } + + if (retries++ > chan->syncpt_timeout_retry) vb2_queue_error(&chan->queue); + else + err = 0; } return 0; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 4773281..70e1e18 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -956,7 +956,6 @@ static const struct v4l2_file_operations tegra_channel_fops = { /* * V4L2 control operations */ -#if IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG) static int vi_s_ctrl(struct v4l2_ctrl *ctrl) { struct tegra_vi_channel *chan = container_of(ctrl->handler, @@ -968,6 +967,9 @@ static int vi_s_ctrl(struct v4l2_ctrl *ctrl) /* pattern change takes effect on next stream */ chan->pg_mode = ctrl->val + 1; break; + case V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY: + chan->syncpt_timeout_retry = ctrl->val; + break; default: return -EINVAL; } @@ -979,10 +981,22 @@ static const struct v4l2_ctrl_ops vi_ctrl_ops = { .s_ctrl = vi_s_ctrl, }; +#if IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG) static const char *const vi_pattern_strings[] = { "Black/White Direct Mode", "Color Patch Mode", }; +#else +static const struct v4l2_ctrl_config syncpt_timeout_ctrl = { + .ops = &vi_ctrl_ops, + .id = V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY, + .name = "Syncpt timeout retry", + .type = V4L2_CTRL_TYPE_INTEGER, + .min = 1, + .max = 10000, + .step = 1, + .def = 5, +}; #endif static int tegra_channel_setup_ctrl_handler(struct tegra_vi_channel *chan) @@ -1004,6 +1018,16 @@ static int tegra_channel_setup_ctrl_handler(struct tegra_vi_channel *chan) #else struct v4l2_subdev *subdev; + /* custom control */ + v4l2_ctrl_new_custom(&chan->ctrl_handler, &syncpt_timeout_ctrl, NULL); + if (chan->ctrl_handler.error) { + dev_err(chan->vi->dev, "failed to add %s ctrl handler: %d\n", + syncpt_timeout_ctrl.name, + chan->ctrl_handler.error); + v4l2_ctrl_handler_free(&chan->ctrl_handler); + return chan->ctrl_handler.error; + } + subdev = tegra_channel_get_remote_source_subdev(chan); if (!subdev) return -ENODEV; diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 27061a5..a68e2c0 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -23,6 +23,8 @@ #include "csi.h" +#define V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY (V4L2_CTRL_CLASS_CAMERA | 0x1001) + #define TEGRA_MIN_WIDTH 32U #define TEGRA_MAX_WIDTH 32768U #define TEGRA_MIN_HEIGHT 32U @@ -160,6 +162,7 @@ struct tegra_vi_graph_entity { * @of_node: device node of VI channel * * @ctrl_handler: V4L2 control handler of this video channel + * @syncpt_timeout_retry: syncpt timeout retry count for the capture * @fmts_bitmap: a bitmap for supported formats matching v4l2 subdev formats * @tpg_fmts_bitmap: a bitmap for supported TPG formats * @pg_mode: test pattern generator mode (disabled/direct/patch) @@ -201,6 +204,7 @@ struct tegra_vi_channel { struct device_node *of_node; struct v4l2_ctrl_handler ctrl_handler; + unsigned int syncpt_timeout_retry; DECLARE_BITMAP(fmts_bitmap, MAX_FORMAT_NUM); DECLARE_BITMAP(tpg_fmts_bitmap, MAX_FORMAT_NUM); enum tegra_vi_pg_mode pg_mode;