From patchwork Thu Dec 10 13:07:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 341041 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5512433jai; Thu, 10 Dec 2020 05:09:15 -0800 (PST) X-Google-Smtp-Source: ABdhPJyWYUKOTCswnLpKZ640bT2d5rDZupugzN8SyQZxYBQ9wqRgvDVZfnNvMGF+Ec9V5/DNXJ24 X-Received: by 2002:a17:906:cce9:: with SMTP id ot41mr6479916ejb.46.1607605754934; Thu, 10 Dec 2020 05:09:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607605754; cv=none; d=google.com; s=arc-20160816; b=Z7OcCHB/wd14SPN9i6bhgj2jJVu1QHeZObjdl9v1C4u+Nh5oS5wGHXqdPi00HjV8N8 5CmTjxhQXSnnE3k+CmgQAWZG5l8z5lYtegWA2/K4xuxOK91gSFX9gMiU7davsmvIRKC9 4PB0ifhGCfYLVF08wSU5+8uLGD/T8kwWmTOgySTLygVtErI9U4yBv/gev5oKqk3DsHkh L6oqsKfDGZ7KyeS3M0HAs8ufAEHi1ZwmyPvHkW1k2BwNoUkqgEJmCQZCdRmjkuAppOQ/ L2YggDLYXG2n8qMEPDDvf98b+e8tuXwH1lK0+usU0C2co/hvMP004wY2Uq/cu9ozPg65 96jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=jGh02B5M1rvfYl69hvxasPDk9iriEgMEUYJWXaLhXmQ=; b=tAn2BhOnS2Hi9yQixe7Bx16X9DAa9pPnCyuiaQUoAldyA+oQzWHcArj57R6pkvhN8h f40NYalQ/Osm51bE+E6rMGM+ItU+XtDwWQ4eiv3jzdzond40KfkNy4ePR8WFsI7HfzJ3 hO3XMpy7pkNQOpmJOg/cgKrlnWslspg2R2xEMUMZxRjK7LmC3IDqPgNBpyXSqxlMCuoO cvkDt5R2R/chIrPZhklA8DPi0N5Ue9FQLsrecSn97bZGswc9Dlwi56B0JRr+om/WoX65 6Zpv9VdgVlxU+rP3wiFmy6ntD9ZJVyDdHeEunvymhRo5YR8/0LlFELfmEmQjZdGPZiEY vOvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PDNtYN1w; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z14si2690900edr.470.2020.12.10.05.09.14; Thu, 10 Dec 2020 05:09:14 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PDNtYN1w; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388523AbgLJNJC (ORCPT + 6 others); Thu, 10 Dec 2020 08:09:02 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39664 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726439AbgLJNI4 (ORCPT ); Thu, 10 Dec 2020 08:08:56 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD83CS060378; Thu, 10 Dec 2020 07:08:03 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607605683; bh=jGh02B5M1rvfYl69hvxasPDk9iriEgMEUYJWXaLhXmQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PDNtYN1wcAjHtZQhWHl0rG2EmiXeqM2SLHyrQSm5Briva2uZ0Ea3v5GSNR9uNPoBw 7f0VSO5RnQtsBCploLTAHvmQ2GEgWB9r8F0TZUyTtHoBbGyTl0GCb9GTQlDjYsMiRS h3+HnZezuMLDOglnZRXEGTHWvBMUE0M12LGX72zU= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BAD82JL043236 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Dec 2020 07:08:03 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Dec 2020 07:08:02 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Dec 2020 07:08:02 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD7rag098988; Thu, 10 Dec 2020 07:07:59 -0600 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon , Rob Herring , Kishon Vijay Abraham I CC: , , Subject: [PATCH v2 1/6] arm64: dts: ti: k3-j721e-main: Fix supported max outbound regions Date: Thu, 10 Dec 2020 18:37:42 +0530 Message-ID: <20201210130747.25436-2-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201210130747.25436-1-kishon@ti.com> References: <20201210130747.25436-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Cadence IP in J721E supports a maximum of 32 outbound regions. However commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") incorrectly added this as 16 outbound regions. Now that "cdns,max-outbound-regions" is an optional property with default value as 32, remove "cdns,max-outbound-regions" from endpoint DT node. Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") Signed-off-by: Kishon Vijay Abraham I --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 ---- 1 file changed, 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index b32df591c766..1c11da612c67 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -651,7 +651,6 @@ power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 239 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent; @@ -700,7 +699,6 @@ power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 240 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent; @@ -749,7 +747,6 @@ power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 241 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent; @@ -798,7 +795,6 @@ power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 242 1>; clock-names = "fck"; - cdns,max-outbound-regions = <16>; max-functions = /bits/ 8 <6>; max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>; dma-coherent; From patchwork Thu Dec 10 13:07:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 341042 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5513556jai; Thu, 10 Dec 2020 05:10:41 -0800 (PST) X-Google-Smtp-Source: ABdhPJzQ3jt8Web2Ep6WcT0BJjMTI+zn9Vtt2aI4Jyi6dyqzvNZE0hKlch7yunDuFiUuoJQgeKcv X-Received: by 2002:a50:d74c:: with SMTP id i12mr6658215edj.236.1607605841206; Thu, 10 Dec 2020 05:10:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607605841; cv=none; d=google.com; s=arc-20160816; b=gSMrxMDq73qXNp829WraoJJW6M/iYyUtJak7EJc0/SowEPCWC1/c/uYFMlT1K04ZgG BKtB+3FNfx29tQR4I1aQb+FpC46l99gzquV72uu0aUPUbODgT6tK0NHB/HhObFIc1kke 57OAioxHPgczHauB91E1UEHdwnlRHSTe5Q+pJE961bnYII8GsUttrB0LUFcvI38f9pQ8 J8sUWWaCdy5R+SRVBCGDi/ipfK+LVKTF6eltBORqvCyRApkcbMBbsrEskwRtBhDFtcu4 9ra4YwxTvh//q6Yg4RZfq5owTCJI7JfLZCcY/7rGy5DkMgRw3MpvZRlW9P76lP/dvqc3 TXMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=lH1IwpnnOjZmwF8k9RePKE8rDB2DJOszN7HCS1PLkvQ=; b=hZ8SqAfOFQjbmRXyyTvTEfYHe+xdk7eW+l6Bb1PM3InMbXnW6juQu/3IVuMs7h0Nlc 338SQTrdpTXMQg83SZeeD7s/igBIvgTrc5QbDcNZAea7d3J5kUntdGj4YpUDlB4YADK/ fOmip0q0p6CkshUDKOgvIC1z3ehKVR3HhWt9yj15ZbiTpnBY+wRvOW7pBpHu6TZB8WtN yRMenawdGHyqqfsniUFeeVUCT2Ef0fXKMHG3lkijDGUcK3ujCS33aSjFY7b02H76lR+x 7OTw+HKJ/+nSyuDUjhekrAS0lEGi5hzxv8ehRR9g7z9o7W+CwlvqBcATg++ByqU2hExQ n/kA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="QQZa/4Zo"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m10si2608734eja.453.2020.12.10.05.10.41; Thu, 10 Dec 2020 05:10:41 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="QQZa/4Zo"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733307AbgLJNJy (ORCPT + 6 others); Thu, 10 Dec 2020 08:09:54 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39678 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388945AbgLJNJq (ORCPT ); Thu, 10 Dec 2020 08:09:46 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD87m4060397; Thu, 10 Dec 2020 07:08:07 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607605687; bh=lH1IwpnnOjZmwF8k9RePKE8rDB2DJOszN7HCS1PLkvQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QQZa/4Zo9sEJiCQp55UJz/DTplKyAZv9sW4WPMwxBTrqSQ2Ve2PuFTnmljXB1s7oj yTE8frhiv6vVoXQPr/ijmo5ARb5yHj6oq4FB4RGO/au/wpJ0TK2qViTqoFeKNXQvG8 vEOt559965n5a+Qo1JVMbTCuyRvqDDfzNFVSgbnU= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BAD87iS118247 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Dec 2020 07:08:07 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Dec 2020 07:08:07 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Dec 2020 07:08:07 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD7rah098988; Thu, 10 Dec 2020 07:08:04 -0600 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon , Rob Herring , Kishon Vijay Abraham I CC: , , Subject: [PATCH v2 2/6] arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for pcieX_ctrl Date: Thu, 10 Dec 2020 18:37:43 +0530 Message-ID: <20201210130747.25436-3-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201210130747.25436-1-kishon@ti.com> References: <20201210130747.25436-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove "syscon" nodes added for pcieX_ctrl and have the PCIe node point to the parent with an offset argument. This change is as discussed in [1] [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes") Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Rob Herring --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 48 ++++------------------- 1 file changed, 8 insertions(+), 40 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 1c11da612c67..2d526ea44a85 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -28,38 +28,6 @@ #size-cells = <1>; ranges = <0x0 0x0 0x00100000 0x1c000>; - pcie0_ctrl: syscon@4070 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00004070 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x4070 0x4070 0x4>; - }; - - pcie1_ctrl: syscon@4074 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00004074 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x4074 0x4074 0x4>; - }; - - pcie2_ctrl: syscon@4078 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x00004078 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x4078 0x4078 0x4>; - }; - - pcie3_ctrl: syscon@407c { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x0000407c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x407c 0x407c 0x4>; - }; - serdes_ln_ctrl: mux@4080 { compatible = "mmio-mux"; reg = <0x00004080 0x50>; @@ -618,7 +586,7 @@ interrupt-names = "link_state"; interrupts = ; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie0_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4070>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; @@ -645,7 +613,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = ; - ti,syscon-pcie-ctrl = <&pcie0_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4070>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; @@ -666,7 +634,7 @@ interrupt-names = "link_state"; interrupts = ; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie1_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; @@ -693,7 +661,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = ; - ti,syscon-pcie-ctrl = <&pcie1_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; @@ -714,7 +682,7 @@ interrupt-names = "link_state"; interrupts = ; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie2_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4078>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; @@ -741,7 +709,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = ; - ti,syscon-pcie-ctrl = <&pcie2_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x4078>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; @@ -762,7 +730,7 @@ interrupt-names = "link_state"; interrupts = ; device_type = "pci"; - ti,syscon-pcie-ctrl = <&pcie3_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x407c>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; @@ -789,7 +757,7 @@ reg-names = "intd_cfg", "user_cfg", "reg", "mem"; interrupt-names = "link_state"; interrupts = ; - ti,syscon-pcie-ctrl = <&pcie3_ctrl>; + ti,syscon-pcie-ctrl = <&scm_conf 0x407c>; max-link-speed = <3>; num-lanes = <2>; power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; From patchwork Thu Dec 10 13:07:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 341043 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5513560jai; Thu, 10 Dec 2020 05:10:41 -0800 (PST) X-Google-Smtp-Source: ABdhPJw7pD9OcrxZoXLuggzFQYbccfwZJ99JGwpr0+sOWRe8maPw9urDqqswKolh3NxkNBo7GRnv X-Received: by 2002:a17:906:60d4:: with SMTP id f20mr6521917ejk.156.1607605841554; Thu, 10 Dec 2020 05:10:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607605841; cv=none; d=google.com; s=arc-20160816; b=PMK7hs4iEbRFsDwaZayVUrTpHdut2OPwClGHGMj2BhzEdbli3a4KQEsoG2a0Xt4Dq5 +N90j9Nv8loDQ7MOIps7oyIVJHFHL8WQMMNCEPZc4N6UAtBC83Dny06avZLHoOayJsQX lKjaD7IvV77+4VOUeP6PrVn5V2ikR6JCD1ZxwtmsiE1Zx6lJRIblK8u9loQaE2esgLt8 OCOyA0eAzrCRrHBnV2o/Qrn9XWiKsy3Rdyl652RJAFsGmaB6BWF9UQ6g069+29be8jwL evCDhgWZXIXnvrJC5PixEV8mfTzr52k7RdEuXpX/RNcCsgw9NsluMA0dPD/Wiu9N7cGg y4dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=syVIG7vsUIv2CSv7+0oqv+2xb8IcK/qDwSTOzju6pE8=; b=g4FQxyTpDwF7MlYtSxQmlhsaVo6WL162dER/S5RAuZhfrtR94D9vsNMUo6F1cJXv0p ReCdLkvd1lOXc7mkWE53IX0eIDKBav9WsLD2k49TwP//x+fro3PH5IXkDYiXtpuymm9c mTKzofuFrLMJAlpEU6em8ZHIMqeIJ/1ap2BWS6ROk+KjcIlQpGir0ikYiGvdVIH3qlRX cwDb1wM5aTSe2SSsvG+OXY8qub8iirE1X5gGs24nl251p2yen5BWcBx3Z7KEuhe0hCDx coNglSWL/n3rHpowfms//AeK6xMxdmRlbx9hsw/qAdpwiWFBcN6NasnMkMu9RmHkOC5a 9tnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=lXE0dlYM; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m10si2608734eja.453.2020.12.10.05.10.41; Thu, 10 Dec 2020 05:10:41 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=lXE0dlYM; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388990AbgLJNJ7 (ORCPT + 6 others); Thu, 10 Dec 2020 08:09:59 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49894 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388978AbgLJNJv (ORCPT ); Thu, 10 Dec 2020 08:09:51 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD8CRY053012; Thu, 10 Dec 2020 07:08:12 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607605692; bh=syVIG7vsUIv2CSv7+0oqv+2xb8IcK/qDwSTOzju6pE8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lXE0dlYMlo7BExPaUoUsCMpjB/TVjVkdrxw9RECN9uL3yIK9rrDS08hv9TU/pXzeY uQ3HcE0UdAw+zFpZIi9F2tYFMaICL0uWIrv8m4XMnlm3A/4dB3L+SwDNvhKsSmt/QN 1vRK/D2JV/cTISpb4ASgjzrK3bbqqPHHFuYsTpsY= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BAD8Cio004005 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Dec 2020 07:08:12 -0600 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Dec 2020 07:08:12 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Dec 2020 07:08:12 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD7rai098988; Thu, 10 Dec 2020 07:08:07 -0600 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon , Rob Herring , Kishon Vijay Abraham I CC: , , Subject: [PATCH v2 3/6] arm64: dts: ti: k3-j7200-main: Add DT for WIZ and SERDES Date: Thu, 10 Dec 2020 18:37:44 +0530 Message-ID: <20201210130747.25436-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201210130747.25436-1-kishon@ti.com> References: <20201210130747.25436-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dt node for the single instance of WIZ and SERDES module shared by PCIe, CPSW (SGMII/QSGMII) and USB. Signed-off-by: Kishon Vijay Abraham I --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 61 +++++++++++++++++++++++ 1 file changed, 61 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index b0094212aa82..ae5abf59a7d4 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -531,6 +531,67 @@ dma-coherent; }; + serdes_refclk: serdes_refclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + serdes_wiz0: wiz@5060000 { + compatible = "ti,j721e-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 292 11>, <&k3_clks 292 85>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "ext_ref_clk"; + num-lanes = <4>; + #reset-cells = <1>; + ranges = <0x5060000 0x0 0x5060000 0x10000>; + + assigned-clocks = <&k3_clks 292 85>; + assigned-clock-parents = <&k3_clks 292 89>; + + wiz0_pll0_refclk: pll0-refclk { + clocks = <&k3_clks 292 85>, <&serdes_refclk>; + clock-output-names = "wiz0_pll0_refclk"; + #clock-cells = <0>; + assigned-clocks = <&wiz0_pll0_refclk>; + assigned-clock-parents = <&k3_clks 292 85>; + }; + + wiz0_pll1_refclk: pll1-refclk { + clocks = <&k3_clks 292 85>, <&serdes_refclk>; + clock-output-names = "wiz0_pll1_refclk"; + #clock-cells = <0>; + assigned-clocks = <&wiz0_pll1_refclk>; + assigned-clock-parents = <&k3_clks 292 85>; + }; + + wiz0_refclk_dig: refclk-dig { + clocks = <&k3_clks 292 85>, <&serdes_refclk>; + clock-output-names = "wiz0_refclk_dig"; + #clock-cells = <0>; + assigned-clocks = <&wiz0_refclk_dig>; + assigned-clock-parents = <&k3_clks 292 85>; + }; + + wiz0_cmn_refclk_dig_div: cmn-refclk-dig-div { + clocks = <&wiz0_refclk_dig>; + #clock-cells = <0>; + }; + + serdes0: serdes@5060000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05060000 0x00010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz0 0>; + reset-names = "torrent_reset"; + clocks = <&wiz0_pll0_refclk>; + clock-names = "refclk"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + usbss0: cdns-usb@4104000 { compatible = "ti,j721e-usb"; reg = <0x00 0x4104000 0x00 0x100>; From patchwork Thu Dec 10 13:07:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 341045 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5515840jai; Thu, 10 Dec 2020 05:13:31 -0800 (PST) X-Google-Smtp-Source: ABdhPJymjdxAI9AyVhHIMlnrqChug71MNCFzBG51eCVm8T1mQKg6xJz2AUAQHq05k7ZHrQydyy6j X-Received: by 2002:aa7:c603:: with SMTP id h3mr6753386edq.254.1607606011848; Thu, 10 Dec 2020 05:13:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607606011; cv=none; d=google.com; s=arc-20160816; b=EeTF39/b+ktji4QDTP2IC7zsZ4woWqLskPfLEF5vR3KUtUn5nYssK/eZbC3TBXy74h UnW74VJk8WLENdAPTPq6dlUkW3PrypSn/g0vckKIQWpDPZKeNUkKhaJ8tLTVyOh7xYak YTBnvuu1F3m1SHvXV2GujjVbiCFNB4OLE7wtWPaI1hgkIPWJIagyaRhvnj5daIzqPlz1 Rp2IrKAIDXBqqO6ZvHggrEfynlqGee78YeJwMuYLBAY/02FpaI8p4l8ZRFH258AIVRCz GwM5g/y1E6tIGPS5trF1i+6ydHUmkaIu2KnoqcRpjcNV/J0f1xnG3h8qGmA9zOMAGDGO dGDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=qxK0/yXQ7jP0IAinp3edU0GgnsbbtqJKWvBEnd2pD1A=; b=I9cf+Z+LLBrXJUdihduOqtUgZ6zk++AV2hHZKwLLpIwEaqbvY20sQ7/0Z2S1v/5Ekf CiT4RDiWurJukgxCKIkGvRtbjcSaGTz6LPZGc4vpVyWolAk4+QFQ0DZsV32ewfwTmfP4 WF5d6WCk7/ilCKXY+x5zZ0GMCRCNS9Hqbk0dXIcNcru2+grKAUq56BnJ/wZOeBgGHz/U /QbHQNlJXa6ZEI882Lw2auP7ErsLwg4+DIDwWsZki/RCCifL4KHeui4W5QGan9YL1tsf pisR+Kcvuj5enKDgWUx+TZ2v6TvgIuRC+Bks6Uc5q+dS9XCLH5xYxSf6GiX5PPgo+gPQ Z8/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=izTh3M56; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l2si2663639ede.232.2020.12.10.05.13.31; Thu, 10 Dec 2020 05:13:31 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=izTh3M56; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732652AbgLJNMq (ORCPT + 6 others); Thu, 10 Dec 2020 08:12:46 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49904 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388740AbgLJNJ7 (ORCPT ); Thu, 10 Dec 2020 08:09:59 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD8KpN053137; Thu, 10 Dec 2020 07:08:20 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607605700; bh=qxK0/yXQ7jP0IAinp3edU0GgnsbbtqJKWvBEnd2pD1A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=izTh3M56I6EVmn98Tgmzj5pxlkRWyD6wxz1izdUNIHQjtL08NG5ZkzG0LoPYYOzFI WWJb9QidEfxUiUYFOZzeioagfIAmJjn8f1BSgRfBLVy63TPRiBXVB9VMCqVg1hXaUm bGisKJ9eEbEr6lu6Lc/QhCr4ytV/s/bVaEGNabRk= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BAD8KYQ118599 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Dec 2020 07:08:20 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Dec 2020 07:08:20 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Dec 2020 07:08:20 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD7raj098988; Thu, 10 Dec 2020 07:08:14 -0600 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon , Rob Herring , Kishon Vijay Abraham I CC: , , Subject: [PATCH v2 4/6] arm64: dts: ti: k3-j7200-main: Add PCIe device tree node Date: Thu, 10 Dec 2020 18:37:45 +0530 Message-ID: <20201210130747.25436-5-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201210130747.25436-1-kishon@ti.com> References: <20201210130747.25436-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add PCIe device tree node (both RC and EP) for the single PCIe instance present in j7200. Signed-off-by: Kishon Vijay Abraham I --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 48 +++++++++++++++++++++++ 1 file changed, 48 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index ae5abf59a7d4..819aa1fc306b 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -592,6 +592,54 @@ }; }; + pcie1_rc: pcie@2910000 { + compatible = "ti,j7200-pcie-host", "ti,j721e-pcie-host"; + reg = <0x00 0x02910000 0x00 0x1000>, + <0x00 0x02917000 0x00 0x400>, + <0x00 0x0d800000 0x00 0x00800000>, + <0x00 0x18000000 0x00 0x00001000>; + reg-names = "intd_cfg", "user_cfg", "reg", "cfg"; + interrupt-names = "link_state"; + interrupts = ; + device_type = "pci"; + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; + max-link-speed = <3>; + num-lanes = <4>; + power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 240 6>; + clock-names = "fck"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xf>; + cdns,no-bar-match-nbits = <64>; + vendor-id = /bits/ 16 <0x104c>; + device-id = /bits/ 16 <0xb00f>; + msi-map = <0x0 &gic_its 0x0 0x10000>; + dma-coherent; + ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>, + <0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>; + dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; + }; + + pcie1_ep: pcie-ep@2910000 { + compatible = "ti,j7200-pcie-ep", "ti,j721e-pcie-ep"; + reg = <0x00 0x02910000 0x00 0x1000>, + <0x00 0x02917000 0x00 0x400>, + <0x00 0x0d800000 0x00 0x00800000>, + <0x00 0x18000000 0x00 0x08000000>; + reg-names = "intd_cfg", "user_cfg", "reg", "mem"; + interrupt-names = "link_state"; + interrupts = ; + ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; + max-link-speed = <3>; + num-lanes = <4>; + power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 240 6>; + clock-names = "fck"; + max-functions = /bits/ 8 <6>; + dma-coherent; + }; + usbss0: cdns-usb@4104000 { compatible = "ti,j721e-usb"; reg = <0x00 0x4104000 0x00 0x100>; From patchwork Thu Dec 10 13:07:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 341046 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5515835jai; Thu, 10 Dec 2020 05:13:31 -0800 (PST) X-Google-Smtp-Source: ABdhPJwLT1KwaeICbBubBkfskS8EGTp1YcGncCaYRB9eKm4V/GNDX+c4ROtNUuXnYGgKP3BL0OlC X-Received: by 2002:a17:906:5213:: with SMTP id g19mr2748394ejm.383.1607606011479; Thu, 10 Dec 2020 05:13:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607606011; cv=none; d=google.com; s=arc-20160816; b=lnyTE/YCy5ks4IbcBrmfTPhIaM7rR2JQBZqdb5/KyGc015juItWPhWQ67VqCLnTymd 97ony1LwQMRcvs8bij3UEx2Z39YMTRCyiofrwKZNJuWx7x0yRzEQocDYzCEEB0IjHkvK 0cgdiLPIhlGrWVanf1fn89CpcBxMuVbBUGn3jSkjngMBS8pjnfaXPwriiqWrvfVeB5k3 dGd5RycW82Y6jlBkRMx4PuoegCJngInHYZqqKnGWdkH/qEGr8hN7tN8mY5Nu+tHiTtOQ 75BLGfnlThl+LRx67XFfqeE+LSFWZPh9oO9Of7RD3ZdgDndeSdKronA978xoSzaJabJ2 SxWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=TCT4o2ep6cw3Hu4jevsOOwo8iY51in45dTp+iGuuPKs=; b=rcXNzBMVX9rAsM0b40DfS2LDQJ+hRa27Jv/EnbQqGfFlr39T0/p4rAeizJD0eZ3Ot9 F3EdxelQgwHnqQqbZzz+Zfn87SCa3UVcQENXFASVvq/51oFJsxI2v+BhlTTa70AFBB87 RMB44FLt/DF//tKhfwh3Hii2Erxba3Q4pK4cg+54aEuzqbMippLvA8XcPZzUPAFm5ftE cnLvfQtP9h1/wJEDVdwHj2LJa+Y+GdahzgQQ5WROH34PgybSeVsy6r+mvstY220uLmmW NlFyKVXIcOHxRCb2bRuAZ3kVOBVEWGxDUuNza01+BTGZ2dZvR8sGt5NWgoOiFODVwAty LIGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=A4DlwS+b; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l2si2663639ede.232.2020.12.10.05.13.31; Thu, 10 Dec 2020 05:13:31 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=A4DlwS+b; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389076AbgLJNKZ (ORCPT + 6 others); Thu, 10 Dec 2020 08:10:25 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49922 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388184AbgLJNKE (ORCPT ); Thu, 10 Dec 2020 08:10:04 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD8PLO053153; Thu, 10 Dec 2020 07:08:25 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607605705; bh=TCT4o2ep6cw3Hu4jevsOOwo8iY51in45dTp+iGuuPKs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=A4DlwS+b7ungpetVIM7WDtIVVL49FwInQLHseUNAkpt1L5OYouWr0QDkbM07CC4ox 5VtvBE3KLrNoeTOHi6N4CL0tS1qqHN+qjkyER0vv/27gcGU/1ytcDnyQN5xgL4Tdm3 AYvOWM7ElNf4Rn+yJRnOF4eF8YTPLnJ3i9cWy2nA= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BAD8PNe094229 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Dec 2020 07:08:25 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Dec 2020 07:08:25 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Dec 2020 07:08:25 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD7rak098988; Thu, 10 Dec 2020 07:08:22 -0600 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon , Rob Herring , Kishon Vijay Abraham I CC: , , Subject: [PATCH v2 5/6] arm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0 Date: Thu, 10 Dec 2020 18:37:46 +0530 Message-ID: <20201210130747.25436-6-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201210130747.25436-1-kishon@ti.com> References: <20201210130747.25436-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add sub-nodes to SERDES0 DT node to represent SERDES0 is connected to PCIe and QSGMII (multi-link SERDES). Signed-off-by: Kishon Vijay Abraham I --- .../dts/ti/k3-j7200-common-proc-board.dts | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 331b388e1d1b..def98f563336 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -8,6 +8,7 @@ #include "k3-j7200-som-p0.dtsi" #include #include +#include / { chosen { @@ -218,3 +219,25 @@ ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; + +&serdes_refclk { + clock-frequency = <100000000>; +}; + +&serdes0 { + serdes0_pcie_link: phy@0 { + reg = <0>; + cdns,num-lanes = <2>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + }; + + serdes0_qsgmii_link: phy@1 { + reg = <2>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz0 3>; + }; +}; From patchwork Thu Dec 10 13:07:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 341044 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5513572jai; Thu, 10 Dec 2020 05:10:42 -0800 (PST) X-Google-Smtp-Source: ABdhPJw+J/y0oEggqdxwitwk3eihV61yYxHw3RR5cWGN0hIFtFYZ12UABfNeq7jaqcFlGZiEDDf2 X-Received: by 2002:a17:906:1102:: with SMTP id h2mr6307673eja.296.1607605842350; Thu, 10 Dec 2020 05:10:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607605842; cv=none; d=google.com; s=arc-20160816; b=vMjJRI64Q5jMmkiN5kQoxl+LjeQVL3JY6FAU1EBwpSOi4isRXQVchcRWfHxv8tRQHO gMaSu1XZUhLFTadkoZZUXsKb0+6pqEuwyUvs+HzmJ+fBSec4eHBYimlb0bFaRuCuwZkP J2KOoLabHloJxc9v3I4ikTwVnm4SKUTJgIeBNliPxlZpYFkgxhn0lLiXRhjcvst/mPe3 ei2zrTFUXfN+96Z1Z/vHLYA9aCsv0IX0KMVtmhpzyMU4GPIwy7jNGEjiYr9tavgAx6oT 2gTXY/V4vdlEYkc9o2oJpzJqQAAxxAWY5hfQ281ejMt8ndjmBN/7PC8yvYy9UDPQ2QsS Xmxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=v8DeDg+aSnj9XDWh6SjoEmvU220d2QLKrD8S48HIXT4=; b=GmjiIhSAQmeF8sReM9jwBpmuNXcj8wz+PSpV7gj7XKUjgilW8YI+WBsSv9MleiKwqI +1IKAwmUUl0C8yl/KLaEOa2+UaY7Fre2Ka1K6f5rKHJRE8ctmL7Z3TAjvOtsYpAiwikJ 5JXGsgtojymrS9FYWCEr8edQ2tS+erGnwDS9y4BTSrmxTKEdQeA42kCLnyTELH6xl2oe pd3/qmvCdmt6G4pWVxxT0O/h/zYjcUiqD8hPD5Jcx/VQrmFHsCnIpOABL28zJgdmw/CB ijheOMU+ELL0zFw4fvZDRgRrg4euLO/f7TDlb0JzRaXlGGdkDB1TTNjDzFZcA8WyjgGR /Rjw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=X63AumFz; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m10si2608734eja.453.2020.12.10.05.10.42; Thu, 10 Dec 2020 05:10:42 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=X63AumFz; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389074AbgLJNKU (ORCPT + 6 others); Thu, 10 Dec 2020 08:10:20 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:39754 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388999AbgLJNKI (ORCPT ); Thu, 10 Dec 2020 08:10:08 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD8TQD060576; Thu, 10 Dec 2020 07:08:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1607605709; bh=v8DeDg+aSnj9XDWh6SjoEmvU220d2QLKrD8S48HIXT4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=X63AumFzKo7DEDenEv1hNc68+rT9i7yeNC5wA2fYE6d9kSfbpMiz0bB9ilIG/I/0t jkHni3dCtn615zzulRMlBKuvcHTuQQBQZjkSAwbGr2d5K9Xc/VELHfji4F8DhXjzU8 vdDL252m/zRndxQ93JkbeptQG8fYgUMV/0UmDKfM= Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0BAD8TWP118676 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Dec 2020 07:08:29 -0600 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Dec 2020 07:08:28 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Dec 2020 07:08:28 -0600 Received: from a0393678-ssd.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0BAD7ral098988; Thu, 10 Dec 2020 07:08:26 -0600 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon , Rob Herring , Kishon Vijay Abraham I CC: , , Subject: [PATCH v2 6/6] arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe Date: Thu, 10 Dec 2020 18:37:47 +0530 Message-ID: <20201210130747.25436-7-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201210130747.25436-1-kishon@ti.com> References: <20201210130747.25436-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org x2 lane PCIe slot in the common processor board is enabled and connected to j7200 SOM. Add PCIe DT node in common processor board to reflect the same. Signed-off-by: Kishon Vijay Abraham I --- .../boot/dts/ti/k3-j7200-common-proc-board.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index def98f563336..4a7182abccf5 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "k3-j7200-som-p0.dtsi" +#include #include #include #include @@ -241,3 +242,17 @@ resets = <&serdes_wiz0 3>; }; }; + +&pcie1_rc { + reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <2>; +}; + +&pcie1_ep { + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <2>; + status = "disabled"; +};