From patchwork Thu Dec 10 08:18:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 340972 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp5325852jai; Thu, 10 Dec 2020 00:19:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJxiNKjmeqBxGKt6FknGoiDLR21z2dhw6yOWpN0eeCfPdsqRn4iGwlMcbbMKSQfp188Dipq4 X-Received: by 2002:a63:804a:: with SMTP id j71mr2595231pgd.307.1607588348076; Thu, 10 Dec 2020 00:19:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607588348; cv=none; d=google.com; s=arc-20160816; b=GaqJI2hY9RDWQdCSKp1kI1MPR2epzNMrbEO8aJtCtPDopPBEN/46lXjB9rs/AqqXUr jLdGvvl6xmrJkrOSizcNIUTW0WbufLxdd5dcWOQMhFWqNU79OvSbZbPXFPWul5vdiUN4 4vlMI7CSb2/ypyKRCGD/gAu6HE3i/O0jLvDK6m24oTac4OK1dfUuFVmumK/m96t4OL8i cFCdaCqxiKnIn3oHWrd/rt/9qTZQ1JQr1cwstwtpSHIZZnTu9gapA6MBqOKoxc2NX+cK LTI/jeBeCf+647WiVBmClBxqK9HqgOBxwRi4IRO5/qBXG1aMVnzbc1Mf7/bdmnyf0r7y VFoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:message-id:date:subject:to:from:delivered-to; bh=7/39uR7NkANQ87O/DOoXqCU1UmTNET05AZz5iXbCiPk=; b=XGWApVt4F1Kx2CyPf9qEyGyd2MH9vh3rMfPEDYu9GeszSfGmVve6F/By27kY7evVoB j0FChAUtL5tadRs89IwiMWi5UlI8khS+qGi9w0DHqGgSszv6KFRO8KoINIkqWNSEbXnJ toY5L6czKDXQZgK28cbtz0f7uQalBsGzzOO+oLXtNrDmYmf7qO3k8KJkFissTcgZgyrk jq34HggCWG3bQayLsLXvffiC936mjSp58xXO3HE76oPWrnHVkoNqFr2RrYayRpMxWp71 yiHeVtMzLAefnJjLwYoVIr1vOX33UF7bCxOlvz45ysrhQbTf9BU5gcA4nJmD5itP3Nma D0Uw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id y4si1672001pga.180.2020.12.10.00.19.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Dec 2020 00:19:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 178566E2C7; Thu, 10 Dec 2020 08:19:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id E45086E2C7 for ; Thu, 10 Dec 2020 08:19:05 +0000 (UTC) From: Shawn Guo Authentication-Results: mail.kernel.org; dkim=permerror (bad message/signature format) To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/bridge: ti-sn65dsi86: rename GPIO register bits Date: Thu, 10 Dec 2020 16:18:53 +0800 Message-Id: <20201210081853.17060-1-shawnguo@kernel.org> X-Mailer: git-send-email 2.17.1 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sam Ravnborg , Douglas Anderson , Bjorn Andersson MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Shawn Guo It renames GPIO register bits to drop 'SN_' prefix, so that they are consistent to other definitions - prefixing register name with 'SN_' but not for bit fields. Signed-off-by: Shawn Guo --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) -- 2.17.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel Reviewed-by: Douglas Anderson diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index f27306c51e4d..8eac9d77eba1 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -63,13 +63,13 @@ #define SN_HPD_DISABLE_REG 0x5C #define HPD_DISABLE BIT(0) #define SN_GPIO_IO_REG 0x5E -#define SN_GPIO_INPUT_SHIFT 4 -#define SN_GPIO_OUTPUT_SHIFT 0 +#define GPIO_INPUT_SHIFT 4 +#define GPIO_OUTPUT_SHIFT 0 #define SN_GPIO_CTRL_REG 0x5F -#define SN_GPIO_MUX_INPUT 0 -#define SN_GPIO_MUX_OUTPUT 1 -#define SN_GPIO_MUX_SPECIAL 2 -#define SN_GPIO_MUX_MASK 0x3 +#define GPIO_MUX_INPUT 0 +#define GPIO_MUX_OUTPUT 1 +#define GPIO_MUX_SPECIAL 2 +#define GPIO_MUX_MASK 0x3 #define SN_AUX_WDATA_REG(x) (0x64 + (x)) #define SN_AUX_ADDR_19_16_REG 0x74 #define SN_AUX_ADDR_15_8_REG 0x75 @@ -1035,7 +1035,7 @@ static int ti_sn_bridge_gpio_get(struct gpio_chip *chip, unsigned int offset) if (ret) return ret; - return !!(val & BIT(SN_GPIO_INPUT_SHIFT + offset)); + return !!(val & BIT(GPIO_INPUT_SHIFT + offset)); } static void ti_sn_bridge_gpio_set(struct gpio_chip *chip, unsigned int offset, @@ -1051,8 +1051,8 @@ static void ti_sn_bridge_gpio_set(struct gpio_chip *chip, unsigned int offset, val &= 1; ret = regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG, - BIT(SN_GPIO_OUTPUT_SHIFT + offset), - val << (SN_GPIO_OUTPUT_SHIFT + offset)); + BIT(GPIO_OUTPUT_SHIFT + offset), + val << (GPIO_OUTPUT_SHIFT + offset)); if (ret) dev_warn(pdata->dev, "Failed to set bridge GPIO %u: %d\n", offset, ret); @@ -1069,8 +1069,8 @@ static int ti_sn_bridge_gpio_direction_input(struct gpio_chip *chip, return 0; ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, - SN_GPIO_MUX_MASK << shift, - SN_GPIO_MUX_INPUT << shift); + GPIO_MUX_MASK << shift, + GPIO_MUX_INPUT << shift); if (ret) { set_bit(offset, pdata->gchip_output); return ret; @@ -1103,8 +1103,8 @@ static int ti_sn_bridge_gpio_direction_output(struct gpio_chip *chip, /* Set direction */ ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, - SN_GPIO_MUX_MASK << shift, - SN_GPIO_MUX_OUTPUT << shift); + GPIO_MUX_MASK << shift, + GPIO_MUX_OUTPUT << shift); if (ret) { clear_bit(offset, pdata->gchip_output); pm_runtime_put(pdata->dev);