From patchwork Tue Dec 8 12:46:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 339733 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3663390jai; Tue, 8 Dec 2020 04:52:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJyNJNU638b4CAnMnfhKDBWxgwRQIx6OWouSt4EY3X21P6wxTIGe+ho7+/LAuv2c3gXABW7G X-Received: by 2002:a17:906:3153:: with SMTP id e19mr23986965eje.17.1607431968474; Tue, 08 Dec 2020 04:52:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607431968; cv=none; d=google.com; s=arc-20160816; b=ocyERfiUbdBYfrYzGOa8Ckd6+hoA3AjNDFwwZjPw5p1WAxJJv7mm7z5Ig+4FtRmoAz 0+6m80teSo2QHvVnofLwy1rGoUmO+XFp8Jmubh2ge8lELWDdYv3Uol3l/ji/dR613uq0 DHQZ8UhUP8RHpo3xAVGqbdwpX2/po81kxN6MF+tR5dn9+TrNQMVdFDuiKk7Gd9Oj/xTn xZN6ZL4KerHj5OXpIWogsgKHkonuiIC4FTv7pxkX6et4Mqr/TWtkQbiutBJPfYoCZf9s ZAHWwwoKWcPLwI2xG0aBQrYb/1T8Enz0VSWnIyhdCFDMGWRSKQx+xZHs0O8rGAK+8D1U Z2bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=jvP6wMwlSviorpN5LqjtatZaQDn2ayW9LWdEfJBdEqc=; b=mQPtNb4yAR03CBBMpUzV2UJosYcNweu9b2dThdAG3Qc7oK44Fla9NSRJh0ijOJ0GnH Le7j2VOIx4L2w2diQiBBPjlLDc0zQdO1ochCK0Lp3e5o8z42vFpGVC+lIIvsf9jNCGDp M4ticHTxsg7RP6A4XC/EWF/gyCfUffBz56sIM66NFcBjfreGdluHgnRmTC/ZPHEP2srj gvSNBLqdjWRBpP6ORiaX0W8QBEdtbQTnJ8iA5LUBYv1+p2mYBJeBGpzprNoLYmHAKUzr 8xwzKVMVa2TRgCmWf/PwHET9jLn2nrWHbTGCHj0MIyGSc1hMq8uE1qAC3dlOPKIkdZmX k/HA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m11si10059482edr.583.2020.12.08.04.52.48; Tue, 08 Dec 2020 04:52:48 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729287AbgLHMvZ (ORCPT + 6 others); Tue, 8 Dec 2020 07:51:25 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:9037 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729266AbgLHMvZ (ORCPT ); Tue, 8 Dec 2020 07:51:25 -0500 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4Cr0QD2M2pzhnnK; Tue, 8 Dec 2020 20:50:12 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.487.0; Tue, 8 Dec 2020 20:50:33 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH v3 1/4] reset: hisilicon: correct vendor prefix Date: Tue, 8 Dec 2020 20:46:38 +0800 Message-ID: <20201208124641.1787-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201208124641.1787-1-thunder.leizhen@huawei.com> References: <20201208124641.1787-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly stated in "vendor-prefixes.yaml". For backward compatibility reasons fall back to the deprecated compatible if the new one failed. Fixes: 1527058736fa ("reset: hisilicon: add reset-hi3660") Signed-off-by: Zhen Lei Cc: Zhangfei Gao --- drivers/reset/hisilicon/reset-hi3660.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/drivers/reset/hisilicon/reset-hi3660.c b/drivers/reset/hisilicon/reset-hi3660.c index a7d4445924e558c..965f5ceba7d8f4d 100644 --- a/drivers/reset/hisilicon/reset-hi3660.c +++ b/drivers/reset/hisilicon/reset-hi3660.c @@ -83,9 +83,14 @@ static int hi3660_reset_probe(struct platform_device *pdev) if (!rc) return -ENOMEM; - rc->map = syscon_regmap_lookup_by_phandle(np, "hisi,rst-syscon"); + rc->map = syscon_regmap_lookup_by_phandle(np, "hisilicon,rst-syscon"); + if (rc->map == ERR_PTR(-ENODEV)) { + /* fall back to the deprecated compatible */ + rc->map = syscon_regmap_lookup_by_phandle(np, + "hisi,rst-syscon"); + } if (IS_ERR(rc->map)) { - dev_err(dev, "failed to get hi3660,rst-syscon\n"); + dev_err(dev, "failed to get hisilicon,rst-syscon\n"); return PTR_ERR(rc->map); } From patchwork Tue Dec 8 12:46:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 339736 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3663438jai; Tue, 8 Dec 2020 04:52:53 -0800 (PST) X-Google-Smtp-Source: ABdhPJzzanoxNcRWGQFPo3zMN8S8rfMKrwF0qar0SodCkRNrRdoo+efztcUGrCI8cePbnYZoAEUi X-Received: by 2002:a17:906:578e:: with SMTP id k14mr17836068ejq.90.1607431973821; Tue, 08 Dec 2020 04:52:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607431973; cv=none; d=google.com; s=arc-20160816; b=tsuaFRV8lzmraYWMsZt5TLKHiB2eK+wptv1ZEiKvxrXdPl8DFkQIvWQpL4cGgpgqeQ PyH+SGVWm5V5rWmNsAE8/nke32IK3kD6/6mVjvOgRZ7kGoDL6hiqjWWhV+7zXTahqDrZ P3l0rPJvLwiyv2pSk3ZEVhI+gqMad5v1ykAJucQN68LqQQ9D7ZuZMJB4Ehh7L9mWdhkF IaFgl+vPR7R2EORi1ScSO1jLszCgF7gV4osGOw9sr/389bHLfkqbS5sQZML8h5JsiUfO 2yoIdCV8C0ETC1BrQSRty8K2d5RmoCAAghpZQemhSl56jCHjHih7QUI+GXiZCZJZ2Rij w4KQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=epkydfdfqreN/nkFvLIQRqu/sHuaiglc7nVJIZ4MZb4=; b=PaJBqs2RC28KilA9QMOyhOkHu0S5o8iFD6KW3FYAfQCZkt+j+r3Ltt3iEuGMv07xIO +UrbMoPNHyEUv0RQmQm6YJdMqdSazdPMf7Vx+AM49G0eCemJBw3EsEg+cSm9DPvHWxrG EvRclT2LEED3amLwfS24PW4ObGOQIaWIVRzXkOhzecJdR4WMuJuvSd97c8XEdTFY2oCb HyP5mpus0F18etIIch4GVTzrAI7W3L4Xl77amFWZfO2r/GTQrE1B5usxBpeONOnFfLWJ d5kb6DTsBLLiWdNkfUjMJMnFmuXs8x5Txnf+dwNJ2XdviYtrsUMimyuv58hLOxjsArtT PyLQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m11si10059482edr.583.2020.12.08.04.52.53; Tue, 08 Dec 2020 04:52:53 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726931AbgLHMv1 (ORCPT + 6 others); Tue, 8 Dec 2020 07:51:27 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:9132 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728653AbgLHMv1 (ORCPT ); Tue, 8 Dec 2020 07:51:27 -0500 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4Cr0QD0rMZz15YnB; Tue, 8 Dec 2020 20:50:12 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.487.0; Tue, 8 Dec 2020 20:50:34 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH v3 2/4] arm64: dts: correct vendor prefix hisi to hisilicon Date: Tue, 8 Dec 2020 20:46:39 +0800 Message-ID: <20201208124641.1787-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201208124641.1787-1-thunder.leizhen@huawei.com> References: <20201208124641.1787-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly stated in "vendor-prefixes.yaml". Fixes: 35ca8168133c ("arm64: dts: Add dts files for Hisilicon Hi3660 SoC") Fixes: dd8c7b78c11b ("arm64: dts: Add devicetree for Hisilicon Hi3670 SoC") Signed-off-by: Zhen Lei Cc: Chen Feng Cc: Manivannan Sadhasivam --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) -- 1.8.3 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 49c19c6879f95ce..bfb1375426d2b58 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -345,7 +345,7 @@ crg_rst: crg_rst_controller { compatible = "hisilicon,hi3660-reset"; #reset-cells = <2>; - hisi,rst-syscon = <&crg_ctrl>; + hisilicon,rst-syscon = <&crg_ctrl>; }; @@ -376,7 +376,7 @@ iomcu_rst: reset { compatible = "hisilicon,hi3660-reset"; - hisi,rst-syscon = <&iomcu>; + hisilicon,rst-syscon = <&iomcu>; #reset-cells = <2>; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 85b0dfb35d6d396..5c5a5dc964ea848 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -155,7 +155,7 @@ compatible = "hisilicon,hi3670-reset", "hisilicon,hi3660-reset"; #reset-cells = <2>; - hisi,rst-syscon = <&crg_ctrl>; + hisilicon,rst-syscon = <&crg_ctrl>; }; pctrl: pctrl@e8a09000 { From patchwork Tue Dec 8 12:46:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 339735 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3663428jai; Tue, 8 Dec 2020 04:52:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJxGACKMNOar01ecvDLJRtkD8FNkXoMglo2IcY2fINKDG0JAKgveysKgHJclRqNr2PyDinYF X-Received: by 2002:a05:6402:31b5:: with SMTP id dj21mr25180500edb.90.1607431972479; Tue, 08 Dec 2020 04:52:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607431972; cv=none; d=google.com; s=arc-20160816; b=iIcUCNsE1+L9Fq4oSO4qCACpoHypNeFMCEwLRpg5OOvhBWldlUKT7elpQaH1mkSiCl EQ4ibOylX77tgj8ygNnpf/nmwYROuWL4Yf36iIteNg4CKjAX6q+7GBi2B2awyK4Vdl4S VzeBLMmj3TFalMc6JvO7nqy94QwJ1Gx0rrhR/NZgAlLo2gYSnCWc3vvk5XbJCkt20Dmn +tR+9bTZ8034rUIW4O/zYvtaHXTPH6kZ9UE58/+AZgoCdCbzitoJsbzGkV9SKl95dOQG EEuOIiUrfVaZX9sgdXicjsEzh/58bsUrG/1jiXgUTTr8Nj4hBoHZQ50Qq0IxgStRISAu f8vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=mR9SpewN9DJ5kpsK6O5O63bvVAXdBLPkczDcZLWkkk8=; b=DAIY/ZnINdRcmdo3V6Eu/XxoUl6/lRwgelFMA675dsO2svUwicOF4nrrKAK7ze/teX Ro/McfEADqAmDwLrAqoGAQQSsB/tPmjfdOJp87Y7eXNx3LejTaZNrRwa1EPwCzL+n2f2 P0QtOFMd3cKttDJA5WWLZbvL8JEVO82arTM2ouNmKk2wNMSHQI2tGEB8C0MEMHeE9Iql 2dzABCw02AbgTDQTHqyohi6WLF8dq+19OtpbOYRIYLfd6WiUfYCUe7Djd+G/yZC+0AA1 H6bm7V3yGFAGkkwgakpuP0DN6jwwuwxPf1Rjcu9EzzdkZbIt3QT1xxYMj4UjaiP7OQzf YBaA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m11si10059482edr.583.2020.12.08.04.52.52; Tue, 08 Dec 2020 04:52:52 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729579AbgLHMv1 (ORCPT + 6 others); Tue, 8 Dec 2020 07:51:27 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:9130 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729278AbgLHMv1 (ORCPT ); Tue, 8 Dec 2020 07:51:27 -0500 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4Cr0QD0Lg7z15Ygw; Tue, 8 Dec 2020 20:50:12 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.487.0; Tue, 8 Dec 2020 20:50:35 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH v3 3/4] dt-bindings: reset: correct vendor prefix hisi to hisilicon Date: Tue, 8 Dec 2020 20:46:40 +0800 Message-ID: <20201208124641.1787-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201208124641.1787-1-thunder.leizhen@huawei.com> References: <20201208124641.1787-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly stated in "vendor-prefixes.yaml". Fixes: 836e23549583 ("dt-bindings: Document the hi3660 reset bindings") Signed-off-by: Zhen Lei Cc: Zhangfei Gao --- Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.8.3 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt index 2df4bddeb688918..aefd26710f9e87d 100644 --- a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt @@ -11,7 +11,7 @@ Required properties: - compatible: should be one of the following: "hisilicon,hi3660-reset" for HI3660 "hisilicon,hi3670-reset", "hisilicon,hi3660-reset" for HI3670 -- hisi,rst-syscon: phandle of the reset's syscon. +- hisilicon,rst-syscon: phandle of the reset's syscon. - #reset-cells : Specifies the number of cells needed to encode a reset source. The type shall be a and the value shall be 2. @@ -29,7 +29,7 @@ Example: iomcu_rst: iomcu_rst_controller { compatible = "hisilicon,hi3660-reset"; - hisi,rst-syscon = <&iomcu>; + hisilicon,rst-syscon = <&iomcu>; #reset-cells = <2>; }; From patchwork Tue Dec 8 12:46:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 339734 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp3663403jai; Tue, 8 Dec 2020 04:52:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJzUkggEzZGZJq9INP+Xjtcp0vVWb7btlxzUm1KryE9dIEU9wVYmjTKaxbKocAKFmfvXp3sx X-Received: by 2002:a17:906:40d3:: with SMTP id a19mr22618702ejk.98.1607431969821; Tue, 08 Dec 2020 04:52:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607431969; cv=none; d=google.com; s=arc-20160816; b=rVKdYGpLiGiNVYrS8qkVekaoy6Gt14K483AFyxBUAnx01VBSQOdekumHQu8QrYMhPy AhXqp5wutO5RZvbQYSKAA0NTumt3Ynd3K4dNzPg2HF1UNI9o/GNE8XLISfPOV2aycgjo RkaRTf7Y2wEBSonDY0yMGvnJiXaHcl09lIwpWzz6WzraeUNG1FxleG7uSy0vWD0d095G reUQJzfMmpnAb1NpnH0cTVz7Rb+DfZ03tdQ/48QRoIsRtZAUMhZqEvtTlXJre/KtVb7H 12pP7jAAy2roQ8NVM9pTzEHgthfy39leZZctNMsS0R7pCHcsGxSR0tbVNy2g074vh3by P/ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=owX/PhfbcFJeWJ3EwGDTBI4JtcpUNpABMw5bsHZWjEw=; b=mvn0HUzcOnmiFfF/V38Bs0wVef0fxBya1dRZHJaD7gK51ojU6RJINLpx1Tthlx7Vm1 7s0CATkpD9Ctp3mi7OF3iS4VKIrNJnOAqktFR8Yh6SmKhY21j6b9MHXW/eeMLYy080c+ woFr37YHYdzsIZkCa4CJFR4LGJ/6/ehZAyeE2V0NS2FDc3B/Ih4TdyaHVq8vgXdnEScO lLOnqWk5xMCgwo6ifg4/dqhBo7AN+Mi+G6CtwiQX1fX3p+ow5L6Jj5T8fPmhAfBdGmPv 4iatrebcKxD/oE9f/V4GvKg0JF4FyUnYV4K9RKliS26+/MDZAHfIfl5+hfDpslTxvL5V yC/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m11si10059482edr.583.2020.12.08.04.52.49; Tue, 08 Dec 2020 04:52:49 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729339AbgLHMv0 (ORCPT + 6 others); Tue, 8 Dec 2020 07:51:26 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:9131 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729268AbgLHMvZ (ORCPT ); Tue, 8 Dec 2020 07:51:25 -0500 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4Cr0QD0b00z15Ymv; Tue, 8 Dec 2020 20:50:12 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.9) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.487.0; Tue, 8 Dec 2020 20:50:35 +0800 From: Zhen Lei To: Philipp Zabel , Wei Xu , "Rob Herring" , linux-arm-kernel , devicetree , linux-kernel CC: Zhen Lei , Zhangfei Gao , Chen Feng , "Manivannan Sadhasivam" Subject: [PATCH v3 4/4] dt-bindings: reset: convert Hisilicon reset controller bindings to json-schema Date: Tue, 8 Dec 2020 20:46:41 +0800 Message-ID: <20201208124641.1787-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201208124641.1787-1-thunder.leizhen@huawei.com> References: <20201208124641.1787-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Hisilicon reset controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei --- .../bindings/reset/hisilicon,hi3660-reset.txt | 44 ------------- .../bindings/reset/hisilicon,hi3660-reset.yaml | 77 ++++++++++++++++++++++ 2 files changed, 77 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml -- 1.8.3 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt deleted file mode 100644 index aefd26710f9e87d..000000000000000 --- a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt +++ /dev/null @@ -1,44 +0,0 @@ -Hisilicon System Reset Controller -====================================== - -Please also refer to reset.txt in this directory for common reset -controller binding usage. - -The reset controller registers are part of the system-ctl block on -hi3660 and hi3670 SoCs. - -Required properties: -- compatible: should be one of the following: - "hisilicon,hi3660-reset" for HI3660 - "hisilicon,hi3670-reset", "hisilicon,hi3660-reset" for HI3670 -- hisilicon,rst-syscon: phandle of the reset's syscon. -- #reset-cells : Specifies the number of cells needed to encode a - reset source. The type shall be a and the value shall be 2. - - Cell #1 : offset of the reset assert control - register from the syscon register base - offset + 4: deassert control register - offset + 8: status control register - Cell #2 : bit position of the reset in the reset control register - -Example: - iomcu: iomcu@ffd7e000 { - compatible = "hisilicon,hi3660-iomcu", "syscon"; - reg = <0x0 0xffd7e000 0x0 0x1000>; - }; - - iomcu_rst: iomcu_rst_controller { - compatible = "hisilicon,hi3660-reset"; - hisilicon,rst-syscon = <&iomcu>; - #reset-cells = <2>; - }; - -Specifying reset lines connected to IP modules -============================================== -example: - - i2c0: i2c@..... { - ... - resets = <&iomcu_rst 0x20 3>; /* offset: 0x20; bit: 3 */ - ... - }; diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml new file mode 100644 index 000000000000000..9bf40952e5b7d28 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon System Reset Controller + +maintainers: + - Wei Xu + +description: | + Please also refer to reset.txt in this directory for common reset + controller binding usage. + The reset controller registers are part of the system-ctl block on + hi3660 and hi3670 SoCs. + +properties: + compatible: + oneOf: + - items: + - const: hisilicon,hi3660-reset + - items: + - const: hisilicon,hi3670-reset + - const: hisilicon,hi3660-reset + + hisilicon,rst-syscon: + description: phandle of the reset's syscon. + $ref: /schemas/types.yaml#/definitions/phandle + + '#reset-cells': + description: | + Specifies the number of cells needed to encode a reset source. + Cell #1 : offset of the reset assert control register from the syscon + register base + offset + 4: deassert control register + offset + 8: status control register + Cell #2 : bit position of the reset in the reset control register + const: 2 + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + #include + #include + + iomcu: iomcu@ffd7e000 { + compatible = "hisilicon,hi3660-iomcu", "syscon"; + reg = <0xffd7e000 0x1000>; + }; + + iomcu_rst: iomcu_rst_controller { + compatible = "hisilicon,hi3660-reset"; + hisilicon,rst-syscon = <&iomcu>; + #reset-cells = <2>; + }; + + /* Specifying reset lines connected to IP modules */ + i2c@ffd71000 { + compatible = "snps,designware-i2c"; + reg = <0xffd71000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>; + resets = <&iomcu_rst 0x20 3>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>; + status = "disabled"; + }; +...