From patchwork Wed Dec 2 12:12:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 336122 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E915FC64E8A for ; Wed, 2 Dec 2020 12:14:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 921AE22203 for ; Wed, 2 Dec 2020 12:14:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388577AbgLBMOR (ORCPT ); Wed, 2 Dec 2020 07:14:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388715AbgLBMOR (ORCPT ); Wed, 2 Dec 2020 07:14:17 -0500 Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B59EC061A04 for ; Wed, 2 Dec 2020 04:13:10 -0800 (PST) Received: by mail-pl1-x642.google.com with SMTP id f1so547953plt.12 for ; Wed, 02 Dec 2020 04:13:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r65t216Thxq+mYFTpyT4OjGg2gXVDw4eagVlWivHgyg=; b=dl3n5kTaebML2GhZwbAP/6F4kv/fdUQcJ20w30Xc5N6mA4IDp+rLVfV6Xz4dwNa6dz BH6K7tDoDnUBzg26WpYX20IcA2fa/4MT7d3aVlkF5Gyth8R3E3tbPgMrmEuH5WrOpWLe qSlmc6FraiSiHuONamreL/pDStzt0u9RCx3VY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r65t216Thxq+mYFTpyT4OjGg2gXVDw4eagVlWivHgyg=; b=KHrG7FxMYgzwEBWaEWiFU6xXHlRByz75CP6dHG/aVSTC8IZKpqsHT+htbAToCPvSBa DemEcyXcjwYDpgEriaxb378ZFcT2jHRXTVY6cAeuGgA8TIf4Q8kCUdazHiU1Fy/64G8f NQcoCNn7lRuSssWnAFgnvYX69ybo3M0k2sGxxMJAv1azoNnsCsE7vFQfuaNFFcalV8E8 HfawFj5eNL3RCH8uojKbwl9OiEkXp8OAw8hgygpjp6OG/AmJyTJyKMBwoZjrc+SeNBqG kDH9uRISe2lndqtoAQmF3l09RTCppBkySbCF/u24HghOihd6XLMVRMyhZ3Chm0zlkIMR YAQA== X-Gm-Message-State: AOAM533Wwt4qHnf0oWD/XKbffus2WIg6R2YMFICs8xISDjB47gO33nfZ 46Ed9GYlVAClT44MspQJztOXBg== X-Google-Smtp-Source: ABdhPJx220bSGOq0ad9GZPmlbsoPPyCBbcw+sBeq+ZCAQwNxUN12eJrAm7ba4uluze/gsWvmjnitGQ== X-Received: by 2002:a17:90a:a785:: with SMTP id f5mr2079869pjq.219.1606911190167; Wed, 02 Dec 2020 04:13:10 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a884:fd53:e9ba:b313:1b1d]) by smtp.gmail.com with ESMTPSA id b37sm1951315pgl.31.2020.12.02.04.13.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 04:13:09 -0800 (PST) From: Jagan Teki To: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam Cc: Matteo Lisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki , Catalin Marinas , Will Deacon Subject: [PATCH 01/10] arm64: defconfig: Enable REGULATOR_PF8X00 Date: Wed, 2 Dec 2020 17:42:32 +0530 Message-Id: <20201202121241.109952-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201202121241.109952-1-jagan@amarulasolutions.com> References: <20201202121241.109952-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable PF8X00 regulator driver by default as it used in some of i.MX8MM hardware platforms. Cc: Catalin Marinas Cc: Will Deacon Signed-off-by: Jagan Teki --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 867cc4a5f00f..b070ecf61fdf 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -594,6 +594,7 @@ CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_MAX8973=y CONFIG_REGULATOR_PCA9450=y +CONFIG_REGULATOR_PF8X00=y CONFIG_REGULATOR_PFUZE100=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_QCOM_RPMH=y From patchwork Wed Dec 2 12:12:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 336121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9D12C64E90 for ; Wed, 2 Dec 2020 12:15:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 99C88221FE for ; Wed, 2 Dec 2020 12:15:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388777AbgLBMOd (ORCPT ); Wed, 2 Dec 2020 07:14:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388770AbgLBMOc (ORCPT ); Wed, 2 Dec 2020 07:14:32 -0500 Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86AE6C061A48 for ; Wed, 2 Dec 2020 04:13:14 -0800 (PST) Received: by mail-pl1-x642.google.com with SMTP id v3so997394plz.13 for ; Wed, 02 Dec 2020 04:13:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dTiWdb9iAUBCBAVpiIwZei7I81QtYKoLbPssq1TLxOs=; b=XBKLmOertB3L450yhgpAZglcBbnbeBIsCSpn64+2SgzuAVUt55HxnOEQfj+HCdP5mh AO0jCzvFboAx5kmKB+m5mvC1fN9sAR46Xx3FYVSgznwK+JdWhiSZ23UZPKRqy9w70e8n 4z8Mp3N7+QxMsWXKOyDdDrZLB3lIkQB9clWMA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dTiWdb9iAUBCBAVpiIwZei7I81QtYKoLbPssq1TLxOs=; b=Cu5LvtQ+5I753s6dZDvQXxRwHmlozljW5BAcEXvn2odgIGtglhJKmLgRyzlV0RZDXB 95fgVLJ4IqMr5Hz2p83N9HPJ+kR+VQMCckYzXfA3YESWyNf1e5yd6eGvFvanAUz/TnHf ormn1Gnky7eCrcj4eLcONSuD7MKdKwmp4u10LFUqcDuvlVbtXADUifODfnjpba+u9KTu QJztqwxG289EiA1LF67vbbgsJIOJB85Won7nPYoEah2awCenzbTBDBQqZ+Q+VpzEYnnd Ma+RixHvmRWBTnza4owhbiastezgt0Go7D0OQyGMW6Vy3yvFh6bFOezz5C5WEuDIxsEb rplQ== X-Gm-Message-State: AOAM530LkG8f75YMZ6Gv/eGNWWMWkTsDE33ZbeI8pD4l/ERRcOsq8Ski oY3AXPWmKEPr7hEBXIoz0LSpwQ== X-Google-Smtp-Source: ABdhPJwrMvFDSf/RAgh9pkO/FOZ2OK/wN7yy1jkbXnkKxbUo/4qmj00dJsUjfj0YI55lpc9zacjHKw== X-Received: by 2002:a17:90a:7301:: with SMTP id m1mr2184615pjk.128.1606911194151; Wed, 02 Dec 2020 04:13:14 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a884:fd53:e9ba:b313:1b1d]) by smtp.gmail.com with ESMTPSA id b37sm1951315pgl.31.2020.12.02.04.13.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 04:13:13 -0800 (PST) From: Jagan Teki To: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam Cc: Matteo Lisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 02/10] dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit Date: Wed, 2 Dec 2020 17:42:33 +0530 Message-Id: <20201202121241.109952-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201202121241.109952-1-jagan@amarulasolutions.com> References: <20201202121241.109952-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. i.Core MX8M Mini needs to mount on top of this Evaluation board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit. Add bindings for it. Signed-off-by: Jagan Teki --- Documentation/devicetree/bindings/arm/fsl.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 67980dcef66d..2e520733ce4e 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -667,6 +667,8 @@ properties: items: - enum: - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit + - engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SOM + - engicam,icore-mx8mm-edimm2.2 # i.MX8MM Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board - fsl,imx8mm-evk # i.MX8MM EVK Board - kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM From patchwork Wed Dec 2 12:12:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 336120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D035C8301C for ; Wed, 2 Dec 2020 12:15:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4C6B62222A for ; Wed, 2 Dec 2020 12:15:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388692AbgLBMOd (ORCPT ); Wed, 2 Dec 2020 07:14:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388774AbgLBMOc (ORCPT ); Wed, 2 Dec 2020 07:14:32 -0500 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BB41C061A49 for ; Wed, 2 Dec 2020 04:13:18 -0800 (PST) Received: by mail-pl1-x62b.google.com with SMTP id p6so1014874plr.7 for ; Wed, 02 Dec 2020 04:13:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mufF4hRgH4PDLGAGuI3iYOURtYD7y9AqiPoup7RwkJ8=; b=NmR75SXgoGoeKXN8n3vLL4WGPGcjQOXDjUZ0KyejZtTABMoXFiCIdliRBV9v7HehY5 qe+Lmr42/pQhIWGTE5x55FMFWYO0AEh3Tz/VGLEUUK0AaHSJCMlo8iKjz9Az8yYHQoql 6VjWi/fID1/alaq7Ty5qOWLEOrHF0aAh8wQs8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mufF4hRgH4PDLGAGuI3iYOURtYD7y9AqiPoup7RwkJ8=; b=f+swrnyb1q/NAiox0c6QhLbb5EkoS+f1ykwhl+sKOobGqdp+9gz6NrPNC/hCfPSDs2 bLBdBSjhQCx6USKMytHUvM2TbQqQF3Wbocg72gXuQX984AOXqVD1yiVO/gGSqBvtyjHp c534A0GGE1O+K3v6wjiR6pwJdgBr9+OJS6rZUz4aNOHTdgUCeAuVaj29krSVfp89kTcR A1FT/E78vDJutgkgfNprPU/or+1zzuJnS8DRI+OeiSQFRE29mpUp+WbViJV1JmVmQ7jk SeO/AFN3Fso3WXX5Yj+Iq5k16LUDSCOF0XKC0F3edLs4bnuETApGXFuuJQpU6Q+oxQRH 7d7A== X-Gm-Message-State: AOAM5323CXgAS/DmE/b/uZ4WzonMPGp8C/O0X+1rSrGmGEAIn3smMwLR RAni9WrwHwgaiqKzqIf9XwcNdg== X-Google-Smtp-Source: ABdhPJwcB8XUFxscy78aQv3HGd9roxpS/vsoa5gr3WXBx6vXc6k/DyrYN52BS9HBdgtR6kENYcr0RA== X-Received: by 2002:a17:902:b717:b029:d9:e816:fd0b with SMTP id d23-20020a170902b717b02900d9e816fd0bmr2327604pls.50.1606911198101; Wed, 02 Dec 2020 04:13:18 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a884:fd53:e9ba:b313:1b1d]) by smtp.gmail.com with ESMTPSA id b37sm1951315pgl.31.2020.12.02.04.13.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 04:13:17 -0800 (PST) From: Jagan Teki To: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam Cc: Matteo Lisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 03/10] arm64: dts: imx: Add Engicam EDIMM2.2 Starter Kit Date: Wed, 2 Dec 2020 17:42:34 +0530 Message-Id: <20201202121241.109952-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201202121241.109952-1-jagan@amarulasolutions.com> References: <20201202121241.109952-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out SOM's like i.Core MX8M Mini needs to mount on top of this Evaluation board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Matteo Lisi Signed-off-by: Jagan Teki --- .../dts/freescale/imx8mm-engicam-common.dtsi | 24 +++++++++++++++++++ .../freescale/imx8mm-engicam-edimm2.2.dtsi | 7 ++++++ 2 files changed, 31 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi new file mode 100644 index 000000000000..67c1a3fe26bc --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-common.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Engicam srl + * Copyright (c) 2020 Amarula Solutions(India) + */ + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +/* SD */ +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; + cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + max-frequency = <50000000>; + bus-width = <4>; + no-1-8-v; + pm-ignore-notify; + keep-power-in-suspend; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi new file mode 100644 index 000000000000..294df07289a2 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-edimm2.2.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Engicam srl + * Copyright (c) 2020 Amarula Solutions(India) + */ + +#include "imx8mm-engicam-common.dtsi" From patchwork Wed Dec 2 12:12:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 336119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E276BC8301B for ; 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Wed, 02 Dec 2020 04:13:22 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a884:fd53:e9ba:b313:1b1d]) by smtp.gmail.com with ESMTPSA id b37sm1951315pgl.31.2020.12.02.04.13.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 04:13:21 -0800 (PST) From: Jagan Teki To: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam Cc: Matteo Lisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 04/10] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SOM Date: Wed, 2 Dec 2020 17:42:35 +0530 Message-Id: <20201202121241.109952-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201202121241.109952-1-jagan@amarulasolutions.com> References: <20201202121241.109952-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam. General features: - NXP i.MX8MM - Up to 2GB LDDR4 - 8/16GB eMMC - Gigabit Ethernet - USB 2.0 Host/OTG - PCIe Gen2 interface - I2S - MIPI DSI to LVDS - rest of i.MX8MM features i.Core MX8M Mini needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 - C.TOUCH 2.0 Add support for it. Signed-off-by: Matteo Lisi Signed-off-by: Jagan Teki --- .../freescale/imx8mm-engicam-icore-mx8mm.dtsi | 209 ++++++++++++++++++ 1 file changed, 209 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi new file mode 100644 index 000000000000..b87917c40587 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm.dtsi @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 NXP + * Copyright (c) 2019 Engicam srl + * Copyright (c) 2020 Amarula Solutons(India) + */ + +/ { + compatible = "engicam,icore-mx8mm", "fsl,imx8mm"; +}; + +&A53_0 { + cpu-supply = <®_buck4>; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + pf8100@8 { + compatible = "nxp,pf8x00"; + reg = <0x08>; + + regulators { + reg_ldo1: ldo1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + }; + + reg_ldo2: ldo2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + }; + + reg_ldo3: ldo3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + }; + + reg_ldo4: ldo4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + }; + + reg_buck1: buck1 { + fsl,ilim-ma = <4500>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + }; + + reg_buck2: buck2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + }; + + reg_buck3: buck3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + }; + + reg_buck4: buck4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + fast-slew = <1>; + }; + + reg_buck5: buck5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + }; + + reg_buck6: buck6 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + }; + + reg_buck7: buck7 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + }; + + reg_vsnvs: vsnvs { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + }; + }; + }; +}; + +&iomuxc { + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 + MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 + >; + }; + + pinctrl_usdhc1_gpio: usdhc1grpgpio { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + >; + }; +}; + +/* eMMC */ +&usdhc3 { + assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>; + assigned-clock-rates = <400000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +}; From patchwork Wed Dec 2 12:12:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 336118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73D82C8301E for ; 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Wed, 02 Dec 2020 04:13:26 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a884:fd53:e9ba:b313:1b1d]) by smtp.gmail.com with ESMTPSA id b37sm1951315pgl.31.2020.12.02.04.13.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 04:13:25 -0800 (PST) From: Jagan Teki To: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam Cc: Matteo Lisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 05/10] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit Date: Wed, 2 Dec 2020 17:42:36 +0530 Message-Id: <20201202121241.109952-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201202121241.109952-1-jagan@amarulasolutions.com> References: <20201202121241.109952-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org i.Core MX8M Mini is an EDIMM SOM based on NXP i.MX8MM from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. i.Core MX8M Mini needs to mount on top of this Evaluation board for creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Matteo Lisi Signed-off-by: Jagan Teki --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../imx8mm-engicam-icore-mx8mm-edimm2.2.dts | 21 +++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 6f0777ee6cd6..4369d783dade 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2162a-qds.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-engicam-icore-mx8mm-edimm2.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts new file mode 100644 index 000000000000..a8afc0998fcd --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-engicam-icore-mx8mm-edimm2.2.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 NXP + * Copyright (c) 2019 Engicam srl + * Copyright (c) 2020 Amarula Solutions(India) + */ + +/dts-v1/; +#include "imx8mm.dtsi" +#include "imx8mm-engicam-edimm2.2.dtsi" +#include "imx8mm-engicam-icore-mx8mm.dtsi" + +/ { + model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit"; + compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm", + "fsl,imx8mm"; + + chosen { + stdout-path = &uart2; + }; +};