From patchwork Tue Dec 1 09:27:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 336216 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFB84C83016 for ; Tue, 1 Dec 2020 09:28:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 966D721D7F for ; Tue, 1 Dec 2020 09:28:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390707AbgLAJ2g (ORCPT ); Tue, 1 Dec 2020 04:28:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390703AbgLAJ2f (ORCPT ); Tue, 1 Dec 2020 04:28:35 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F8BCC0613D2 for ; Tue, 1 Dec 2020 01:27:55 -0800 (PST) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kk1wn-0000MQ-9v; Tue, 01 Dec 2020 10:27:45 +0100 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kk1wl-0004gs-N7; Tue, 01 Dec 2020 10:27:43 +0100 From: Oleksij Rempel To: Mark Rutland , Rob Herring , Sascha Hauer , Shawn Guo , Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter Cc: Oleksij Rempel , devicetree@vger.kernel.org, Fabio Estevam , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , David Jander , dri-devel@lists.freedesktop.org Subject: [PATCH v5 1/6] dt-bindings: display: simple: Add EDT ETM0700G0BDH6 display Date: Tue, 1 Dec 2020 10:27:37 +0100 Message-Id: <20201201092742.17658-2-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201201092742.17658-1-o.rempel@pengutronix.de> References: <20201201092742.17658-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This display is already supported by the panel-simple driver, so add it to the bindings documentation. This patch is needed to fix checkpatch warnings for the PLYM2M dts. Signed-off-by: Oleksij Rempel --- .../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index edb53ab0d9eb..a011d9e44af3 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -117,6 +117,8 @@ properties: - edt,etm0700g0dh6 # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch # Same as ETM0700G0DH6 but with inverted pixel clock. + - edt,etm0700g0bdh6 + # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch - edt,etm070080bdh6 # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch # Same display as the ETM0700G0BDH6, but with changed hardware for the From patchwork Tue Dec 1 09:27:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 335266 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 746AAC83016 for ; Tue, 1 Dec 2020 09:29:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4368020809 for ; Tue, 1 Dec 2020 09:29:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388082AbgLAJ3e (ORCPT ); Tue, 1 Dec 2020 04:29:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391025AbgLAJ3R (ORCPT ); Tue, 1 Dec 2020 04:29:17 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A55DC061A4B for ; Tue, 1 Dec 2020 01:28:33 -0800 (PST) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kk1wn-0000MR-9v; Tue, 01 Dec 2020 10:27:45 +0100 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kk1wl-0004h2-O9; Tue, 01 Dec 2020 10:27:43 +0100 From: Oleksij Rempel To: Mark Rutland , Rob Herring , Sascha Hauer , Shawn Guo , Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter Cc: Oleksij Rempel , Rob Herring , devicetree@vger.kernel.org, Fabio Estevam , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , David Jander , dri-devel@lists.freedesktop.org Subject: [PATCH v5 2/6] dt-bindings: vendor-prefixes: Add an entry for Plymovent Date: Tue, 1 Dec 2020 10:27:38 +0100 Message-Id: <20201201092742.17658-3-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201201092742.17658-1-o.rempel@pengutronix.de> References: <20201201092742.17658-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add "ply" entry for Plymovent Group BV: https://www.plymovent.com/ Signed-off-by: Oleksij Rempel Acked-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 6a9be2bbbcb6..8332d50301ea 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -840,6 +840,8 @@ patternProperties: description: PLDA "^plx,.*": description: Broadcom Corporation (formerly PLX Technology) + "^ply,.*": + description: Plymovent Group BV "^pni,.*": description: PNI Sensor Corporation "^pocketbook,.*": From patchwork Tue Dec 1 09:27:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 335269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C121C83014 for ; Tue, 1 Dec 2020 09:28:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4277021D7F for ; Tue, 1 Dec 2020 09:28:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390709AbgLAJ2h (ORCPT ); Tue, 1 Dec 2020 04:28:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390704AbgLAJ2f (ORCPT ); Tue, 1 Dec 2020 04:28:35 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2307EC0613D3 for ; Tue, 1 Dec 2020 01:27:56 -0800 (PST) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kk1wn-0000MS-9y; Tue, 01 Dec 2020 10:27:45 +0100 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kk1wl-0004hX-PB; Tue, 01 Dec 2020 10:27:43 +0100 From: Oleksij Rempel To: Mark Rutland , Rob Herring , Sascha Hauer , Shawn Guo , Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter Cc: Oleksij Rempel , Rob Herring , devicetree@vger.kernel.org, Fabio Estevam , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , David Jander , dri-devel@lists.freedesktop.org Subject: [PATCH v5 3/6] dt-bindings: arm: fsl: add Plymovent M2M board Date: Tue, 1 Dec 2020 10:27:39 +0100 Message-Id: <20201201092742.17658-4-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201201092742.17658-1-o.rempel@pengutronix.de> References: <20201201092742.17658-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Plymovent Group BV M2M iMX6dl based board Signed-off-by: Oleksij Rempel Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 4772f64c4463..36c5a0c5ace2 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -364,6 +364,7 @@ properties: - fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board - karo,imx6dl-tx6dl # Ka-Ro electronics TX6U Modules - kontron,imx6dl-samx6i # Kontron i.MX6 Solo SMARC Module + - ply,plym2m # Plymovent M2M board - poslab,imx6dl-savageboard # Poslab SavageBoard Dual - prt,prtrvt # Protonic RVT board - prt,prtvt7 # Protonic VT7 board From patchwork Tue Dec 1 09:27:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 336215 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D256C8301E for ; Tue, 1 Dec 2020 09:29:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 396E920809 for ; Tue, 1 Dec 2020 09:29:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391170AbgLAJ3d (ORCPT ); Tue, 1 Dec 2020 04:29:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391022AbgLAJ3Q (ORCPT ); Tue, 1 Dec 2020 04:29:16 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9197C061A49 for ; Tue, 1 Dec 2020 01:28:30 -0800 (PST) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kk1wn-0000MT-9p; Tue, 01 Dec 2020 10:27:45 +0100 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kk1wl-0004hh-QG; Tue, 01 Dec 2020 10:27:43 +0100 From: Oleksij Rempel To: Mark Rutland , Rob Herring , Sascha Hauer , Shawn Guo , Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter Cc: Oleksij Rempel , David Jander , devicetree@vger.kernel.org, Fabio Estevam , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , dri-devel@lists.freedesktop.org Subject: [PATCH v5 4/6] ARM: dts: add Plymovent M2M board Date: Tue, 1 Dec 2020 10:27:40 +0100 Message-Id: <20201201092742.17658-5-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201201092742.17658-1-o.rempel@pengutronix.de> References: <20201201092742.17658-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Plymovent M2M is a control interface produced for the Plymovent filter systems. Co-Developed-by: David Jander Signed-off-by: David Jander Signed-off-by: Oleksij Rempel --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-plym2m.dts | 446 ++++++++++++++++++++++++++++ 2 files changed, 447 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-plym2m.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 3ab9d58428cf..31249fc5f85c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -461,6 +461,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-pico-hobbit.dtb \ imx6dl-pico-nymph.dtb \ imx6dl-pico-pi.dtb \ + imx6dl-plym2m.dtb \ imx6dl-prtrvt.dtb \ imx6dl-prtvt7.dtb \ imx6dl-rex-basic.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-plym2m.dts b/arch/arm/boot/dts/imx6dl-plym2m.dts new file mode 100644 index 000000000000..4d0d3d3386af --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-plym2m.dts @@ -0,0 +1,446 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2014 Protonic Holland + * Copyright (c) 2020 Oleksij Rempel , Pengutronix + */ + +/dts-v1/; +#include +#include +#include "imx6dl.dtsi" + +/ { + model = "Plymovent M2M board"; + compatible = "ply,plym2m", "fsl,imx6dl"; + + chosen { + stdout-path = &uart4; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 5000000 0>; + brightness-levels = <0 1000>; + num-interpolated-steps = <20>; + default-brightness-level = <19>; + power-supply = <®_12v0>; + }; + + display { + compatible = "fsl,imx-parallel-display"; + pinctrl-0 = <&pinctrl_ipu1_disp>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + display_in: endpoint { + remote-endpoint = <&ipu1_di0_disp0>; + }; + }; + + port@1 { + reg = <1>; + + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + led-0 { + label = "debug0"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + panel { + compatible = "edt,etm0700g0bdh6"; + backlight = <&backlight>; + power-supply = <®_3v3>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; + + clk50m_phy: phy-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_12v0: regulator-12v0 { + compatible = "regulator-fixed"; + regulator-name = "12v0"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + xceiver-supply = <®_5v0>; + status = "okay"; +}; + +&ecspi1 { + cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + }; +}; + +&ecspi2 { + cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + status = "okay"; + + touchscreen@0 { + compatible = "ti,tsc2046"; + reg = <0>; + pinctrl-0 = <&pinctrl_tsc2046>; + pinctrl-names ="default"; + spi-max-frequency = <100000>; + interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>; + pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; + + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-inverted-x; + touchscreen-inverted-y; + touchscreen-max-pressure = <4095>; + + ti,vref-delay-usecs = /bits/ 16 <100>; + ti,x-plate-ohms = /bits/ 16 <800>; + ti,y-plate-ohms = /bits/ 16 <300>; + + wakeup-source; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rmii"; + clocks = <&clks IMX6QDL_CLK_ENET>, + <&clks IMX6QDL_CLK_ENET>, + <&clk50m_phy>; + clock-names = "ipg", "ahb", "ptp"; + phy-handle = <&rgmii_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + /* Microchip KSZ8081RNA PHY */ + rgmii_phy: ethernet-phy@0 { + reg = <0>; + interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <300>; + }; + }; +}; + +&gpio1 { + gpio-line-names = + "CAN1_TERM", "SD1_CD", "", "", "", "", "", "", + "DEBUG_0", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio2 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", ""; +}; + +&gpio3 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "CAN1_SR", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio5 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "ETH_RESET", "ETH_INTRP", + "", "", "", "", "", "", "", ""; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + /* additional i2c devices are added automatically by the boot loader */ +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + temperature-sensor@70 { + compatible = "ti,tmp103"; + reg = <0x70>; + }; +}; + +&ipu1_di0_disp0 { + remote-endpoint = <&display_in>; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usbphynop1 { + status = "disabled"; +}; + +&usbphynop2 { + status = "disabled"; +}; + +&usbotg { + phy_type = "utmi"; + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + no-1-8-v; + disable-wp; + cap-sd-highspeed; + no-mmc; + no-sdio; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + no-1-8-v; + non-removable; + no-sd; + no-sdio; + status = "okay"; +}; + +&iomuxc { + pinctrl_can1: can1grp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008 + /* CAN1_SR */ + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008 + /* CAN1_TERM */ + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008 + /* CS */ + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x10000 + MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x3008 + MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x3008 + /* CS */ + MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x3008 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + /* MX6QDL_ENET_PINGRP4 */ + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0 + /* Phy reset */ + MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0 + /* nINTRP */ + MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_ipu1_disp: ipudisp1grp { + fsl,pins = < + /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */ + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30 + >; + }; + + pinctrl_leds: ledsgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8 + >; + }; + + pinctrl_tsc2046: tsc2046grp { + fsl,pins = < + /* TSC_PENIRQ */ + MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 + /* TSC_BUSY */ + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1 + >; + }; +}; From patchwork Tue Dec 1 09:27:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 335268 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6AF9C83013 for ; Tue, 1 Dec 2020 09:28:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6914B21D7A for ; Tue, 1 Dec 2020 09:28:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390732AbgLAJ2m (ORCPT ); Tue, 1 Dec 2020 04:28:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390706AbgLAJ2l (ORCPT ); Tue, 1 Dec 2020 04:28:41 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00569C0613D6 for ; Tue, 1 Dec 2020 01:28:01 -0800 (PST) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kk1wn-0000MU-9y; Tue, 01 Dec 2020 10:27:45 +0100 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kk1wl-0004i9-RK; Tue, 01 Dec 2020 10:27:43 +0100 From: Oleksij Rempel To: Mark Rutland , Rob Herring , Sascha Hauer , Shawn Guo , Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter Cc: Oleksij Rempel , Rob Herring , devicetree@vger.kernel.org, Fabio Estevam , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , David Jander , dri-devel@lists.freedesktop.org Subject: [PATCH v5 5/6] dt-bindings: arm: fsl: add Plymovent BAS board Date: Tue, 1 Dec 2020 10:27:41 +0100 Message-Id: <20201201092742.17658-6-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201201092742.17658-1-o.rempel@pengutronix.de> References: <20201201092742.17658-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Plymovent Group BV BAS iMX6dl based board Signed-off-by: Oleksij Rempel Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 36c5a0c5ace2..490cbc75b18a 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -364,6 +364,7 @@ properties: - fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board - karo,imx6dl-tx6dl # Ka-Ro electronics TX6U Modules - kontron,imx6dl-samx6i # Kontron i.MX6 Solo SMARC Module + - ply,plybas # Plymovent BAS board - ply,plym2m # Plymovent M2M board - poslab,imx6dl-savageboard # Poslab SavageBoard Dual - prt,prtrvt # Protonic RVT board From patchwork Tue Dec 1 09:27:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksij Rempel X-Patchwork-Id: 336214 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C1DEC83014 for ; Tue, 1 Dec 2020 09:29:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 114FD21D7A for ; Tue, 1 Dec 2020 09:29:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390882AbgLAJ3f (ORCPT ); Tue, 1 Dec 2020 04:29:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390879AbgLAJ3P (ORCPT ); Tue, 1 Dec 2020 04:29:15 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1087FC061A47 for ; Tue, 1 Dec 2020 01:28:25 -0800 (PST) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kk1wn-0000MV-9p; Tue, 01 Dec 2020 10:27:45 +0100 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kk1wl-0004iL-SQ; Tue, 01 Dec 2020 10:27:43 +0100 From: Oleksij Rempel To: Mark Rutland , Rob Herring , Sascha Hauer , Shawn Guo , Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter Cc: Oleksij Rempel , David Jander , devicetree@vger.kernel.org, Fabio Estevam , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , dri-devel@lists.freedesktop.org Subject: [PATCH v5 6/6] ARM: dts: add Plymovent BAS board Date: Tue, 1 Dec 2020 10:27:42 +0100 Message-Id: <20201201092742.17658-7-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201201092742.17658-1-o.rempel@pengutronix.de> References: <20201201092742.17658-1-o.rempel@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Plymovent BAS is a base system controller produced for the Plymovent filter systems. Co-Developed-by: David Jander Signed-off-by: David Jander Signed-off-by: Oleksij Rempel --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-plybas.dts | 394 ++++++++++++++++++++++++++++ 2 files changed, 395 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-plybas.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 31249fc5f85c..ee725aebc3a8 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -461,6 +461,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-pico-hobbit.dtb \ imx6dl-pico-nymph.dtb \ imx6dl-pico-pi.dtb \ + imx6dl-plybas.dtb \ imx6dl-plym2m.dtb \ imx6dl-prtrvt.dtb \ imx6dl-prtvt7.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-plybas.dts b/arch/arm/boot/dts/imx6dl-plybas.dts new file mode 100644 index 000000000000..333c306aa946 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-plybas.dts @@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2014 Protonic Holland + * Copyright (c) 2020 Oleksij Rempel , Pengutronix + */ + +/dts-v1/; +#include +#include +#include "imx6dl.dtsi" + +/ { + model = "Plymovent BAS board"; + compatible = "ply,plybas", "fsl,imx6dl"; + + chosen { + stdout-path = &uart4; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + button@20 { + label = "START"; + linux,code = <31>; + gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; + }; + + button@21 { + label = "CLEAN"; + linux,code = <46>; + gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + led-0 { + label = "debug0"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + label = "debug1"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label = "light_tower1"; + gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-3 { + label = "light_tower2"; + gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>; + }; + + led-4 { + label = "light_tower3"; + gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; + }; + + led-5 { + label = "light_tower4"; + gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>; + }; + }; + + clk50m_phy: phy-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + + reg_5v0: regulator-5v0 { + compatible = "regulator-fixed"; + regulator-name = "5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + xceiver-supply = <®_5v0>; + status = "okay"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can2>; + xceiver-supply = <®_5v0>; + status = "okay"; +}; + +&ecspi1 { + cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rmii"; + clocks = <&clks IMX6QDL_CLK_ENET>, + <&clks IMX6QDL_CLK_ENET>, + <&clk50m_phy>; + clock-names = "ipg", "ahb", "ptp"; + phy-handle = <&rgmii_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + /* Microchip KSZ8081RNA PHY */ + rgmii_phy: ethernet-phy@0 { + reg = <0>; + interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <300>; + }; + }; +}; + +&gpio1 { + gpio-line-names = + "", "SD1_CD", "", "", "", "", "", "", + "DEBUG_0", "DEBUG_1", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "ECSPI1_SS1", "", "USB_EXT_PWR", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "CAN1_SR", "CAN2_SR", "", "", + "LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "IMX6_IN12", "IMX6_HMI", + "IMX6_IN11", "IMX6_BUZZER", "IMX6_LED1", "IMX6_LED2", + "IMX6_LED3", "IMX6_LED4", "ETH_RESET", "IMX6_ANA_OUT_SD", + "IMX6_ANA_OUT_ERR", "IMX6_ANA_OUT", "ETH_INTRP", ""; +}; + +&gpio5 { + gpio-line-names = + "", "", "", "", "", "IMX6_RELAY1", "IMX6_RELAY2", "", + "IMX6_IN1", "IMX6_IN2", "IMX6_IN3", "IMX6_IN4", "IMX6_IN5", + "IMX6_IN6", "IMX6_IN7", "IMX6_IN8", + "IMX6_IN9", "IMX6_IN10", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + /* additional i2c devices are added automatically by the boot loader */ +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + temperature-sensor@70 { + compatible = "ti,tmp103"; + reg = <0x70>; + }; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + fsl,uart-has-rtscts; + linux,rs485-enabled-at-boot-time; + rs485-rts-delay = <0 20>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usbotg { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + phy_type = "utmi"; + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbphynop1 { + status = "disabled"; +}; + +&usbphynop2 { + status = "disabled"; +}; + +&iomuxc { + pinctrl_can1: can1grp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008 + /* CAN1_SR */ + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008 + >; + }; + + pinctrl_can2: can2grp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000 + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008 + /* CAN2_SR */ + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13008 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008 + /* CS */ + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + /* MX6QDL_ENET_PINGRP4 */ + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0 + /* Phy reset */ + MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0 + /* nINTRP */ + MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_leds: ledsgrp { + fsl,pins = < + /* DEBUG_0 */ + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 + /* DEBUG_1 */ + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 + + /* LED1 (lighttower) */ + MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22 0x13070 + /* LED2 (lighttower) */ + MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23 0x13070 + /* LED3 (lighttower) */ + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x13070 + /* LED4 (lighttower) */ + MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x13070 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0 + >; + }; + + /* YaCO AUX Uart */ + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x130b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 + /* power enable, high active */ + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1 + >; + }; +};