From patchwork Wed Jan 24 18:34:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 125703 Delivered-To: patch@linaro.org Received: by 10.46.66.141 with SMTP id h13csp591955ljf; Wed, 24 Jan 2018 10:36:59 -0800 (PST) X-Google-Smtp-Source: AH8x226pt1aOs5g1L+8QSG2TDa9Cv6QGtGXp8vzp4jzNU3Ykfxiovy2ELO7mkEqUCEGPhF9Al0+k X-Received: by 10.107.37.19 with SMTP id l19mr10114972iol.193.1516819019690; Wed, 24 Jan 2018 10:36:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516819019; cv=none; d=google.com; s=arc-20160816; b=nFTgEA4ya6sDY/D1TATaluvOa5T3quV2GzT/AWlKOb0v6HRZUboD3UJ4x0LxdWFA52 E1fSacpcBmwJcjNYwAbVcbF0yzzcNWVEecxGe46bEyia3ybXxho77hBPFIszhoiRS0DA UvJIYLZl2PZf0XOnAYW+kNTYsfRRHNl4lpnVbPfTOeFU8wxFu0RK+I6Ye3Bioc2Xi6qT IB4ydIFKC2cACg4N0zOTjVvKBD5F3VcXNf5xIlZD3QvK6soZkqVBanNSGenJ+7aaW7Al KnPmCWZhBK+hYccIDrT9icgDCUpnZmXt//RZB3vzjfPb58IC6AAXfYep3rfYMwQg8kMG B29A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:dkim-signature:arc-authentication-results; bh=Qd/wckh9hGNUHaTVsLeTnkhg5hLUGL/q56TkUswXoHs=; b=h4T8XcTaHURBjMP6Bhpuvx09DxCxN/ZKJpDQIlRgAQniocE3LV0KdFDFn6K/2axbX0 AKdFdLMn3t4A+dS+oIrTPTG0byPicjvPPAK5ac42BIUW+WWDAknpl1y+3X1Tw3pUbXYA NZ0Yj7BWFGAMyQb0cA3+5b++UYKnu8lZJU0WPkaqcSyNJUlkEdnqWSqfnWUxH/ZFmQez IhxUgfmx5DX+2skFrEtC7qrZelL6l4KYIa/7faPQsaAM4akbNzH0D/8VtSDmAWHci5vL bLm3Tu42f7yI4FaQx2OTJT9LIncbdrn4D/AV36LvZPTpyyPFpLbE3QDHLKs02NxJg+iv lIbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aRm6ZmUC; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id b11si653538iob.148.2018.01.24.10.36.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:36:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aRm6ZmUC; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePsq-0001c3-1i; Wed, 24 Jan 2018 18:34:52 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePsp-0001bV-9w for xen-devel@lists.xen.org; Wed, 24 Jan 2018 18:34:51 +0000 X-Inumbo-ID: 4011088a-0135-11e8-ba59-bc764e045a96 Received: from mail-wm0-x244.google.com (unknown [2a00:1450:400c:c09::244]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 4011088a-0135-11e8-ba59-bc764e045a96; Wed, 24 Jan 2018 19:34:46 +0100 (CET) Received: by mail-wm0-x244.google.com with SMTP id g1so10217978wmg.2 for ; Wed, 24 Jan 2018 10:34:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AZK4I2Huzf9nDMly0fxwv0p4G3NSC6wmmfnk/60OBmY=; b=aRm6ZmUCxFR6U2TwMbXyzgJZ8eUp7Prxk/Xnr/Gt79BKXzXebySARJ9LfuV8//d/4y dKVKDlCtnEB+85b7RLgS2syZgLDZFAAzha07olCT6R7S4mBAF+m3E9RQGaj3d9R89eBi k/Ydi2SkGFmXiSeNHWDOsoQ3aKQ8KHYKLvD9E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AZK4I2Huzf9nDMly0fxwv0p4G3NSC6wmmfnk/60OBmY=; b=oigP4dIVs54H9jw4c1OAtzXp9VrpcQrnjeRjq8RWiFKZ1Ru0ndNkQGaNM5GtaqUnPd eJQQBHdLagD7QWNV3idoKEPzWu/+7mB+RtlLmvp3EgRkR3WJDLYi/bj4thJyufi6PMCM oIBijunMKLXRgVk++eC58wADIhUEaPfksGdTUcejM/txCqJBzh/Tnalu0cDIr963lTp8 3BFFv2+Ad4PkkytjTi1L9oI9qi57QYtahHbAMnfmFcGPy/JvWUrZe3FFln2mxYweZsBg R8Te+38aUhkzoMYeYhXLyqe7laZbIrKYq2dYFJciFIidm8+r7WcjykjXOqGjWy+sQcmK cusA== X-Gm-Message-State: AKwxytdt3N5Wl6LfY/0axgh8pPl22EegnPmCkMWUX/2v1VrY/JinnLYN HiVukGtmj+f08sWOwyXCAPbvLe3gPzM= X-Received: by 10.28.45.74 with SMTP id t71mr5381390wmt.90.1516818888523; Wed, 24 Jan 2018 10:34:48 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id 186sm1080120wmu.16.2018.01.24.10.34.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:34:48 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 24 Jan 2018 18:34:43 +0000 Message-Id: <20180124183445.23705-2-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124183445.23705-1-julien.grall@linaro.org> References: <20180124183445.23705-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH 1/3] xen/arm: vpsci: Removing dummy MIGRATE and MIGRATE_INFO_UP_CPU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The PSCI call MIGRATE and MIGRATE_INFO_UP_CPU are optional and implemented as just returning PSCI_NOT_SUPPORTED (aka UNKNOWN_FUNCTION for SMCCC). The new SMCCC framework is able to deal with unimplemented function and return the proper error code. So remove the implementations for both function. Signed-off-by: Julien Grall --- xen/arch/arm/vpsci.c | 10 ---------- xen/arch/arm/vsmc.c | 14 -------------- xen/include/asm-arm/perfc_defn.h | 2 -- xen/include/asm-arm/psci.h | 2 -- 4 files changed, 28 deletions(-) diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index cd724904ef..979d32ed6d 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -172,21 +172,11 @@ int32_t do_psci_0_2_affinity_info(register_t target_affinity, return PSCI_0_2_AFFINITY_LEVEL_OFF; } -int32_t do_psci_0_2_migrate(uint32_t target_cpu) -{ - return PSCI_NOT_SUPPORTED; -} - uint32_t do_psci_0_2_migrate_info_type(void) { return PSCI_0_2_TOS_MP_OR_NOT_PRESENT; } -register_t do_psci_0_2_migrate_info_up_cpu(void) -{ - return PSCI_NOT_SUPPORTED; -} - void do_psci_0_2_system_off( void ) { struct domain *d = current->domain; diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index c9064de37a..563c2d8dda 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -157,11 +157,6 @@ static bool handle_sssc(struct cpu_user_regs *regs) PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU: - perfc_incr(vpsci_migrate_info_up_cpu); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_up_cpu()); - return true; - case PSCI_0_2_FN_SYSTEM_OFF: perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); @@ -206,15 +201,6 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_MIGRATE: - { - uint32_t tcpu = PSCI_ARG32(regs, 1); - - perfc_incr(vpsci_cpu_migrate); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate(tcpu)); - return true; - } - case ARM_SMCCC_FUNC_CALL_COUNT: return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); diff --git a/xen/include/asm-arm/perfc_defn.h b/xen/include/asm-arm/perfc_defn.h index 5f957ee6ec..a7acb7d21c 100644 --- a/xen/include/asm-arm/perfc_defn.h +++ b/xen/include/asm-arm/perfc_defn.h @@ -27,12 +27,10 @@ PERFCOUNTER(vpsci_cpu_on, "vpsci: cpu_on") PERFCOUNTER(vpsci_cpu_off, "vpsci: cpu_off") PERFCOUNTER(vpsci_version, "vpsci: version") PERFCOUNTER(vpsci_migrate_info_type, "vpsci: migrate_info_type") -PERFCOUNTER(vpsci_migrate_info_up_cpu, "vpsci: migrate_info_up_cpu") PERFCOUNTER(vpsci_system_off, "vpsci: system_off") PERFCOUNTER(vpsci_system_reset, "vpsci: system_reset") PERFCOUNTER(vpsci_cpu_suspend, "vpsci: cpu_suspend") PERFCOUNTER(vpsci_cpu_affinity_info, "vpsci: cpu_affinity_info") -PERFCOUNTER(vpsci_cpu_migrate, "vpsci: cpu_migrate") PERFCOUNTER(vgicd_reads, "vgicd: read") PERFCOUNTER(vgicd_writes, "vgicd: write") diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index 635ea5dae4..f7e2139031 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -37,9 +37,7 @@ int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, register_t context_id); int32_t do_psci_0_2_affinity_info(register_t target_affinity, uint32_t lowest_affinity_level); -int32_t do_psci_0_2_migrate(uint32_t target_cpu); uint32_t do_psci_0_2_migrate_info_type(void); -register_t do_psci_0_2_migrate_info_up_cpu(void); void do_psci_0_2_system_off(void); void do_psci_0_2_system_reset(void); From patchwork Wed Jan 24 18:34:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 125705 Delivered-To: patch@linaro.org Received: by 10.46.66.141 with SMTP id h13csp591994ljf; Wed, 24 Jan 2018 10:37:03 -0800 (PST) X-Google-Smtp-Source: AH8x224MKnytPk4b0yc7J8MMYvUPM0XfQDNkTpsBd9DO9QWQR48doaH95WL2tf95STmnUxRK77RC X-Received: by 10.36.22.207 with SMTP id a198mr9780948ita.138.1516819022857; Wed, 24 Jan 2018 10:37:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516819022; cv=none; d=google.com; s=arc-20160816; b=mYRHPXe7GASOHSdZ2MZzb4qlPEbqR03re6cwbQkWj3svjtkC24813S5iZbQT9Zwh8m +XLJKp/kQvwotl+guVyZgdbSfZby45ENxp5b6L6ctbBSejiTCWc1JCZ3cJqrfh5LEHSA LphGAGQQziw/wVH36n3ekMu7s1mqroWZH/73zLz9nWJMvOcsbAyE4cQjmnXMCxDgO63G LE3ku7UhIVZ/qQg6JU4XpNTU2cGx4fuFLKkl/81sA7Oy+zMvHWd2A8LRh98As86gYtj4 uk+HhyepLvurksJVzFniB7q4OYMXpfGrH1XqVCqRIW/HXiRc5S+ecqbQA/1RhyuYUaUy ZLVQ== ARC-Message-Signature: i=1; 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[192.237.175.120]) by mx.google.com with ESMTPS id c17si637876itc.33.2018.01.24.10.37.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:37:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=H1S4FpWx; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePss-0001dJ-88; Wed, 24 Jan 2018 18:34:54 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePsq-0001cW-MN for xen-devel@lists.xen.org; Wed, 24 Jan 2018 18:34:52 +0000 X-Inumbo-ID: 40ad9a73-0135-11e8-ba59-bc764e045a96 Received: from mail-wr0-x242.google.com (unknown [2a00:1450:400c:c0c::242]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 40ad9a73-0135-11e8-ba59-bc764e045a96; Wed, 24 Jan 2018 19:34:47 +0100 (CET) Received: by mail-wr0-x242.google.com with SMTP id g21so5029846wrb.13 for ; Wed, 24 Jan 2018 10:34:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qe5V0UgMbc9nMwDoYRekhINhrdP82C7Wv6MNuvfmsyk=; b=H1S4FpWxqCgin38obESEOaNQ+PvFblZspadaeXaksYsiIOT+EVdmnK9PxDW9Epvfn1 Qt6sMRmMDk26mbdpPf0+HjGX67fgk1LmNe3srcSxdmADUKJacXgeAGrNDgKffynWtQcG AM7Tz80wqP32jZOh1IvwrOHt2cxrJsdpBpCF8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qe5V0UgMbc9nMwDoYRekhINhrdP82C7Wv6MNuvfmsyk=; b=DrQ8lh3LfCOHQOu7qVU69PlA5LjaZIpkjfTxAFB0xdm3Lv2uJA2JuzvI4hEmV0SDCl f4R/6Ks+7VOnurhjEUS5+fXook03HIR6nFjtAOwJwvVEFTjNiEPxP3xmXl+J8SiUgxFh /vOsJHwejSQb2942vo7LAmCKj19qS3eMaLmya1a4+CHuztraBFv8K9UVauY19E5pVkko PF55L4aGhEKCY1Cee0DO4mgX0iZF1SQvQ2G7KsiDjuUxjL4xOvcU2/+q+L1ZYPv+UuE5 zArivHAbDGWl7hpllBXwbffwJ0teP3zny/WbE0d0G4aTCS+emqX3ebK+xvb/NmL5yVp2 I0oA== X-Gm-Message-State: AKwxyteTGZbNBtMit9WrjbdYsiD8q/WuUHxFKjTfV9ZykyWYx0C+1qv9 M6bLL3Yi8bIm4d4NdpoQnrDtx9q6cWY= X-Received: by 10.223.176.173 with SMTP id i42mr6353783wra.47.1516818889622; Wed, 24 Jan 2018 10:34:49 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id 186sm1080120wmu.16.2018.01.24.10.34.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:34:49 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 24 Jan 2018 18:34:44 +0000 Message-Id: <20180124183445.23705-3-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124183445.23705-1-julien.grall@linaro.org> References: <20180124183445.23705-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH 2/3] xen/arm: vsmc: Don't implement function ID that doesn't exist X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The current implementation of SMCCC relies on the fact only function number (bits [15:0]) is enough to identify what to implement. However, PSCI call are only available in the range 0x84000000-0x8400001F and 0xC4000000-0xC400001F. Furthermore, not all SMC32 functions have equivalent in the SMC64. This is the case of: * PSCI_VERSION * CPU_OFF * MIGRATE_INFO_TYPE * SYSTEM_OFF * SYSTEM_RESET Similarly call count, uid, revision can only be query using smc32/hvc32 fast calls (See 6.2 in ARM DEN 0028B). Xen should only implement identifier existing in the specification in order to avoid potential clash with later revision. Therefore rework the vsmc code to use the whole function identifier rather than only the function number. Signed-off-by: Julien Grall --- This should be backported to Xen 4.10 as we should not implement functions identifier that does not exist toprevent clash with a later revision. --- xen/arch/arm/vsmc.c | 37 +++++++++++++++++++++---------------- xen/include/asm-arm/smccc.h | 20 +++++++++++++++++--- 2 files changed, 38 insertions(+), 19 deletions(-) diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 563c2d8dda..7ca2880173 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -84,13 +84,15 @@ static bool fill_function_call_count(struct cpu_user_regs *regs, uint32_t cnt) /* SMCCC interface for hypervisor. Tell about itself. */ static bool handle_hypervisor(struct cpu_user_regs *regs) { - switch ( smccc_get_fn(get_user_reg(regs, 0)) ) + uint32_t fid = (uint32_t)get_user_reg(regs, 0); + + switch ( fid ) { - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_FUNC_CALL_COUNT(HYPERVISOR): return fill_function_call_count(regs, XEN_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_FUNC_CALL_UID(HYPERVISOR): return fill_uid(regs, XEN_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_FUNC_CALL_REVISION(HYPERVISOR): return fill_revision(regs, XEN_SMCCC_MAJOR_REVISION, XEN_SMCCC_MINOR_REVISION); default: @@ -140,36 +142,37 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( smccc_get_fn(fid) ) + switch ( fid ) { - case PSCI_0_2_FN_PSCI_VERSION: + case PSCI_0_2_FN32(PSCI_VERSION): perfc_incr(vpsci_version); PSCI_SET_RESULT(regs, do_psci_0_2_version()); return true; - case PSCI_0_2_FN_CPU_OFF: + case PSCI_0_2_FN32(CPU_OFF): perfc_incr(vpsci_cpu_off); PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); return true; - case PSCI_0_2_FN_MIGRATE_INFO_TYPE: + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): perfc_incr(vpsci_migrate_info_type); PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); return true; - case PSCI_0_2_FN_SYSTEM_OFF: + case PSCI_0_2_FN32(SYSTEM_OFF): perfc_incr(vpsci_system_off); do_psci_0_2_system_off(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_SYSTEM_RESET: + case PSCI_0_2_FN32(SYSTEM_RESET): perfc_incr(vpsci_system_reset); do_psci_0_2_system_reset(); PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); return true; - case PSCI_0_2_FN_CPU_ON: + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): { register_t vcpuid = PSCI_ARG(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -180,7 +183,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_CPU_SUSPEND: + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): { uint32_t pstate = PSCI_ARG32(regs, 1); register_t epoint = PSCI_ARG(regs, 2); @@ -191,7 +195,8 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): { register_t taff = PSCI_ARG(regs, 1); uint32_t laff = PSCI_ARG32(regs, 2); @@ -201,13 +206,13 @@ static bool handle_sssc(struct cpu_user_regs *regs) return true; } - case ARM_SMCCC_FUNC_CALL_COUNT: + case ARM_SMCCC_FUNC_CALL_COUNT(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); - case ARM_SMCCC_FUNC_CALL_UID: + case ARM_SMCCC_FUNC_CALL_UID(STANDARD): return fill_uid(regs, SSSC_SMCCC_UID); - case ARM_SMCCC_FUNC_CALL_REVISION: + case ARM_SMCCC_FUNC_CALL_REVISION(STANDARD): return fill_revision(regs, SSSC_SMCCC_MAJOR_REVISION, SSSC_SMCCC_MINOR_REVISION); diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index f543dea0bb..303517459f 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -82,9 +82,23 @@ static inline uint32_t smccc_get_owner(register_t funcid) #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 /* List of generic function numbers */ -#define ARM_SMCCC_FUNC_CALL_COUNT 0xFF00 -#define ARM_SMCCC_FUNC_CALL_UID 0xFF01 -#define ARM_SMCCC_FUNC_CALL_REVISION 0xFF03 +#define ARM_SMCCC_FUNC_CALL_COUNT(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF00) + +#define ARM_SMCCC_FUNC_CALL_UID(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF01) + +#define ARM_SMCCC_FUNC_CALL_REVISION(owner) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_CONV_32, \ + ARM_SMCCC_OWNER_##owner, \ + 0xFF03) /* Only one error code defined in SMCCC */ #define ARM_SMCCC_ERR_UNKNOWN_FUNCTION (-1) From patchwork Wed Jan 24 18:34:45 2018 Content-Type: text/plain; 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[192.237.175.120]) by mx.google.com with ESMTPS id 80si652154ioo.242.2018.01.24.10.37.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:37:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=dqyYI2fs; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePsu-0001fJ-IZ; Wed, 24 Jan 2018 18:34:56 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eePst-0001eS-2c for xen-devel@lists.xen.org; Wed, 24 Jan 2018 18:34:55 +0000 X-Inumbo-ID: 415cca65-0135-11e8-ba59-bc764e045a96 Received: from mail-wm0-x241.google.com (unknown [2a00:1450:400c:c09::241]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 415cca65-0135-11e8-ba59-bc764e045a96; Wed, 24 Jan 2018 19:34:48 +0100 (CET) Received: by mail-wm0-x241.google.com with SMTP id t74so10285911wme.3 for ; Wed, 24 Jan 2018 10:34:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CVh9F4yrtP+ll/vzTNfcvIcWsZqBK6F7J1mk0UYuKKQ=; b=dqyYI2fss4vl0W3McjJhDIhdoQg3pxecmrXcmA1xjIOl0X+C7Zl2T4mopymjlADmyE lW1DMFGElL3bsuUulFi5WMu0R+akv5MxtfLrGrMBC3yKWu8KqomJR59UT2VN4mjvbgZr 4JT0DOTVlPF0Y5+i0DzraQnQqVqRimJE2Hw6Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CVh9F4yrtP+ll/vzTNfcvIcWsZqBK6F7J1mk0UYuKKQ=; b=MVF4q1NrAraKTR75Q/QRgKU/wEsZoqxjy1CYKP0APWLblK0nlR5/eyqh2CLRlq8381 v+YKy2T89fkEly4jWM6G3Hp+EFMXy0RaUAjd9u2UkGRV8toign/Zv3xK4jshYdtuc0q3 FTY3zsPPQeg5eNi+Hmd8xlrZYbve5TWQBa2yDUqYeDslB6NiyXqJB4bmwqlV7FVZT2ty XK3DPX8qVnPrwDoaBgtwsNmLBtQ1BA6hoM0nu8/md4Tr13lhDQTSNp47f0qyFA7mmePW OJiSGfviG+5uA6sclbxDzVnTjrjicjBCAScY/r9/zX6PXaBiKkaW6z1oY+yiYbXFYCCF nY5w== X-Gm-Message-State: AKwxytePH3T792pktpxjbq34DTk/0O4AH20EcVevceZWxTi5jssaj/uL AB+BCpsU+uN8JEwiaGno969rPDfZ620= X-Received: by 10.28.71.70 with SMTP id u67mr5374069wma.46.1516818890716; Wed, 24 Jan 2018 10:34:50 -0800 (PST) Received: from e108454-lin.cambridge.arm.com ([2001:41d0:1:6c23::1]) by smtp.gmail.com with ESMTPSA id 186sm1080120wmu.16.2018.01.24.10.34.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Jan 2018 10:34:50 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 24 Jan 2018 18:34:45 +0000 Message-Id: <20180124183445.23705-4-julien.grall@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124183445.23705-1-julien.grall@linaro.org> References: <20180124183445.23705-1-julien.grall@linaro.org> Cc: sstabellini@kernel.org, volodymyr_babchuk@epam.com, andre.przywara@linaro.org, Julien Grall Subject: [Xen-devel] [PATCH 3/3] xen/arm: vpsci: Move PSCI function dispatching from vsmc.c to vpsci.c X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" At the moment PSCI function dispatching is done in vsmc.c and the function implementation in vpsci.c. Some bits of the implementation is even done in vsmc.c (see PSCI_SYSTEM_RESET). This means that it is difficult to follow the implementation and also requires to export functions for each PSCI functions. Therefore move PSCI dispatching in two new functions do_psci_0_1_call and do_psci_0_2_call. The former will handle PSCI 0.1 call while the latter 0.2 or later call. Signed-off-by: Julien Grall --- xen/arch/arm/vpsci.c | 141 ++++++++++++++++++++++++++++++++++++++++----- xen/arch/arm/vsmc.c | 95 ++---------------------------- xen/include/asm-arm/psci.h | 21 +------ 3 files changed, 135 insertions(+), 122 deletions(-) diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 979d32ed6d..b3ee193621 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -91,12 +91,12 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point, return PSCI_SUCCESS; } -int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) +static int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) { return do_common_cpu_on(vcpuid, entry_point, 0 , PSCI_VERSION(0, 1)); } -int32_t do_psci_cpu_off(uint32_t power_state) +static int32_t do_psci_cpu_off(uint32_t power_state) { struct vcpu *v = current; if ( !test_and_set_bit(_VPF_down, &v->pause_flags) ) @@ -104,13 +104,14 @@ int32_t do_psci_cpu_off(uint32_t power_state) return PSCI_SUCCESS; } -uint32_t do_psci_0_2_version(void) +static uint32_t do_psci_0_2_version(void) { return PSCI_VERSION(0, 2); } -register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, - register_t context_id) +static register_t do_psci_0_2_cpu_suspend(uint32_t power_state, + register_t entry_point, + register_t context_id) { struct vcpu *v = current; @@ -123,13 +124,14 @@ register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, return PSCI_SUCCESS; } -int32_t do_psci_0_2_cpu_off(void) +static int32_t do_psci_0_2_cpu_off(void) { return do_psci_cpu_off(0); } -int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, - register_t context_id) +static int32_t do_psci_0_2_cpu_on(register_t target_cpu, + register_t entry_point, + register_t context_id) { return do_common_cpu_on(target_cpu, entry_point, context_id, PSCI_VERSION(0, 2)); @@ -144,8 +146,8 @@ static const unsigned long target_affinity_mask[] = { #endif }; -int32_t do_psci_0_2_affinity_info(register_t target_affinity, - uint32_t lowest_affinity_level) +static int32_t do_psci_0_2_affinity_info(register_t target_affinity, + uint32_t lowest_affinity_level) { struct domain *d = current->domain; struct vcpu *v; @@ -172,23 +174,136 @@ int32_t do_psci_0_2_affinity_info(register_t target_affinity, return PSCI_0_2_AFFINITY_LEVEL_OFF; } -uint32_t do_psci_0_2_migrate_info_type(void) +static uint32_t do_psci_0_2_migrate_info_type(void) { return PSCI_0_2_TOS_MP_OR_NOT_PRESENT; } -void do_psci_0_2_system_off( void ) +static void do_psci_0_2_system_off( void ) { struct domain *d = current->domain; domain_shutdown(d,SHUTDOWN_poweroff); } -void do_psci_0_2_system_reset(void) +static void do_psci_0_2_system_reset(void) { struct domain *d = current->domain; domain_shutdown(d,SHUTDOWN_reboot); } +#define PSCI_SET_RESULT(reg, val) set_user_reg(reg, 0, val) +#define PSCI_ARG(reg, n) get_user_reg(reg, n) + +#ifdef CONFIG_ARM_64 +#define PSCI_ARG32(reg, n) (uint32_t)(get_user_reg(reg, n)) +#else +#define PSCI_ARG32(reg, n) PSCI_ARG(reg, n) +#endif + +/* + * PSCI 0.1 calls. It will return false if the function ID is not + * handled. + */ +bool do_psci_0_1_call(struct cpu_user_regs *regs, uint32_t fid) +{ + switch ( (uint32_t)get_user_reg(regs, 0) ) + { + case PSCI_cpu_off: + { + uint32_t pstate = PSCI_ARG32(regs, 1); + + perfc_incr(vpsci_cpu_off); + PSCI_SET_RESULT(regs, do_psci_cpu_off(pstate)); + return true; + } + case PSCI_cpu_on: + { + uint32_t vcpuid = PSCI_ARG32(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + + perfc_incr(vpsci_cpu_on); + PSCI_SET_RESULT(regs, do_psci_cpu_on(vcpuid, epoint)); + return true; + } + default: + return false; + } +} + +/* + * PSCI 0.2 or later calls. It will return false if the function ID is + * not handled. + */ +bool do_psci_0_2_call(struct cpu_user_regs *regs, uint32_t fid) +{ + switch ( fid ) + { + case PSCI_0_2_FN32(PSCI_VERSION): + perfc_incr(vpsci_version); + PSCI_SET_RESULT(regs, do_psci_0_2_version()); + return true; + + case PSCI_0_2_FN32(CPU_OFF): + perfc_incr(vpsci_cpu_off); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); + return true; + + case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): + perfc_incr(vpsci_migrate_info_type); + PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); + return true; + + case PSCI_0_2_FN32(SYSTEM_OFF): + perfc_incr(vpsci_system_off); + do_psci_0_2_system_off(); + PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); + return true; + + case PSCI_0_2_FN32(SYSTEM_RESET): + perfc_incr(vpsci_system_reset); + do_psci_0_2_system_reset(); + PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); + return true; + + case PSCI_0_2_FN32(CPU_ON): + case PSCI_0_2_FN64(CPU_ON): + { + register_t vcpuid = PSCI_ARG(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + register_t cid = PSCI_ARG(regs, 3); + + perfc_incr(vpsci_cpu_on); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_on(vcpuid, epoint, cid)); + return true; + } + + case PSCI_0_2_FN32(CPU_SUSPEND): + case PSCI_0_2_FN64(CPU_SUSPEND): + { + uint32_t pstate = PSCI_ARG32(regs, 1); + register_t epoint = PSCI_ARG(regs, 2); + register_t cid = PSCI_ARG(regs, 3); + + perfc_incr(vpsci_cpu_suspend); + PSCI_SET_RESULT(regs, do_psci_0_2_cpu_suspend(pstate, epoint, cid)); + return true; + } + + case PSCI_0_2_FN32(AFFINITY_INFO): + case PSCI_0_2_FN64(AFFINITY_INFO): + { + register_t taff = PSCI_ARG(regs, 1); + uint32_t laff = PSCI_ARG32(regs, 2); + + perfc_incr(vpsci_cpu_affinity_info); + PSCI_SET_RESULT(regs, do_psci_0_2_affinity_info(taff, laff)); + return true; + } + default: + return false; + } +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 7ca2880173..9b48d52896 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -100,41 +100,13 @@ static bool handle_hypervisor(struct cpu_user_regs *regs) } } -#define PSCI_SET_RESULT(reg, val) set_user_reg(reg, 0, val) -#define PSCI_ARG(reg, n) get_user_reg(reg, n) - -#ifdef CONFIG_ARM_64 -#define PSCI_ARG32(reg, n) (uint32_t)(get_user_reg(reg, n)) -#else -#define PSCI_ARG32(reg, n) PSCI_ARG(reg, n) -#endif - /* Existing (pre SMCCC) APIs. This includes PSCI 0.1 interface */ static bool handle_existing_apis(struct cpu_user_regs *regs) { /* Only least 32 bits are significant (ARM DEN 0028B, page 12) */ - switch ( (uint32_t)get_user_reg(regs, 0) ) - { - case PSCI_cpu_off: - { - uint32_t pstate = PSCI_ARG32(regs, 1); - - perfc_incr(vpsci_cpu_off); - PSCI_SET_RESULT(regs, do_psci_cpu_off(pstate)); - return true; - } - case PSCI_cpu_on: - { - uint32_t vcpuid = PSCI_ARG32(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); + uint32_t fid = (uint32_t)get_user_reg(regs, 0); - perfc_incr(vpsci_cpu_on); - PSCI_SET_RESULT(regs, do_psci_cpu_on(vcpuid, epoint)); - return true; - } - default: - return false; - } + return do_psci_0_1_call(regs, fid); } /* PSCI 0.2 interface and other Standard Secure Calls */ @@ -142,70 +114,11 @@ static bool handle_sssc(struct cpu_user_regs *regs) { uint32_t fid = (uint32_t)get_user_reg(regs, 0); - switch ( fid ) - { - case PSCI_0_2_FN32(PSCI_VERSION): - perfc_incr(vpsci_version); - PSCI_SET_RESULT(regs, do_psci_0_2_version()); + if ( do_psci_0_2_call(regs, fid) ) return true; - case PSCI_0_2_FN32(CPU_OFF): - perfc_incr(vpsci_cpu_off); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_off()); - return true; - - case PSCI_0_2_FN32(MIGRATE_INFO_TYPE): - perfc_incr(vpsci_migrate_info_type); - PSCI_SET_RESULT(regs, do_psci_0_2_migrate_info_type()); - return true; - - case PSCI_0_2_FN32(SYSTEM_OFF): - perfc_incr(vpsci_system_off); - do_psci_0_2_system_off(); - PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); - return true; - - case PSCI_0_2_FN32(SYSTEM_RESET): - perfc_incr(vpsci_system_reset); - do_psci_0_2_system_reset(); - PSCI_SET_RESULT(regs, PSCI_INTERNAL_FAILURE); - return true; - - case PSCI_0_2_FN32(CPU_ON): - case PSCI_0_2_FN64(CPU_ON): - { - register_t vcpuid = PSCI_ARG(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); - register_t cid = PSCI_ARG(regs, 3); - - perfc_incr(vpsci_cpu_on); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_on(vcpuid, epoint, cid)); - return true; - } - - case PSCI_0_2_FN32(CPU_SUSPEND): - case PSCI_0_2_FN64(CPU_SUSPEND): - { - uint32_t pstate = PSCI_ARG32(regs, 1); - register_t epoint = PSCI_ARG(regs, 2); - register_t cid = PSCI_ARG(regs, 3); - - perfc_incr(vpsci_cpu_suspend); - PSCI_SET_RESULT(regs, do_psci_0_2_cpu_suspend(pstate, epoint, cid)); - return true; - } - - case PSCI_0_2_FN32(AFFINITY_INFO): - case PSCI_0_2_FN64(AFFINITY_INFO): + switch ( fid ) { - register_t taff = PSCI_ARG(regs, 1); - uint32_t laff = PSCI_ARG32(regs, 2); - - perfc_incr(vpsci_cpu_affinity_info); - PSCI_SET_RESULT(regs, do_psci_0_2_affinity_info(taff, laff)); - return true; - } - case ARM_SMCCC_FUNC_CALL_COUNT(STANDARD): return fill_function_call_count(regs, SSSC_SMCCC_FUNCTION_COUNT); diff --git a/xen/include/asm-arm/psci.h b/xen/include/asm-arm/psci.h index f7e2139031..3075c998f3 100644 --- a/xen/include/asm-arm/psci.h +++ b/xen/include/asm-arm/psci.h @@ -22,24 +22,9 @@ int call_psci_cpu_on(int cpu); void call_psci_system_off(void); void call_psci_system_reset(void); -/* functions to handle guest PSCI requests */ -int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point); -int32_t do_psci_cpu_off(uint32_t power_state); -int32_t do_psci_cpu_suspend(uint32_t power_state, register_t entry_point); -int32_t do_psci_migrate(uint32_t vcpuid); - -/* PSCI 0.2 functions to handle guest PSCI requests */ -uint32_t do_psci_0_2_version(void); -register_t do_psci_0_2_cpu_suspend(uint32_t power_state, register_t entry_point, - register_t context_id); -int32_t do_psci_0_2_cpu_off(void); -int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, - register_t context_id); -int32_t do_psci_0_2_affinity_info(register_t target_affinity, - uint32_t lowest_affinity_level); -uint32_t do_psci_0_2_migrate_info_type(void); -void do_psci_0_2_system_off(void); -void do_psci_0_2_system_reset(void); +/* Functions handle PSCI calls from the guests */ +bool do_psci_0_1_call(struct cpu_user_regs *regs, uint32_t fid); +bool do_psci_0_2_call(struct cpu_user_regs *regs, uint32_t fid); /* PSCI v0.2 interface */ #define PSCI_0_2_FN32(name) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \