From patchwork Fri Nov 27 11:14:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 334240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 826C0C8300C for ; Fri, 27 Nov 2020 11:15:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 22E9B21534 for ; Fri, 27 Nov 2020 11:15:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="P1kLGEEh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729475AbgK0LO4 (ORCPT ); Fri, 27 Nov 2020 06:14:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726171AbgK0LOz (ORCPT ); Fri, 27 Nov 2020 06:14:55 -0500 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1037C0613D1; Fri, 27 Nov 2020 03:14:54 -0800 (PST) Received: by mail-lj1-x236.google.com with SMTP id 142so5501754ljj.10; Fri, 27 Nov 2020 03:14:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7EfRMxFMYxp8cafazqipRekaMl967mWX/R9ctE83nsg=; b=P1kLGEEhxSt0HXNDK7TmwL+lEYEc1KV78LzoIyXCWjWxa1LL1M7eTDg6qUgQgJ3IGs oaCrWBPMNeyBihFmqve8ySqZDZnLujfvbZ8hthXDJFgPicVBFC+prduHJLoXXSqsguvJ 8WD3faP4UcttLB4wR3MLcojPKI78YBHS7Rb6UBcwRvrS2qddOE6WX+j24Ams1ZUrju0B pS7jHZhJthMKHlBqcFbu7/EEHbBrMQt6X9uhayMZsIuksT3/5SttwEr/nWpIRcZFgsx0 4+/TQTzv/VhOuNy+Beph86Pzd4UAR3e3RTsOzt8qeDxVgF5SwPbvP98BQK4d9DVIWnNr Vy0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7EfRMxFMYxp8cafazqipRekaMl967mWX/R9ctE83nsg=; b=VCpl4W1ppiaJmMR88UP5A2fjZpcp2IgCVYimxHONGIw6EIUA2aqCnuqJwsIR1fmEF+ 8uBtoRlCSNPIJsTRP6K4+I9eYD/VsirsV4J3g/BDOCrXJQGnGZOlYykE9F8VA5KVMeFd Tky7LhZ0JsEMZ7ZYKAWnzKQjrLB+psBXQwdTctxSKBtAdC2hAWUqe0dpRULQI9WBqQoY 9S9y2MlfKcqsIRz0CcAY9R4ljULFb3SZ+L2XaWc4ZGpgjhg/+1tu5tEwufnWPBW3TxwC oahYHIUpg29sdX0dTohzDGsdkcsJRHkbtJtypLBy/AX+kA6jdqryiJN+KvYz17Mf7g3E 7uuw== X-Gm-Message-State: AOAM53357mqYLm4krGqaUzOYyKEC3kA47iERMOuAMHACLHdQiaiwXvud bv/WurwBjwZ6DaC9V/dDTWUL1yVgz0w= X-Google-Smtp-Source: ABdhPJwW2Mk/ZnjKgb+JPWWTBN+H3/dxTUjU7lc3170fsL5fbWced/4BFGL/cbWAHWSLiBEa5CP12Q== X-Received: by 2002:a2e:8e98:: with SMTP id z24mr3071556ljk.150.1606475693078; Fri, 27 Nov 2020 03:14:53 -0800 (PST) Received: from elitebook.lan (ip-194-187-74-233.konfederacka.maverick.com.pl. [194.187.74.233]) by smtp.gmail.com with ESMTPSA id o7sm921105ljg.41.2020.11.27.03.14.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Nov 2020 03:14:52 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= To: Philipp Zabel , Rob Herring Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH 1/2] dt-bindings: reset: document Broadcom's BCM4908 PCIe reset binding Date: Fri, 27 Nov 2020 12:14:41 +0100 Message-Id: <20201127111442.1096-1-zajec5@gmail.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Rafał Miłecki BCM4908 was built using older PCIe hardware block that requires using external reset block controlling PERST# signals. Signed-off-by: Rafał Miłecki Acked-by: Florian Fainelli Reviewed-by: Rob Herring --- .../reset/brcm,bcm4908-misc-pcie-reset.yaml | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml new file mode 100644 index 000000000000..88aebb370838 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/brcm,bcm4908-misc-pcie-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom MISC block PCIe reset controller + +description: This document describes reset controller handling PCIe PERST# + signals. On BCM4908 it's a part of the MISC block. + +maintainers: + - Rafał Miłecki + +properties: + compatible: + const: brcm,bcm4908-misc-pcie-reset + + reg: + maxItems: 1 + + "#reset-cells": + description: PCIe core id + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +additionalProperties: false + +examples: + - | + reset-controller@ff802644 { + compatible = "brcm,bcm4908-misc-pcie-reset"; + reg = <0xff802644 0x04>; + #reset-cells = <1>; + }; From patchwork Fri Nov 27 11:14:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= X-Patchwork-Id: 334238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 924F7C64E7D for ; Fri, 27 Nov 2020 11:15:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3C89A21527 for ; Fri, 27 Nov 2020 11:15:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mS9fRCBR" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726178AbgK0LO6 (ORCPT ); Fri, 27 Nov 2020 06:14:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726171AbgK0LO5 (ORCPT ); Fri, 27 Nov 2020 06:14:57 -0500 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0981DC0613D1; Fri, 27 Nov 2020 03:14:57 -0800 (PST) Received: by mail-lj1-x22f.google.com with SMTP id 142so5501867ljj.10; Fri, 27 Nov 2020 03:14:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MDWcuAGJpVIB8jmN1qUTefyqwOuMfUN9elWty78uNLY=; b=mS9fRCBRWyl0XMX4oSvM+Q8kaLnTBcvNMKSossAvlAlcQNz8bjQQQ2Akp6JtWUWJ/t 4AXAPAqU2E3XYmxqpuxlo90V/7XkO4INXvCCYKWK5tEWuU/kvltjy5GE9Wep/O7B1PyW +Fp+fioQbWAQ95MDehgSS2CYL/eHck1cy0o+ZBF0m8goTE8GIuAFNEYiKGR1PBJjywQf b4s/hASjJcqzcMbVjij8CtSiomj63Q4zuZav+5/UWbnHNW5jXLDKNXcAE60HTF2ZchwY pjVnqyIaqECv9PzQN+eDTMnnzWlnsqp7Ygo3ZBuWPwxoJbmKtipUJgVdxxF8VEdjPqEB aNxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MDWcuAGJpVIB8jmN1qUTefyqwOuMfUN9elWty78uNLY=; b=sJ6Q9vnBKawvb8Au1N1UIu56TQs1CoMK89iQw3OTYiDierL+gffmKyPj/L1P3zIhDf NAZ3yvmdGM/KyBWKaDGjWjgXXM7QKXK8zIXz148bi9NBct3sDmrgeDKp2spdcIOIjtrg EyVls6yuvIcjiZ4XXxlSZlh+HDkRLJwoaDEZbQ+QdX0pSPCKfNFXJGXpMPhnAHKfl9z/ mjXUhEcWxUOqwheDjtcalmfLMhKX2e7K3Z82FadCdYy9p+N8F3FfQRktvEtqEF9T0m7G uaqQSWAjpI738nBBTt20lU59RP3cRchyr2fp5CbLgDVZW/EhC/nB3HztdipofYCjjqS/ /2zQ== X-Gm-Message-State: AOAM533YWc72+eKJyYKZ8Eg0DlbUdV9keEhHhEHTETJ7xTsZyDvYYbfT k42NP7z2X4TIpLnaZRGluBNLv4bfRyA= X-Google-Smtp-Source: ABdhPJwq4yuMS2CfUYhmRKfw0eg7DOGOi1fdexGaLty3eXtS7m2dO3ieqrD2jjYFLrGLrgzpm279pw== X-Received: by 2002:a2e:b055:: with SMTP id d21mr3283608ljl.131.1606475695535; Fri, 27 Nov 2020 03:14:55 -0800 (PST) Received: from elitebook.lan (ip-194-187-74-233.konfederacka.maverick.com.pl. [194.187.74.233]) by smtp.gmail.com with ESMTPSA id o7sm921105ljg.41.2020.11.27.03.14.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Nov 2020 03:14:54 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= To: Philipp Zabel , Rob Herring Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= Subject: [PATCH 2/2] reset: simple: add BCM4908 MISC PCIe reset controller support Date: Fri, 27 Nov 2020 12:14:42 +0100 Message-Id: <20201127111442.1096-2-zajec5@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201127111442.1096-1-zajec5@gmail.com> References: <20201127111442.1096-1-zajec5@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Rafał Miłecki It's a trivial reset controller. One register with bit per PCIe core. Signed-off-by: Rafał Miłecki --- drivers/reset/Kconfig | 2 +- drivers/reset/reset-simple.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index b7e377a32c92..f393f7e17e33 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -173,7 +173,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC + default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index e066614818a3..4dda0daf2c6f 100644 --- a/drivers/reset/reset-simple.c +++ b/drivers/reset/reset-simple.c @@ -146,6 +146,8 @@ static const struct of_device_id reset_simple_dt_ids[] = { { .compatible = "aspeed,ast2500-lpc-reset" }, { .compatible = "bitmain,bm1880-reset", .data = &reset_simple_active_low }, + { .compatible = "brcm,bcm4908-misc-pcie-reset", + .data = &reset_simple_active_low }, { .compatible = "snps,dw-high-reset" }, { .compatible = "snps,dw-low-reset", .data = &reset_simple_active_low },