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Signed-off-by: Joakim Zhang --- Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml index 5aad9f4e0b2a..80a92385367e 100644 --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml @@ -15,6 +15,9 @@ properties: - enum: - fsl,imx8-ddr-pmu - fsl,imx8m-ddr-pmu + - fsl,imx8mq-ddr-pmu + - fsl,imx8mm-ddr-pmu + - fsl,imx8mn-ddr-pmu - fsl,imx8mp-ddr-pmu - items: - enum: From patchwork Sat Nov 28 05:36:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joakim Zhang X-Patchwork-Id: 334204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MSGID_FROM_MTA_HEADER, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA8D2C83A8C for ; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: aFNFmjKw9VQqWkZEbhrRnsFBEru6L1g2mLgObUALI1ejQd4B1EU/cVUevQc9JPSSNvoXXmjTnYfT/LG0FzvG2TEIK1hWaa/zNpU6v3e5yGx+sR2kk9J02ZguzhyNL2Wkpm/psbuUseawso5SiDwh3qaQlGiuKYmyvYPYzTmdDQipnvgCSDudEZ5Iu0zpjG3325L4w5kAtnkY7ZLHnOTzXHidVbtcz4Xg/402wLduc8VKbgMTDoh7wXFXFm+ooICdMf+sEAqnAJ6pNKYEqWilyuEu9e6su1tiHRzXPEmhoiZiN+qEwmbE/zwb2yLDPC6FMSYkKo4N+nKRPtNWRS1jlN2ryL+fLkfSXj374s0EVKgJxS9A/Adda0yet/7sMT1DAMJslzBQ2nwyjS/KGQz6+j9xwwv3gF3SF5A+2ny/IDZemPMJselKlboqqKkf6aQdeaeW5nd9BlX9iwS9Zj5Smv8sSjZgg1+6zuJ2CWd7PrWDeM04EVJiRSYEwnuwYdeaMMh8ZbT7y+ybozzPPj78YcjFBrKmZNPlE56q2hZq1eOTYbdxqSaspIh1M++4lIm3e5dyZwro6Z9rRC1DKE6eSNEEPJscg6puhJLb9O0v+56Ge/dm9PmFIhtVRSCMs6hCbeMfJqPndaS/gIhMs0AKu5E+JKP74nxl31lSZuqXMVgoEuiGFAem/wZ1A/7wyQujdi5CWu12mf8snojbO9PBE7vQn4Bzn7CI9pSSpsazFKm5l59S+A3NMHsGwnZ52uoSL4p47/T81vBdOggIY2Rqo/tVGk/uH5gyS02N54Co603TxKN6PxfH7JFFp+tT570RW0618N9zSMTx3CqaLiYJUYcUhWGKrG03+PR/lhKCaqhzr3y+Ow5BVGSIkhW5MvtjCBIG7N5mcf+/LAHDu5pnvGHvgLzmBv4+iHrKSAN6c4FBzQGuecc9QrqDKWPTRwh1LP0MTfDpznyUWz8KyvG84qyEN6uw1CKnr1hx9CGxTkxe9oavo2cSTvvUaayZxr05 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c6d3a2d6-fb07-4aa6-9cbc-08d8935f84bf X-MS-Exchange-CrossTenant-AuthSource: DB8PR04MB6795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2020 05:36:13.3382 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: RRdJu3S1Fcf59JD96ICca32aquO79yOFTX8Ny7JhjPU55s+Nhz+tSsTDlt2uuEFDKLcvlWaevbyoO0sEw75sPA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0402MB3707 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DDR Perf for i.MX8 is a system PMU whose AXI ID would different from SoC to SoC. Need expose system PMU identifier for userspace which refer to /sys/bus/event_source/devices//identifier. Signed-off-by: Joakim Zhang --- drivers/perf/fsl_imx8_ddr_perf.c | 42 ++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c index 4f063fb1c6b4..3517d2fb1469 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -50,6 +50,7 @@ static DEFINE_IDA(ddr_ida); struct fsl_ddr_devtype_data { unsigned int quirks; /* quirks needed for different DDR Perf core */ + const char *identifier; /* system PMU identifier for userspace */ }; static const struct fsl_ddr_devtype_data imx8_devtype_data; @@ -58,13 +59,32 @@ static const struct fsl_ddr_devtype_data imx8m_devtype_data = { .quirks = DDR_CAP_AXI_ID_FILTER, }; +static const struct fsl_ddr_devtype_data imx8mq_devtype_data = { + .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MQ", +}; + +static const struct fsl_ddr_devtype_data imx8mm_devtype_data = { + .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MM", +}; + +static const struct fsl_ddr_devtype_data imx8mn_devtype_data = { + .quirks = DDR_CAP_AXI_ID_FILTER, + .identifier = "i.MX8MN", +}; + static const struct fsl_ddr_devtype_data imx8mp_devtype_data = { .quirks = DDR_CAP_AXI_ID_FILTER_ENHANCED, + .identifier = "i.MX8MP", }; static const struct of_device_id imx_ddr_pmu_dt_ids[] = { { .compatible = "fsl,imx8-ddr-pmu", .data = &imx8_devtype_data}, { .compatible = "fsl,imx8m-ddr-pmu", .data = &imx8m_devtype_data}, + { .compatible = "fsl,imx8mq-ddr-pmu", .data = &imx8mq_devtype_data}, + { .compatible = "fsl,imx8mm-ddr-pmu", .data = &imx8mm_devtype_data}, + { .compatible = "fsl,imx8mn-ddr-pmu", .data = &imx8mn_devtype_data}, { .compatible = "fsl,imx8mp-ddr-pmu", .data = &imx8mp_devtype_data}, { /* sentinel */ } }; @@ -84,6 +104,27 @@ struct ddr_pmu { int id; }; +static ssize_t ddr_perf_identifier_show(struct device *dev, + struct device_attribute *attr, + char *page) +{ + struct ddr_pmu *pmu = dev_get_drvdata(dev); + + return sprintf(page, "%s\n", pmu->devtype_data->identifier); +} + +static struct device_attribute ddr_perf_identifier_attr = + __ATTR(identifier, 0444, ddr_perf_identifier_show, NULL); + +static struct attribute *ddr_perf_identifier_attrs[] = { + &ddr_perf_identifier_attr.attr, + NULL, +}; + +static struct attribute_group ddr_perf_identifier_attr_group = { + .attrs = ddr_perf_identifier_attrs, +}; + enum ddr_perf_filter_capabilities { PERF_CAP_AXI_ID_FILTER = 0, PERF_CAP_AXI_ID_FILTER_ENHANCED, @@ -237,6 +278,7 @@ static const struct attribute_group *attr_groups[] = { &ddr_perf_format_attr_group, &ddr_perf_cpumask_attr_group, &ddr_perf_filter_cap_attr_group, + &ddr_perf_identifier_attr_group, NULL, };