From patchwork Mon Nov 23 14:51:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 331579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B25ACC56202 for ; Mon, 23 Nov 2020 14:52:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 628602075A for ; Mon, 23 Nov 2020 14:52:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="bFSnRKfL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728745AbgKWOwE (ORCPT ); Mon, 23 Nov 2020 09:52:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725907AbgKWOwE (ORCPT ); Mon, 23 Nov 2020 09:52:04 -0500 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BA02C0613CF for ; Mon, 23 Nov 2020 06:52:04 -0800 (PST) Received: by mail-wr1-x429.google.com with SMTP id b6so18902347wrt.4 for ; Mon, 23 Nov 2020 06:52:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vEZ1OITwjc7OKfdtDJWO+IuuMpz7cR7Bh/LeoiGOQ8k=; b=bFSnRKfLlSTZsjpOyZlRdLr+9GsxVTIDaXh+Ozrr/6iIla6U4mb9wzUtVuMVNV2p/p FS/gLQbhUfAm1NBEaGqd+9GayjqPA48f+inUJO4yY7oEzG1KKuuXkHB8d7lZUywQI/h5 zLhaoc8l/XeIK4P4AGPc52EZLRVkvGvtaUSal/pwA1bMubyw+vko7WdhmyEtAsHTxMRi xNW/Rc8Dn4WOhKTaqMe5E+kxw1gEKVA58UEi600DsdzbS8CedNBTkb4QrYklxQlFNEzb GCo5qWfXS4RNsXKmA6Q4Jbu0va5RZuDhLnwpYYDbi+djTz/oc1A1rtud4SHN46v54kSp bvGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vEZ1OITwjc7OKfdtDJWO+IuuMpz7cR7Bh/LeoiGOQ8k=; b=EfT2hpxJ7oGH8xv3NJLDhnFaBLTL7XREm6juDX6JpIzBJquZIupKHNhen511DwN1Vp F5ycy9ulE0P6kSwd93YhAv1N54KLUnj2xtQ5N/vGbUQM13lkwIL/SxGHx5sPrGN4y14N djiCm3ZmoLZ/A57VCyih8cYfHv22vMv4ksZTJFkYCkbFaEgfymdgCJM12NjzWbhiIa7H Qo5bf7/DJ/yJjtZfRX0dTynSPBnJmq18NsTeE7FqQD3DnCxna5J8VigbBQSk7QEniYVG G/DsZvLoNJlBbm6JjF27CINGgF9R4pzlk/1kU9IVfHGeVEBf13pN99hmQRS7P295L5jw jAtQ== X-Gm-Message-State: AOAM533UNDbYyAgvdfIVs7YGfaGHL/hYGaSNIiK7VpHDFghYxxxzr93V hALYLyf7YWwytoFGUc6TwNXR/w== X-Google-Smtp-Source: ABdhPJyCKHzsFFIcaH2EeQrhpd3TFYZexAVFJ1Jhy5BUT/T1CRHH+5hqfiSTieF5VcrojJRsELxkPA== X-Received: by 2002:adf:916e:: with SMTP id j101mr25757231wrj.55.1606143122651; Mon, 23 Nov 2020 06:52:02 -0800 (PST) Received: from localhost.localdomain ([2a01:e35:2ec0:82b0:9541:d2fd:3a68:67ae]) by smtp.gmail.com with ESMTPSA id 9sm14225175wmo.34.2020.11.23.06.52.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Nov 2020 06:52:01 -0800 (PST) From: Neil Armstrong To: vkoul@kernel.org, kishon@ti.com Cc: linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong Subject: [PATCH 1/2] dt-bindings: phy: add Amlogic G12A Analog MIPI D-PHY bindings Date: Mon, 23 Nov 2020 15:51:56 +0100 Message-Id: <20201123145157.300456-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201123145157.300456-1-narmstrong@baylibre.com> References: <20201123145157.300456-1-narmstrong@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Amlogic G12A SoCs embeds an Analog MIPI D-PHY to communicate with DSI panels, this adds the bindings. This Analog D-PHY works with a separate Digital MIPI D-PHY. Signed-off-by: Neil Armstrong --- .../phy/amlogic,g12a-mipi-dphy-analog.yaml | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml diff --git a/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml new file mode 100644 index 000000000000..28663552f05b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/amlogic,g12a-mipi-dphy-analog.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic G12A MIPI analog PHY + +maintainers: + - Neil Armstrong + +description: |+ + The Everything-Else Power Domains node should be the child of a syscon + node with the required property: + + - compatible: Should be the following: + "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon" + + Refer to the the bindings described in + Documentation/devicetree/bindings/mfd/syscon.yaml + +properties: + compatible: + const: amlogic,g12a-mipi-dphy-analog + + "#phy-cells": + const: 0 + +required: + - compatible + - "#phy-cells" + +additionalProperties: false + +examples: + - | + mpphy: phy { + compatible = "amlogic,g12a-mipi-dphy-analog"; + #phy-cells = <0>; + }; From patchwork Mon Nov 23 14:51:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 330782 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2753FC63697 for ; Mon, 23 Nov 2020 14:52:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CB24C20782 for ; Mon, 23 Nov 2020 14:52:34 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Mon, 23 Nov 2020 06:52:04 -0800 (PST) Received: from localhost.localdomain ([2a01:e35:2ec0:82b0:9541:d2fd:3a68:67ae]) by smtp.gmail.com with ESMTPSA id 9sm14225175wmo.34.2020.11.23.06.52.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Nov 2020 06:52:03 -0800 (PST) From: Neil Armstrong To: vkoul@kernel.org, kishon@ti.com Cc: linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong Subject: [PATCH 2/2] phy: amlogic: Add G12A Analog MIPI D-PHY driver Date: Mon, 23 Nov 2020 15:51:57 +0100 Message-Id: <20201123145157.300456-3-narmstrong@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201123145157.300456-1-narmstrong@baylibre.com> References: <20201123145157.300456-1-narmstrong@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Amlogic G12A SoCs embeds an Analog MIPI D-PHY used to communicate with DSI panels. Signed-off-by: Neil Armstrong --- drivers/phy/amlogic/Kconfig | 12 ++ drivers/phy/amlogic/Makefile | 1 + .../amlogic/phy-meson-g12a-mipi-dphy-analog.c | 177 ++++++++++++++++++ 3 files changed, 190 insertions(+) create mode 100644 drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c diff --git a/drivers/phy/amlogic/Kconfig b/drivers/phy/amlogic/Kconfig index db5d0cd757e3..ac898a102bcc 100644 --- a/drivers/phy/amlogic/Kconfig +++ b/drivers/phy/amlogic/Kconfig @@ -49,6 +49,18 @@ config PHY_MESON_G12A_USB3_PCIE in Meson G12A SoCs. If unsure, say N. +config PHY_MESON_G12A_MIPI_DPHY_ANALOG + tristate "Meson G12A MIPI Analog DPHY driver" + default ARCH_MESON + depends on OF && (ARCH_MESON || COMPILE_TEST) + select GENERIC_PHY + select REGMAP_MMIO + select GENERIC_PHY_MIPI_DPHY + help + Enable this to support the Meson MIPI Analog DPHY found in Meson G12A + SoCs. + If unsure, say N. + config PHY_MESON_AXG_PCIE tristate "Meson AXG PCIE PHY driver" default ARCH_MESON diff --git a/drivers/phy/amlogic/Makefile b/drivers/phy/amlogic/Makefile index 8fa07fbd0d92..2eada0a683ca 100644 --- a/drivers/phy/amlogic/Makefile +++ b/drivers/phy/amlogic/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o obj-$(CONFIG_PHY_MESON_GXL_USB2) += phy-meson-gxl-usb2.o obj-$(CONFIG_PHY_MESON_G12A_USB2) += phy-meson-g12a-usb2.o obj-$(CONFIG_PHY_MESON_G12A_USB3_PCIE) += phy-meson-g12a-usb3-pcie.o +obj-$(CONFIG_PHY_MESON_G12A_MIPI_DPHY_ANALOG) += phy-meson-g12a-mipi-dphy-analog.o obj-$(CONFIG_PHY_MESON_AXG_PCIE) += phy-meson-axg-pcie.o obj-$(CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG) += phy-meson-axg-mipi-pcie-analog.o obj-$(CONFIG_PHY_MESON_AXG_MIPI_DPHY) += phy-meson-axg-mipi-dphy.o diff --git a/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c b/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c new file mode 100644 index 000000000000..6e9d416c0552 --- /dev/null +++ b/drivers/phy/amlogic/phy-meson-g12a-mipi-dphy-analog.c @@ -0,0 +1,177 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Meson G12A MIPI DSI Analog PHY + * + * Copyright (C) 2018 Amlogic, Inc. All rights reserved + * Copyright (C) 2020 BayLibre, SAS + * Author: Neil Armstrong + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HHI_MIPI_CNTL0 0x00 +#define HHI_MIPI_CNTL0_DIF_REF_CTL1 GENMASK(31, 16) +#define HHI_MIPI_CNTL0_DIF_REF_CTL0 GENMASK(15, 0) + +#define HHI_MIPI_CNTL1 0x04 +#define HHI_MIPI_CNTL1_BANDGAP BIT(16) +#define HHI_MIPI_CNTL2_DIF_REF_CTL2 GENMASK(15, 0) + +#define HHI_MIPI_CNTL2 0x08 +#define HHI_MIPI_CNTL2_DIF_TX_CTL1 GENMASK(31, 16) +#define HHI_MIPI_CNTL2_CH_EN GENMASK(15, 11) +#define HHI_MIPI_CNTL2_DIF_TX_CTL0 GENMASK(10, 0) + +#define DSI_LANE_0 BIT(4) +#define DSI_LANE_1 BIT(3) +#define DSI_LANE_CLK BIT(2) +#define DSI_LANE_2 BIT(1) +#define DSI_LANE_3 BIT(0) + +struct phy_g12a_mipi_dphy_analog_priv { + struct phy *phy; + struct regmap *regmap; + struct phy_configure_opts_mipi_dphy config; +}; + +static int phy_g12a_mipi_dphy_analog_configure(struct phy *phy, + union phy_configure_opts *opts) +{ + struct phy_g12a_mipi_dphy_analog_priv *priv = phy_get_drvdata(phy); + int ret; + + ret = phy_mipi_dphy_config_validate(&opts->mipi_dphy); + if (ret) + return ret; + + memcpy(&priv->config, opts, sizeof(priv->config)); + + return 0; +} + +static int phy_g12a_mipi_dphy_analog_power_on(struct phy *phy) +{ + struct phy_g12a_mipi_dphy_analog_priv *priv = phy_get_drvdata(phy); + unsigned int reg; + + regmap_write(priv->regmap, HHI_MIPI_CNTL0, + FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL0, 0x8) | + FIELD_PREP(HHI_MIPI_CNTL0_DIF_REF_CTL1, 0xa487)); + + regmap_write(priv->regmap, HHI_MIPI_CNTL1, + FIELD_PREP(HHI_MIPI_CNTL2_DIF_REF_CTL2, 0x2e) | + HHI_MIPI_CNTL1_BANDGAP); + + regmap_write(priv->regmap, HHI_MIPI_CNTL2, + FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL0, 0x459) | + FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL1, 0x2680)); + + reg = DSI_LANE_CLK; + switch (priv->config.lanes) { + case 4: + reg |= DSI_LANE_3; + fallthrough; + case 3: + reg |= DSI_LANE_2; + fallthrough; + case 2: + reg |= DSI_LANE_1; + fallthrough; + case 1: + reg |= DSI_LANE_0; + break; + default: + reg = 0; + } + + regmap_update_bits(priv->regmap, HHI_MIPI_CNTL2, + HHI_MIPI_CNTL2_CH_EN, + FIELD_PREP(HHI_MIPI_CNTL2_CH_EN, reg)); + + return 0; +} + +static int phy_g12a_mipi_dphy_analog_power_off(struct phy *phy) +{ + struct phy_g12a_mipi_dphy_analog_priv *priv = phy_get_drvdata(phy); + + regmap_write(priv->regmap, HHI_MIPI_CNTL0, 0); + regmap_write(priv->regmap, HHI_MIPI_CNTL1, 0); + regmap_write(priv->regmap, HHI_MIPI_CNTL2, 0); + + return 0; +} + +static const struct phy_ops phy_g12a_mipi_dphy_analog_ops = { + .configure = phy_g12a_mipi_dphy_analog_configure, + .power_on = phy_g12a_mipi_dphy_analog_power_on, + .power_off = phy_g12a_mipi_dphy_analog_power_off, + .owner = THIS_MODULE, +}; + +static int phy_g12a_mipi_dphy_analog_probe(struct platform_device *pdev) +{ + struct phy_provider *phy; + struct device *dev = &pdev->dev; + struct phy_g12a_mipi_dphy_analog_priv *priv; + struct device_node *np = dev->of_node; + struct regmap *map; + int ret; + + priv = devm_kmalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + /* Get the hhi system controller node */ + map = syscon_node_to_regmap(of_get_parent(dev->of_node)); + if (IS_ERR(map)) { + dev_err(dev, + "failed to get HHI regmap\n"); + return PTR_ERR(map); + } + + priv->regmap = map; + + priv->phy = devm_phy_create(dev, np, &phy_g12a_mipi_dphy_analog_ops); + if (IS_ERR(priv->phy)) { + ret = PTR_ERR(priv->phy); + if (ret != -EPROBE_DEFER) + dev_err(dev, "failed to create PHY\n"); + return ret; + } + + phy_set_drvdata(priv->phy, priv); + dev_set_drvdata(dev, priv); + + phy = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy); +} + +static const struct of_device_id phy_g12a_mipi_dphy_analog_of_match[] = { + { + .compatible = "amlogic,g12a-mipi-dphy-analog", + }, + { }, +}; +MODULE_DEVICE_TABLE(of, phy_g12a_mipi_dphy_analog_of_match); + +static struct platform_driver phy_g12a_mipi_dphy_analog_driver = { + .probe = phy_g12a_mipi_dphy_analog_probe, + .driver = { + .name = "phy-meson-g12a-mipi-dphy-analog", + .of_match_table = phy_g12a_mipi_dphy_analog_of_match, + }, +}; +module_platform_driver(phy_g12a_mipi_dphy_analog_driver); + +MODULE_AUTHOR("Neil Armstrong "); +MODULE_DESCRIPTION("Meson G12A MIPI Analog D-PHY driver"); +MODULE_LICENSE("GPL v2");