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[84.238.221.74]) by smtp.gmail.com with ESMTPSA id q66sm1501463wme.6.2020.11.23.15.03.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Nov 2020 15:03:18 -0800 (PST) From: Stanimir Varbanov To: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Hans Verkuil , Ezequiel Garcia , Nicolas Dufresne , Stanimir Varbanov Subject: [PATCH v2 1/3] v4l: Add HDR10 static metadata controls Date: Tue, 24 Nov 2020 01:02:55 +0200 Message-Id: <20201123230257.31690-2-stanimir.varbanov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201123230257.31690-1-stanimir.varbanov@linaro.org> References: <20201123230257.31690-1-stanimir.varbanov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Content light level and Mastering display colour volume v4l2 compounf controls, relevant payload structures and validation. Signed-off-by: Stanimir Varbanov --- drivers/media/v4l2-core/v4l2-ctrls.c | 62 ++++++++++++++++++++++++++++ include/media/hdr10-ctrls.h | 55 ++++++++++++++++++++++++ include/media/v4l2-ctrls.h | 3 ++ 3 files changed, 120 insertions(+) create mode 100644 include/media/hdr10-ctrls.h -- 2.17.1 diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c b/drivers/media/v4l2-core/v4l2-ctrls.c index ad47d00e28d6..028630576401 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls.c +++ b/drivers/media/v4l2-core/v4l2-ctrls.c @@ -1024,6 +1024,9 @@ const char *v4l2_ctrl_get_name(u32 id) case V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE: return "HEVC Decode Mode"; case V4L2_CID_MPEG_VIDEO_HEVC_START_CODE: return "HEVC Start Code"; + case V4L2_CID_MPEG_VIDEO_HDR10_CLL_INFO: return "HDR10 Content Light Info"; + case V4L2_CID_MPEG_VIDEO_HDR10_MASTERING_DISPLAY: return "HDR10 Mastering Display"; + /* CAMERA controls */ /* Keep the order of the 'case's the same as in v4l2-controls.h! */ case V4L2_CID_CAMERA_CLASS: return "Camera Controls"; @@ -1461,6 +1464,12 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, case V4L2_CID_MPEG_VIDEO_HEVC_SLICE_PARAMS: *type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS; break; + case V4L2_CID_MPEG_VIDEO_HDR10_CLL_INFO: + *type = V4L2_CTRL_TYPE_HDR10_CLL_INFO; + break; + case V4L2_CID_MPEG_VIDEO_HDR10_MASTERING_DISPLAY: + *type = V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY; + break; case V4L2_CID_UNIT_CELL_SIZE: *type = V4L2_CTRL_TYPE_AREA; *flags |= V4L2_CTRL_FLAG_READ_ONLY; @@ -1775,6 +1784,7 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, struct v4l2_ctrl_hevc_sps *p_hevc_sps; struct v4l2_ctrl_hevc_pps *p_hevc_pps; struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params; + struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering; struct v4l2_area *area; void *p = ptr.p + idx * ctrl->elem_size; unsigned int i; @@ -1934,6 +1944,52 @@ static int std_validate_compound(const struct v4l2_ctrl *ctrl, u32 idx, zero_padding(*p_hevc_slice_params); break; + case V4L2_CTRL_TYPE_HDR10_CLL_INFO: + break; + + case V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY: + p_hdr10_mastering = p; + + for (i = 0; i < 3; ++i) { + if (p_hdr10_mastering->display_primaries_x[i] < + V4L2_HDR10_MASTERING_PRIMARIES_X_LOW || + p_hdr10_mastering->display_primaries_x[i] > + V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH || + p_hdr10_mastering->display_primaries_y[i] < + V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW || + p_hdr10_mastering->display_primaries_y[i] > + V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH) + return -EINVAL; + } + + if (p_hdr10_mastering->white_point_x < + V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW || + p_hdr10_mastering->white_point_x > + V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH || + p_hdr10_mastering->white_point_y < + V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW || + p_hdr10_mastering->white_point_y > + V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH) + return -EINVAL; + + if (p_hdr10_mastering->max_luminance < + V4L2_HDR10_MASTERING_MAX_LUMA_LOW || + p_hdr10_mastering->max_luminance > + V4L2_HDR10_MASTERING_MAX_LUMA_HIGH || + p_hdr10_mastering->min_luminance < + V4L2_HDR10_MASTERING_MIN_LUMA_LOW || + p_hdr10_mastering->min_luminance > + V4L2_HDR10_MASTERING_MIN_LUMA_HIGH) + return -EINVAL; + + if (p_hdr10_mastering->max_luminance == + V4L2_HDR10_MASTERING_MAX_LUMA_LOW && + p_hdr10_mastering->min_luminance == + V4L2_HDR10_MASTERING_MIN_LUMA_HIGH) + return -EINVAL; + + break; + case V4L2_CTRL_TYPE_AREA: area = p; if (!area->width || !area->height) @@ -2626,6 +2682,12 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, case V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS: elem_size = sizeof(struct v4l2_ctrl_hevc_slice_params); break; + case V4L2_CTRL_TYPE_HDR10_CLL_INFO: + elem_size = sizeof(struct v4l2_ctrl_hdr10_cll_info); + break; + case V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY: + elem_size = sizeof(struct v4l2_ctrl_hdr10_mastering_display); + break; case V4L2_CTRL_TYPE_AREA: elem_size = sizeof(struct v4l2_area); break; diff --git a/include/media/hdr10-ctrls.h b/include/media/hdr10-ctrls.h new file mode 100644 index 000000000000..f6f77edc0b60 --- /dev/null +++ b/include/media/hdr10-ctrls.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * These are the HEVC state controls for use with stateless HEVC + * codec drivers. + * + * It turns out that these structs are not stable yet and will undergo + * more changes. So keep them private until they are stable and ready to + * become part of the official public API. + */ + +#ifndef _HDR10_CTRLS_H_ +#define _HDR10_CTRLS_H_ + +/* + * Content light level information. + * Source Rec. ITU-T H.265 v7 (11/2019) HEVC; D.2.35 + */ +#define V4L2_CID_MPEG_VIDEO_HDR10_CLL_INFO (V4L2_CID_MPEG_BASE + 1017) +#define V4L2_CTRL_TYPE_HDR10_CLL_INFO 0x0123 + +struct v4l2_ctrl_hdr10_cll_info { + __u16 max_content_light_level; + __u16 max_pic_average_light_level; +}; + +/* + * Mastering display colour volume. + * Source Rec. ITU-T H.265 v7 (11/2019) HEVC; D.2.28 + */ +#define V4L2_CID_MPEG_VIDEO_HDR10_MASTERING_DISPLAY (V4L2_CID_MPEG_BASE + 1018) +#define V4L2_CTRL_TYPE_HDR10_MASTERING_DISPLAY 0x0124 + +#define V4L2_HDR10_MASTERING_PRIMARIES_X_LOW 5 +#define V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH 37000 +#define V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW 5 +#define V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH 42000 +#define V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW 5 +#define V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH 37000 +#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW 5 +#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH 42000 +#define V4L2_HDR10_MASTERING_MAX_LUMA_LOW 50000 +#define V4L2_HDR10_MASTERING_MAX_LUMA_HIGH 100000000 +#define V4L2_HDR10_MASTERING_MIN_LUMA_LOW 1 +#define V4L2_HDR10_MASTERING_MIN_LUMA_HIGH 50000 + +struct v4l2_ctrl_hdr10_mastering_display { + __u16 display_primaries_x[3]; + __u16 display_primaries_y[3]; + __u16 white_point_x; + __u16 white_point_y; + __u32 max_luminance; + __u32 min_luminance; +}; + +#endif diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index 4fbace0fc7e5..81bd026fc1ea 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h @@ -19,6 +19,7 @@ */ #include #include +#include #include #include #include @@ -80,6 +81,8 @@ union v4l2_ctrl_ptr { struct v4l2_ctrl_hevc_sps *p_hevc_sps; struct v4l2_ctrl_hevc_pps *p_hevc_pps; struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params; + struct v4l2_ctrl_hdr10_cll_info *p_hdr10_cll; + struct v4l2_ctrl_hdr10_mastering_display *p_hdr10_mastering; struct v4l2_area *p_area; void *p; const void *p_const; From patchwork Mon Nov 23 23:02:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanimir Varbanov X-Patchwork-Id: 330728 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E1BBC64E69 for ; Mon, 23 Nov 2020 23:04:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CAB5620691 for ; Mon, 23 Nov 2020 23:04:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wnuFFlqT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388158AbgKWXDY (ORCPT ); Mon, 23 Nov 2020 18:03:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388145AbgKWXDX (ORCPT ); Mon, 23 Nov 2020 18:03:23 -0500 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1BF6C061A51 for ; Mon, 23 Nov 2020 15:03:22 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id a186so886508wme.1 for ; Mon, 23 Nov 2020 15:03:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QhN+lDzmalRXq6eSeelHxy7r4hkE9XL9c8QWorRlPDE=; b=wnuFFlqTobGEjCkGMekAPp/naZTrAXJJdQ2RXyfr55HnRLiiJI7W8lRgJb//rpvg/p HNhly7cEb2zvPKMRV4yQCopV12KFgjwHSy5LETxKywp2brT5WOlp+2VNMdB8t8X/zSNm ykSco6BsD6SWB3/otfTXk+ZZxS1g3Uyiw6jfUrB6UlkZHLd8HC3HUytqw1HXI62HscLc wXoBuEcYB0ndJKvlrLpoQ3z+1jMGsmeY0yUrE8DuqqSV5r6vjap0/u0/aie33i6GKrNK pEHmHKvp35vcmOeBhso0TcSfgojhHGLJJYx5xwTVAYgaJECDEdPIeVEFFAG3fn2/45Iy Y35A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QhN+lDzmalRXq6eSeelHxy7r4hkE9XL9c8QWorRlPDE=; b=p8B6ly9Q1fOBk7BxE3OXhODefHtZFCGfQohyZ2yJYWRFqBeziQdse1mE/2eI2s7hOV qqiXwPiHaN8ZyG96PnWOJGBwceGrpreIe8/HtmQvPDLhSAyZJvzc2CDXvaRmK3xro4lI SDbo9yvXuwbfGHFtFnx0IufGopeBF7/E9ar4+f+894zjwgDWGMCmPWD7ZEsywjJ35Xds TGeLtc9r8/Wo7VBT39KWjlnb2EBQzJ/Bx3dp/I6GkWChT9PCFQW1cUaxUZiDfsSksFlR inwNShqIwp1XQiVgu0YTA1bWVduKwV3z6AKk8Rw9pU2EURWRXOlVZzW62wz9KP8ZngTU WGNg== X-Gm-Message-State: AOAM5321vAII8laPoOFJV784fX9RZOOVIZpjgamcRebnEksLM5pMh/zh SzMZapKthnVVrwNDBuvj88WPhw== X-Google-Smtp-Source: ABdhPJw4PG524YXfRWrpk4TmHXI+jEgDQANPHhtJtsza7IMl6rSzxsZbhWq+mQOHMVK5DXUMvcYbFg== X-Received: by 2002:a1c:c205:: with SMTP id s5mr1187628wmf.122.1606172601259; Mon, 23 Nov 2020 15:03:21 -0800 (PST) Received: from localhost.localdomain (hst-221-74.medicom.bg. [84.238.221.74]) by smtp.gmail.com with ESMTPSA id q66sm1501463wme.6.2020.11.23.15.03.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Nov 2020 15:03:20 -0800 (PST) From: Stanimir Varbanov To: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Hans Verkuil , Ezequiel Garcia , Nicolas Dufresne , Stanimir Varbanov Subject: [PATCH v2 2/3] docs: media: Document CLL and Mastering display Date: Tue, 24 Nov 2020 01:02:56 +0200 Message-Id: <20201123230257.31690-3-stanimir.varbanov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201123230257.31690-1-stanimir.varbanov@linaro.org> References: <20201123230257.31690-1-stanimir.varbanov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document Content light level and Mastering display colour volume. Signed-off-by: Stanimir Varbanov --- .../media/v4l/ext-ctrls-codec.rst | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index ce728c757eaf..1d26a5db07ef 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -4382,3 +4382,74 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - Selecting this value specifies that HEVC slices are expected to be prefixed by Annex B start codes. According to :ref:`hevc` valid start codes can be 3-bytes 0x000001 or 4-bytes 0x00000001. + +``V4L2_CID_MPEG_VIDEO_HDR10_CLL_INFO (struct)`` + The Content Light Level defines upper bounds for the nominal target + brightness light level of the pictures. + +.. c:type:: v4l2_ctrl_hdr10_cll_info + +.. cssclass:: longtable + +.. flat-table:: struct v4l2_ctrl_hdr10_cll_info + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u16 + - ``max_content_light_level`` + - An upper bound on the maximum light level among all individual + samples for the pictures of coded video sequence, cd/m2. When + equal to 0 no such uppper bound is present. + * - __u16 + - ``max_pic_average_light_level`` + - An upper bound on the maximum average light level among the + samples for any individual picture of coded video sequence, cd/m2. + When equal to 0 no such uppper bound is present. + +``V4L2_CID_MPEG_VIDEO_HDR10_MASTERING_DISPLAY (struct)`` + The mastering display defines the colour volume (the colour primaries, + white point and luminance range) of a display considered to be the + mastering display for current video content. + +.. c:type:: v4l2_ctrl_hdr10_mastering_display + +.. cssclass:: longtable + +.. flat-table:: struct v4l2_ctrl_hdr10_mastering_display + :header-rows: 0 + :stub-columns: 0 + :widths: 1 1 2 + + * - __u16 + - ``display_primaries_x[3]`` + - Specifies the normalized x chromaticity coordinate of the colour + primary component c of the mastering display in increments of 0.00002. + For describing mastering display that use Red, Green and Blue colour + primaries, index value c equal to 0 correspond to Green primary, c + equal to 1 correspond to Blue primary and c equal to 2 correspond to + Red colour primary. + * - __u16 + - ``display_primaries_y[3]`` + - Specifies the normalized y chromaticity coordinate of the colour + primary component c of the mastering display in increments of 0.00002. + For describing mastering display that use Red, Green and Blue colour + primaries, index value c equal to 0 correspond to Green primary, c + equal to 1 correspond to Blue primary and c equal to 2 correspond to + Red colour primary. + * - __u16 + - ``white_point_x`` + - Specifies the normalized x chromaticity coordinate of the white + point of the mastering display in increments of 0.00002. + * - __u16 + - ``white_point_y`` + - Specifies the normalized y chromaticity coordinate of the white + point of the mastering display in increments of 0.00002. + * - __u32 + - ``max_luminance`` + - Specifies the nominal maximum display luminance of the mastering + display in units of 0.0001 cd/m2. + * - __u32 + - ``min_luminance`` + - specifies the nominal minimum display luminance of the mastering + display in units of 0.0001 cd/m2. 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[84.238.221.74]) by smtp.gmail.com with ESMTPSA id q66sm1501463wme.6.2020.11.23.15.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Nov 2020 15:03:22 -0800 (PST) From: Stanimir Varbanov To: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Hans Verkuil , Ezequiel Garcia , Nicolas Dufresne , Stanimir Varbanov Subject: [PATCH v2 3/3] venus: venc: Add support for CLL and Mastering display controls Date: Tue, 24 Nov 2020 01:02:57 +0200 Message-Id: <20201123230257.31690-4-stanimir.varbanov@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201123230257.31690-1-stanimir.varbanov@linaro.org> References: <20201123230257.31690-1-stanimir.varbanov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Create CLL and Mastering display colour volume v4l2 controls for encoder, add handling of HDR10 PQ SEI packet payloads for v4. Signed-off-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/core.h | 3 ++ drivers/media/platform/qcom/venus/hfi_cmds.c | 8 +++++ .../media/platform/qcom/venus/hfi_helper.h | 20 +++++++++++++ drivers/media/platform/qcom/venus/venc.c | 29 +++++++++++++++++++ .../media/platform/qcom/venus/venc_ctrls.c | 16 +++++++++- 5 files changed, 75 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platform/qcom/venus/core.h index 3bc129a4f817..3ae6cd2b8d31 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -245,6 +245,9 @@ struct venc_controls { u32 profile; u32 level; + + struct v4l2_ctrl_hdr10_cll_info cll; + struct v4l2_ctrl_hdr10_mastering_display mastering; }; struct venus_buffer { diff --git a/drivers/media/platform/qcom/venus/hfi_cmds.c b/drivers/media/platform/qcom/venus/hfi_cmds.c index 7022368c1e63..081e5a816bca 100644 --- a/drivers/media/platform/qcom/venus/hfi_cmds.c +++ b/drivers/media/platform/qcom/venus/hfi_cmds.c @@ -1205,6 +1205,14 @@ pkt_session_set_property_4xx(struct hfi_session_set_property_pkt *pkt, pkt->shdr.hdr.size += sizeof(u32) + sizeof(*cu); break; } + case HFI_PROPERTY_PARAM_VENC_HDR10_PQ_SEI: { + struct hfi_hdr10_pq_sei *in = pdata, *hdr10 = prop_data; + + memcpy(hdr10, in, sizeof(*hdr10)); + pkt->shdr.hdr.size += sizeof(u32) + sizeof(*hdr10); + break; + } + case HFI_PROPERTY_CONFIG_VENC_MAX_BITRATE: case HFI_PROPERTY_CONFIG_VDEC_POST_LOOP_DEBLOCKER: case HFI_PROPERTY_PARAM_BUFFER_ALLOC_MODE: diff --git a/drivers/media/platform/qcom/venus/hfi_helper.h b/drivers/media/platform/qcom/venus/hfi_helper.h index 60ee2479f7a6..8e8dc6b5c855 100644 --- a/drivers/media/platform/qcom/venus/hfi_helper.h +++ b/drivers/media/platform/qcom/venus/hfi_helper.h @@ -506,6 +506,7 @@ #define HFI_PROPERTY_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE 0x2005029 #define HFI_PROPERTY_PARAM_VENC_HIER_B_MAX_NUM_ENH_LAYER 0x200502c #define HFI_PROPERTY_PARAM_VENC_HIER_P_HYBRID_MODE 0x200502f +#define HFI_PROPERTY_PARAM_VENC_HDR10_PQ_SEI 0x2005036 /* * HFI_PROPERTY_CONFIG_VENC_COMMON_START @@ -791,6 +792,25 @@ struct hfi_ltr_mark { u32 mark_frame; }; +struct hfi_mastering_display_colour_sei_payload { + u32 display_primaries_x[3]; + u32 display_primaries_y[3]; + u32 white_point_x; + u32 white_point_y; + u32 max_display_mastering_luminance; + u32 min_display_mastering_luminance; +}; + +struct hfi_content_light_level_sei_payload { + u32 max_content_light; + u32 max_pic_average_light; +}; + +struct hfi_hdr10_pq_sei { + struct hfi_mastering_display_colour_sei_payload mastering; + struct hfi_content_light_level_sei_payload cll; +}; + struct hfi_framesize { u32 buffer_type; u32 width; diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c index 0bf92cc21f3a..daeaca30e9e3 100644 --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c @@ -587,6 +587,35 @@ static int venc_set_properties(struct venus_inst *inst) return ret; } + if (inst->fmt_cap->pixfmt == V4L2_PIX_FMT_HEVC) { + struct hfi_hdr10_pq_sei hdr10; + unsigned int c; + + ptype = HFI_PROPERTY_PARAM_VENC_HDR10_PQ_SEI; + + for (c = 0; c < 3; c++) { + hdr10.mastering.display_primaries_x[c] = + ctr->mastering.display_primaries_x[c]; + hdr10.mastering.display_primaries_y[c] = + ctr->mastering.display_primaries_y[c]; + } + + hdr10.mastering.white_point_x = ctr->mastering.white_point_x; + hdr10.mastering.white_point_y = ctr->mastering.white_point_y; + hdr10.mastering.max_display_mastering_luminance = + ctr->mastering.max_luminance; + hdr10.mastering.min_display_mastering_luminance = + ctr->mastering.min_luminance; + + hdr10.cll.max_content_light = ctr->cll.max_content_light_level; + hdr10.cll.max_pic_average_light = + ctr->cll.max_pic_average_light_level; + + ret = hfi_session_set_property(inst, ptype, &hdr10); + if (ret) + return ret; + } + /* IDR periodicity, n: * n = 0 - only the first I-frame is IDR frame * n = 1 - all I-frames will be IDR frames diff --git a/drivers/media/platform/qcom/venus/venc_ctrls.c b/drivers/media/platform/qcom/venus/venc_ctrls.c index 0708b3b89d0c..87ba0cf9f37e 100644 --- a/drivers/media/platform/qcom/venus/venc_ctrls.c +++ b/drivers/media/platform/qcom/venus/venc_ctrls.c @@ -198,6 +198,12 @@ static int venc_op_s_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_MPEG_VIDEO_FRAME_SKIP_MODE: ctr->frame_skip_mode = ctrl->val; break; + case V4L2_CID_MPEG_VIDEO_HDR10_CLL_INFO: + ctr->cll = *ctrl->p_new.p_hdr10_cll; + break; + case V4L2_CID_MPEG_VIDEO_HDR10_MASTERING_DISPLAY: + ctr->mastering = *ctrl->p_new.p_hdr10_mastering; + break; default: return -EINVAL; } @@ -213,7 +219,7 @@ int venc_ctrl_init(struct venus_inst *inst) { int ret; - ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 33); + ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 35); if (ret) return ret; @@ -364,6 +370,14 @@ int venc_ctrl_init(struct venus_inst *inst) (1 << V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT)), V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED); + v4l2_ctrl_new_std_compound(&inst->ctrl_handler, &venc_ctrl_ops, + V4L2_CID_MPEG_VIDEO_HDR10_CLL_INFO, + v4l2_ctrl_ptr_create(NULL)); + + v4l2_ctrl_new_std_compound(&inst->ctrl_handler, &venc_ctrl_ops, + V4L2_CID_MPEG_VIDEO_HDR10_MASTERING_DISPLAY, + v4l2_ctrl_ptr_create(NULL)); + ret = inst->ctrl_handler.error; if (ret) goto err;