From patchwork Fri Nov 13 14:59:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324325 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262135ils; Fri, 13 Nov 2020 06:53:32 -0800 (PST) X-Google-Smtp-Source: ABdhPJxgWrcZBXhYs/EfoxIqvoxSRbXipYfFDvziJdIniJmD2bcor/+QuqGIl+W/v+fw+J0yPXiK X-Received: by 2002:a05:6402:17b4:: with SMTP id j20mr2934376edy.24.1605279211910; Fri, 13 Nov 2020 06:53:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279211; cv=none; d=google.com; s=arc-20160816; b=JVaeK0Ul2MmmIJmtQ/Qhcpzl2bZtgo/4vmxacBHyFzIoexVVqXmvaE2jIhtPwtJjhW ecj7oAZuCRZWZtr1+yg4jURz6rJEfBwqRmrnaJ9SWcsjw5BpZ1RfUcciChp7InInZy6j o92mS9l0TlERwep6NZ5ZpRL2u/x6yQQE95gEkOTQRNnfs+UkPKK9pnndi1VGLUhzS/XL GdxIOTOXg71Hb1J1x58lFGvrSutcnlw4qfMBdn/gm+oVxn7gocM0+wpQXG4tbdV9KxT7 PaaVLzWn2H0QATqqWYtKT6I0aTQ6UO+HY0D2vdl9az6iQnU/o+a9+5m4khNwPZ3tICfa +lBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=4dySM6ga3g1JccS9VpKiXH/tknJsBk9CHeAdOMBOgi8=; b=OJGBfOUDLchCBYAJYqnr4+s2UiO8qoNopQ8sfGVNYrTuPkpduSRp/I46SmMSd//hk3 xb74io3d5QLEsRcEn0EgKJ5syMlDxHqh0JQujQXHthA5k8heuWqzdMOfYO0mS/jtYlJd Ezp1OWWpf0hlAFXL0oQ+ksKNxLl5SdoPScSCiI5+aU6Fteuds9YI8GDGKz13XDaoLpqq +DlPWan9DneucSwBOyYOLRPnJLM5YC5jXXU62fvuxfhPqerJk5zz6G7ed/xiUdmiWRM0 +0mqPwyuNsZr1psiJz3JUlf6rCEUKx+vIS3rWNOZoWKvDeq/EdxQBhK83duc9THw4V8b hLtg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="jh/Ynuxf"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g20si6410654edv.323.2020.11.13.06.53.31; Fri, 13 Nov 2020 06:53:31 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="jh/Ynuxf"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726278AbgKMOxa (ORCPT + 15 others); Fri, 13 Nov 2020 09:53:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726267AbgKMOxa (ORCPT ); Fri, 13 Nov 2020 09:53:30 -0500 Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51E98C0613D1 for ; Fri, 13 Nov 2020 06:53:30 -0800 (PST) Received: by mail-wr1-x444.google.com with SMTP id j7so10222513wrp.3 for ; Fri, 13 Nov 2020 06:53:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4dySM6ga3g1JccS9VpKiXH/tknJsBk9CHeAdOMBOgi8=; b=jh/Ynuxf9wdpVdshLKXwPYCIUOGXV3uMFK7Nc6VfhzOXY5i50ewzOnZen263xU7GVG WCE2EwG3wxHSGBTexnI8mWevS64LxoLxX3rbKUPeGyopEsN4KwGhei8fYRiQeXPoXZeO pYOq3R+MonZY2ghVpMIoemQtt1e2rUCwK77RmzFkv2h4015gmb5hvf75KHA+0noSKOgM rEKink6KwsTi/L95/YfDBjbtcgXVwqNseA56w5HLm5o2/IZWugfNnHacoy7Hf1aZn6+C JzkjljvdA8+2yTKio+fDgqu7Fzc3ga/3dU9yD3uhE8flbV1h/bO8WVkXsWJ+imfOeLWp 2jeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4dySM6ga3g1JccS9VpKiXH/tknJsBk9CHeAdOMBOgi8=; b=JOgycsXv/EXDZyvf84FkO2/wjZ9gmLtOdhqpIy5DYMLfMhzWv8d/oCHZOwNPorzLH+ TPoq+g+MBhnJPn359V8ryLMk3IVbPn1otj1ZpyJ/h4yV8EZhKL3rwgmzkQl7ZstVJ/d5 FtWmuGAZ1PE+DFM/RUmeFTD0mc5ZiU52zfmJ6d8UIlTQ2wBrFfO5PQ21mUTO1IyH6Akn jEXJqJIVIzJO4UQJWoRC+CHOG9LUfFD3UJ710p1LCtF5E9+7CdPgEEnJa9ulBKKfyKPq kL5HJzlZSPYJfBtdvD8+A3imwjrz4S+qdZ+BdSi00ZnTe9LctCYmXMIJJWLoSvaxJotA TcYg== X-Gm-Message-State: AOAM532J7+2XwTRasmMEkgpZ4ozX+ieOxDQhKNjDFVzQjh3a+BPJPcW9 LXAWKZF5HSxFo1JFMVRFV9rjNg== X-Received: by 2002:a5d:6cc5:: with SMTP id c5mr4137074wrc.301.1605279208934; Fri, 13 Nov 2020 06:53:28 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:304f:e9d4:6385:8ac5]) by smtp.gmail.com with ESMTPSA id i6sm10729341wma.42.2020.11.13.06.53.28 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Nov 2020 06:53:28 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, Loic Poulain Subject: [PATCH 1/8] mhi: pci-generic: Increase number of hardware events Date: Fri, 13 Nov 2020 15:59:55 +0100 Message-Id: <1605279602-18749-2-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> References: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If the IPA (IP hardware accelerator) is starved of event ring elements, the modem is crashing (SDX55). That can be prevented by setting a larger number of events (i.e 2 x number of channel ring elements). Tested with FN980m module. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 Reviewed-by: Bhaumik Bhatt Reviewed-by: Hemant Kumar diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index e3df838..13a7e4f 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -91,7 +91,7 @@ struct mhi_pci_dev_info { #define MHI_EVENT_CONFIG_HW_DATA(ev_ring, ch_num) \ { \ - .num_elements = 128, \ + .num_elements = 256, \ .irq_moderation_ms = 5, \ .irq = (ev_ring) + 1, \ .priority = 1, \ From patchwork Fri Nov 13 14:59:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324326 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262167ils; Fri, 13 Nov 2020 06:53:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJzddk4uDwI8O5tPEiT8KzuYxYPro4Ou+zThGo6p6LAt25X1dkZHb17YT361jXK5IGoJGlM6 X-Received: by 2002:a05:6402:a57:: with SMTP id bt23mr2696860edb.62.1605279214273; Fri, 13 Nov 2020 06:53:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279214; cv=none; d=google.com; s=arc-20160816; b=UVd0BVUXRtHUUkK8aj8h0dQxntuEUDSHDT52pRx+qom5gwGqRqSU7Im4JCQkD1J7mB XcMpysDCRnNJqzL5kI9asn76+N9HwQI6oJQUFrfqKPDsjvjW+cLNOEmDIECZ8Y45w+9G hkXpVL0RJ7SvjbHwA1fMQWGWhuglKobpl66C78uGhSLYd3AAVJ+0CFrdcD9WsH8xQcOj JwV+yTcAUAa0ZjkJyOZC7gFz/NACkwM/8us2YpfxvkpLhzCbKO34e+C8Yl8mY1gU6zJp 72+48cMDN+zSfRh6nJDdA0TFn6eOlEpea+JPBgaEA6SdRQGRo004u5IVhf5mX929dHY5 zC3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=NI5nyGOY3ERNyQJVul1TRTO9hhACB1gWUuV76MrEk5M=; b=wMspzVjugkT5smjIXr62sV2jip0stLvAvSa4kyGTCRpHRQT9EyTREYSWcB+Zgm9x13 MmwnBx6Fq1oH5nIOrVa73xXVVkKrLMbAcsml/PM1LSPn5mbfBsprgYyvz5KrDkFIbvHX dbrEFp/iq66547j9cKITtxc8YqjkYdbb8MJjhVpn1Hvu17bOywvL7Wl5LQQLG+zZFdXH 1LAlcnEQPHERfKdFWhM3chocZSpnfGyStnR6m+RHdrAN79bNBsnrlu9geoVeXQzaHviQ O7CUN5cgQK4EBGewvyM3bEbVYK/r3W3cFYYeHScqvQpJ2VfaSxeT/NyimYhxplWPpTtO 9HPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z3MUAw2x; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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This has been tested with Telit FN980m module. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 13a7e4f..09c6b26 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -15,6 +15,8 @@ #define MHI_PCI_DEFAULT_BAR_NUM 0 +#define DEV_RESET_REG (0xB0) + /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -166,6 +168,11 @@ static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl, /* Nothing to do for now */ } +static inline void mhi_pci_reset(struct mhi_controller *mhi_cntrl) +{ + writel(1, mhi_cntrl->regs + DEV_RESET_REG); +} + static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, unsigned int bar_num, u64 dma_mask) { @@ -329,6 +336,10 @@ static void mhi_pci_remove(struct pci_dev *pdev) mhi_power_down(mhi_cntrl, true); mhi_unprepare_after_power_down(mhi_cntrl); mhi_unregister_controller(mhi_cntrl); + + /* MHI-layer reset could not be enough, always hard-reset the device */ + mhi_pci_reset(mhi_cntrl); + mhi_free_controller(mhi_cntrl); } From patchwork Fri Nov 13 14:59:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324329 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262420ils; Fri, 13 Nov 2020 06:53:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJztiAfbzKt9APUraLrWoDMSKdnLAgE9QEAvYHB5cw3MLIsBzRVlsub1JwQRMKy1Se5d+mnS X-Received: by 2002:a17:906:1e0c:: with SMTP id g12mr2176815ejj.115.1605279238980; Fri, 13 Nov 2020 06:53:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279238; cv=none; d=google.com; s=arc-20160816; b=a+zElopUlZtbYpYxBsQX7lek8rkDZVQ4/AMhaZgvp+JNY9E+sgm0R6BAVIOywhSPwR RFT4fzQMjQ0ER/a1boJGxWv4Whwhb/gWwf3ZySOKKbs7Nhzh0Ao5Ms8ooPs25TowW4jg bnVLKvzEByLwV7bWM4KH4d5kVlrWY7lK+xi7Qbwx2D9YV8KCmCu/LEnJuBAuO97w3v3R JjglxTomFGa7KGSTwdwLAvFrfhx7K+/jjC0xN7XjI5GhZQiCMYTn1ZK6DLeXAXQM3wF+ PxjgelUIGNRh0AbdjQLpkUuukUHTd41Qi+hnlhmVp00sLjpfwAAk4xbHkinc4zTozNF5 wL+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=gYIKCcN8WQ/EbGFIHV1x88OAZPf2nkJY+y3eCrkB1Og=; b=r1Cv+B1WkOK+DzMMz5UJcIx+HZjonZ4U0l5vr8nFCLqqNH/GL0ekTLRdbsYF+xStaA 7mp4UcSndsgCJJn+bYpgpubv7qUewGEL+o6RDbUt+W4P/EShHEroCY8eLBiufwWc35wH 27wxoEElT/KToYPz86/unQB8M6OhrvhU5NWbmzEteyZ8CWaqNcTiS7Q3TdlLpddC+thV myVEsZp+XsIQR6dFg4Pntk46axdCE6i9Lq4x8wc8R1jeoTgTbSP8hedQy9XhVROl/SSi TzHO4VB44MiZ+vMGzDLFVVVn1e0xz0KBxN3CChAB2DsNvpcAuITgo2Th/lWFJpcFMw0x GoKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HMWFg8dI; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y7si5841525ejd.450.2020.11.13.06.53.58; Fri, 13 Nov 2020 06:53:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HMWFg8dI; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726822AbgKMOxd (ORCPT + 15 others); Fri, 13 Nov 2020 09:53:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726789AbgKMOxd (ORCPT ); Fri, 13 Nov 2020 09:53:33 -0500 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 658DEC0617A6 for ; Fri, 13 Nov 2020 06:53:33 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id u12so2986130wrt.0 for ; Fri, 13 Nov 2020 06:53:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gYIKCcN8WQ/EbGFIHV1x88OAZPf2nkJY+y3eCrkB1Og=; b=HMWFg8dIsnCK6ovPR1me5i6sDp6rsOudcQ8A0RfpUpPiEJwtR4is9ps/QCxSDNs1mV HtszjXD3Efx7oq/KVgaPyzmV4GXNL4KIEREOLMuSVSMkzxsrbkI2mrsi0E73MD9tkYZo vNoJOE3UwKhymXas+MOezTUra40A5YCBG7xJCmMNLfM4W6LU4HQOJoPseJCBAiQxnEEX t/xVtNw/4pupKOH45USzylbeftXIrpI0/COFmjJWd4vF8/imo0w6f72/9CZg81mPY972 INABVTqDCrAgNzjmBdHlMTm77T3c7C8rD2AQ1ErYhFGfvDVwSfgAQbpNbKlGXd7RRc/2 9w+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gYIKCcN8WQ/EbGFIHV1x88OAZPf2nkJY+y3eCrkB1Og=; b=XJ1nDJKC0BxaisC01BDjN8LIl2Krt4drLmUDYz09C6djSFMIPzUMsEA/OENlY8HBbr 7cig8oxa8hdSc3tq8FLHcPC70xLm61rEhMQuk5VtsoJXupeTAfXXI9I69bSUfPjHEOS0 DbFkXf6C0T0dNcFRnmYsykax6B5XAPh2fgYDbHCjrfbvuiOZssuZdEl7l06gKTEXcz8y UY8Llx0ah+wvm2xt1bvRuIR/xpVtyt9TVvZn/7jIdmMSPScsmge5EAMRaNrHPfFFJbZj MlbgkQJ/oF5u5cdZdiNdX4NHg/S7e7ql6XaMv+Fa9zrymaP6mmo/a2YBuJ8YtwvtvdT0 LvUA== X-Gm-Message-State: AOAM5321zEO5ET5XBX1Hpz4456vvIkwbjHdzMgx8vcReF31QitT7jEZU O0pCFeKvP7EBbn7WpEg3yYwnF3D2x6dcPGIu X-Received: by 2002:adf:bd86:: with SMTP id l6mr4089267wrh.205.1605279212016; Fri, 13 Nov 2020 06:53:32 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:304f:e9d4:6385:8ac5]) by smtp.gmail.com with ESMTPSA id i6sm10729341wma.42.2020.11.13.06.53.31 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Nov 2020 06:53:31 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, Loic Poulain Subject: [PATCH 3/8] mhi: pci_generic: Enable burst mode for hardware channels Date: Fri, 13 Nov 2020 15:59:57 +0100 Message-Id: <1605279602-18749-4-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> References: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hardware channels have a feature called burst mode that allows to queue transfer ring element(s) (TRE) to a channel without ringing the device doorbell. In that mode, the device is polling the channel context for new elements. This reduces the frequency of host initiated doorbells and increase throughput. Create a new dedicated macro for hardware channels with burst enabled. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 09c6b26..0c07cf5 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -78,6 +78,36 @@ struct mhi_pci_dev_info { .offload_channel = false, \ } +#define MHI_CHANNEL_CONFIG_HW_UL(ch_num, ch_name, el_count, ev_ring) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .num_elements = el_count, \ + .event_ring = ev_ring, \ + .dir = DMA_TO_DEVICE, \ + .ee_mask = BIT(MHI_EE_AMSS), \ + .pollcfg = 0, \ + .doorbell = MHI_DB_BRST_ENABLE, \ + .lpm_notify = false, \ + .offload_channel = false, \ + .doorbell_mode_switch = false, \ + } \ + +#define MHI_CHANNEL_CONFIG_HW_DL(ch_num, ch_name, el_count, ev_ring) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .num_elements = el_count, \ + .event_ring = ev_ring, \ + .dir = DMA_FROM_DEVICE, \ + .ee_mask = BIT(MHI_EE_AMSS), \ + .pollcfg = 0, \ + .doorbell = MHI_DB_BRST_ENABLE, \ + .lpm_notify = false, \ + .offload_channel = false, \ + .doorbell_mode_switch = false, \ + } + #define MHI_EVENT_CONFIG_DATA(ev_ring) \ { \ .num_elements = 128, \ @@ -112,8 +142,8 @@ static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = { MHI_CHANNEL_CONFIG_DL(15, "QMI", 4, 0), MHI_CHANNEL_CONFIG_UL(20, "IPCR", 8, 0), MHI_CHANNEL_CONFIG_DL(21, "IPCR", 8, 0), - MHI_CHANNEL_CONFIG_UL(100, "IP_HW0", 128, 1), - MHI_CHANNEL_CONFIG_DL(101, "IP_HW0", 128, 2), + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 1), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 2), }; static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { From patchwork Fri Nov 13 14:59:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324328 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262414ils; Fri, 13 Nov 2020 06:53:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJyJHYs8aNMePuZvcG7CsyaCclmfvfk2zSGilkHZie1nULU0XCEwYFQ6twPkKz5Cyc2FN61D X-Received: by 2002:a05:6402:1585:: with SMTP id c5mr2741065edv.372.1605279238537; Fri, 13 Nov 2020 06:53:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279238; cv=none; d=google.com; s=arc-20160816; b=khS8foyIEZefUDHM/TlKpAHEGg+EFrcRew0TENaIyX5l1S5OTvYp8/tOUoe2Qhi+vT M2/yi/IowFgqGozXBIkIrIBV9zO8Cr5d6dDZKpWv0jXVQXodPG4K1LSgnm5yTCIAbTFv VYDC1dEjJjFqW0Y15aaF0MCT+OzjsDAHoTuCNIyCc+Fuff6k5TJP00EEiSutkz2O0O6q 1B+mEL77WHfPQR9Nbe2l+3DkpsaFQGcxnSfqgNQpwH4wwTB0RQeusUqmhSov8myLIq3b SxOHPjdaNem1tCj0CCy25aTSm7P7tD2XcMjNRFAZ1Jb+KiJChOOxh24nxyYp/zDk8L/H 1SPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=dQci3mBBoR0tqqcwGOSS/7KOqdTfROUDHNeFyEKodBo=; b=rswi0FXHrxNKVaibW5I5wADzy1PMXpb9GouixKlgc4wofpzUI7nnZjXEl+J8pPc7OT 9M0fKH5AAZrrhHdietgfz7ofjF3G6vH2E1T/r6gtwO5AkR5Fzi6rZAbEuYqLsSW2J0kT vkQYMpHjVP8lg5NmCwR5ML/0HGPBeVGtrs2GGRjGxsRxtyUn9Hy0fASWiZHpxfSQ6QVh /wn0Ah00X28mYu1w/E2Ch0NGib0Z5CrTMYJ+UPmuqcYDrlD0qm9zlDJS2FMbL7Sl/vay isUwFJjxnTM0kor8zt+Ye232iG15HNVJms7J57qOacnpIEaNICAEiZU8i0UJO91m6AOz wD6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EzBMYQG7; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y7si5841525ejd.450.2020.11.13.06.53.58; Fri, 13 Nov 2020 06:53:58 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EzBMYQG7; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726825AbgKMOxf (ORCPT + 15 others); Fri, 13 Nov 2020 09:53:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726267AbgKMOxe (ORCPT ); Fri, 13 Nov 2020 09:53:34 -0500 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39E97C0613D1 for ; Fri, 13 Nov 2020 06:53:34 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id w24so8769123wmi.0 for ; Fri, 13 Nov 2020 06:53:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dQci3mBBoR0tqqcwGOSS/7KOqdTfROUDHNeFyEKodBo=; b=EzBMYQG7dyp0ovsdy4c/1ImzpGG1M8kLZQfqSQAzXDuuxjv4jWB4Q9ebpsirmNIGR8 891kAvhEMmKFYU8YbMOwrE86nVpG2WJEGh3be5Ego8RHap0DMLboFpnwOX9FCV3lWL6Z OVmAxwOkQcqLeUgt8hLm34QkmSNPIqNuj3WkFjENCiAalsbzxrhc9QhxdhKVKGf4MsRr cmot87c9Fw2mSNTG3gixZhBJptUvoaCn7+Dk4CwU7Wp3b7QYZEbzujncURTG+NBiwIdi /3KZ9ftUyLpzD/vKdOARPsVJ2EYS4M6Y0mRnpkTnM3lxeNXMCVfx0ioCqkmPFIal/ix9 Wvrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dQci3mBBoR0tqqcwGOSS/7KOqdTfROUDHNeFyEKodBo=; b=Nb8y+CmYqdIr8cTM+Shp5bQP3fHvfd4k49kOIAE/6VgAYWw0YPBg0d8DNrPgzaaMSs NzCFSuQyzjbBmFQUsxePEKvlcj8Ecel1Bn7VJ7GAH+T+NTfF//+8Gj37dHvl5lzR9R9H A+Dwdi3b/0/DkWbKUT/0HiL9bPu6VNEzME010RcA6onu6LgXaxQRDYpdxxGe6PlcrAOG ZUH2013TpaVomA1KVzl4OgYBtvY5ZnmPnla9PF8gDeoF/C5iWqogp2H+Au3JedT6OGYH A3xr8B+MJYCHqdUpSWL+PUm/nOgqFUHPIv678fdCwItPvAKm01gbBwT/cnUzlSgh/MRM qhoA== X-Gm-Message-State: AOAM531dKqyT/vvoVRQDAt4DNC7O407UERD69ZMEJMHEPfEnM7KEVdYx 9otqy0cb6LqYrkcoARnYupkK6g== X-Received: by 2002:a1c:490b:: with SMTP id w11mr2924512wma.101.1605279212908; Fri, 13 Nov 2020 06:53:32 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:304f:e9d4:6385:8ac5]) by smtp.gmail.com with ESMTPSA id i6sm10729341wma.42.2020.11.13.06.53.32 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Nov 2020 06:53:32 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, Loic Poulain Subject: [PATCH 4/8] mhi: pci_generic: Add support for reset Date: Fri, 13 Nov 2020 15:59:58 +0100 Message-Id: <1605279602-18749-5-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> References: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for resetting the device, reset can be triggered in case of error or manually via sysfs (/sys/bus/pci/devices/*/reset). Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 117 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 104 insertions(+), 13 deletions(-) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 0c07cf5..b48c382 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -8,6 +8,7 @@ * Copyright (C) 2020 Linaro Ltd */ +#include #include #include #include @@ -179,6 +180,16 @@ static const struct pci_device_id mhi_pci_id_table[] = { }; MODULE_DEVICE_TABLE(pci, mhi_pci_id_table); +enum mhi_pci_device_status { + MHI_PCI_DEV_STARTED, +}; + +struct mhi_pci_device { + struct mhi_controller mhi_cntrl; + struct pci_saved_state *pci_state; + unsigned long status; +}; + static int mhi_pci_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out) { @@ -203,6 +214,20 @@ static inline void mhi_pci_reset(struct mhi_controller *mhi_cntrl) writel(1, mhi_cntrl->regs + DEV_RESET_REG); } +static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl) +{ + struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev); + u16 vendor = 0; + + if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor)) + return false; + + if (vendor == (u16) ~0 || vendor == 0) + return false; + + return true; +} + static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, unsigned int bar_num, u64 dma_mask) { @@ -298,16 +323,18 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; const struct mhi_controller_config *mhi_cntrl_config; + struct mhi_pci_device *mhi_pdev; struct mhi_controller *mhi_cntrl; int err; dev_dbg(&pdev->dev, "MHI PCI device found: %s\n", info->name); - mhi_cntrl = mhi_alloc_controller(); - if (!mhi_cntrl) + mhi_pdev = devm_kzalloc(&pdev->dev, sizeof(*mhi_pdev), GFP_KERNEL); + if (!mhi_pdev) return -ENOMEM; mhi_cntrl_config = info->config; + mhi_cntrl = &mhi_pdev->mhi_cntrl; mhi_cntrl->cntrl_dev = &pdev->dev; mhi_cntrl->iova_start = 0; mhi_cntrl->iova_stop = DMA_BIT_MASK(info->dma_data_width); @@ -322,17 +349,21 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width)); if (err) - goto err_release; + return err; err = mhi_pci_get_irqs(mhi_cntrl, mhi_cntrl_config); if (err) - goto err_release; + return err; + + pci_set_drvdata(pdev, mhi_pdev); - pci_set_drvdata(pdev, mhi_cntrl); + /* Have stored pci confspace at hand for restore in sudden PCI error */ + pci_save_state(pdev); + mhi_pdev->pci_state = pci_store_saved_state(pdev); err = mhi_register_controller(mhi_cntrl, mhi_cntrl_config); if (err) - goto err_release; + return err; /* MHI bus does not power up the controller by default */ err = mhi_prepare_for_power_up(mhi_cntrl); @@ -347,37 +378,97 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) goto err_unprepare; } + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + return 0; err_unprepare: mhi_unprepare_after_power_down(mhi_cntrl); err_unregister: mhi_unregister_controller(mhi_cntrl); -err_release: - mhi_free_controller(mhi_cntrl); return err; } static void mhi_pci_remove(struct pci_dev *pdev) { - struct mhi_controller *mhi_cntrl = pci_get_drvdata(pdev); + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, true); + mhi_unprepare_after_power_down(mhi_cntrl); + } - mhi_power_down(mhi_cntrl, true); - mhi_unprepare_after_power_down(mhi_cntrl); mhi_unregister_controller(mhi_cntrl); /* MHI-layer reset could not be enough, always hard-reset the device */ mhi_pci_reset(mhi_cntrl); +} + +void mhi_pci_reset_prepare(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + dev_info(&pdev->dev, "reset\n"); - mhi_free_controller(mhi_cntrl); + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } + + /* cause internal device reset */ + mhi_pci_reset(mhi_cntrl); + + /* Be sure device reset has been executed */ + msleep(500); } +void mhi_pci_reset_done(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + int err; + + /* Restore initial known working PCI state */ + pci_load_saved_state(pdev, mhi_pdev->pci_state); + pci_restore_state(pdev); + + /* Is device status available ? */ + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(&pdev->dev, "reset failed\n"); + return; + } + + err = mhi_prepare_for_power_up(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to prepare MHI controller\n"); + return; + } + + err = mhi_sync_power_up(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to power up MHI controller\n"); + mhi_unprepare_after_power_down(mhi_cntrl); + return; + } + + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); +} + +static const struct pci_error_handlers mhi_pci_err_handler = { + .reset_prepare = mhi_pci_reset_prepare, + .reset_done = mhi_pci_reset_done, +}; + static struct pci_driver mhi_pci_driver = { .name = "mhi-pci-generic", .id_table = mhi_pci_id_table, .probe = mhi_pci_probe, - .remove = mhi_pci_remove + .remove = mhi_pci_remove, + .err_handler = &mhi_pci_err_handler, }; module_pci_driver(mhi_pci_driver); From patchwork Fri Nov 13 14:59:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324333 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262460ils; Fri, 13 Nov 2020 06:54:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJxfefPMwBvaSPI5+JyPhBNMh20RI+zvETTZpEItC2V8qtTVHdnmt8pAR98VJ8yUegyPP+ev X-Received: by 2002:a50:8b65:: with SMTP id l92mr2868146edl.132.1605279240854; Fri, 13 Nov 2020 06:54:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279240; cv=none; d=google.com; s=arc-20160816; b=OL6D6vNlcJes3kc83xDbF1Un4szE3ml/9PRQSFVKQjBg5xceQmI/vgS7TZmRPlwq8N g0dEWmkXwr7XCIyZ1TnQaDEogN/y7v3LQvTf0bykVYrDF+zFWs0GOyRpLJcGdZPFCZOE /KESfP2t59LwcT0Qs9Ay2vfHCv2kQixfk1f1vXEviZymbyhy5tt30TmEujF07EQJt1/y wK1l2/sGEWUnOvR4yuhLfhtgLF4SJCEsU6p1T6H7A8zYAteAMBakmgAdeiE6YX16tIPb tngphoNlhzqBK5W0mUZsKDgHeqWfX38xaEG/We5Ojrb99o0EOi+9l+s9XI9IDS78cl66 ZVDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=hhHhDYdP+8BPJr5kgR7RD3Uk81FZFDX0ZASxs+JRlko=; b=on8GMDUB1V68k2DKPHjkH6IlLtm2CIhhdpqO0NIO90tBV1tWtyUG0wTAl1zz7c+KNM Q9acvm4Rlihs5W8f0rOoTu/ujCJ0xV4UDrbFlI+R2TWyg4wU6EF6E9Ta7TY0dpSFr9FM R8MTfxaQ9r5PDi+ApUe9WHYURUITFhMlHFvy1mGtik/KkJBDBbnoW3jb03YowKrQRFVk Tc30Cef2QYdZqdoQjYcG4+YPrlldcmedUY3o1mGUvl33ZHyGAn0hninDCqz1b+geMm9d fC4ToDnWeVmbQm0NKQ9K4EbNbizTZZ8Nf+1k+R2ztg105TpqBafO0tK67MPM9tT7IhZN Tcxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bv3QPb3T; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y7si5841525ejd.450.2020.11.13.06.54.00; Fri, 13 Nov 2020 06:54:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bv3QPb3T; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726748AbgKMOxy (ORCPT + 15 others); Fri, 13 Nov 2020 09:53:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726701AbgKMOxy (ORCPT ); Fri, 13 Nov 2020 09:53:54 -0500 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1BF2C0613D1 for ; Fri, 13 Nov 2020 06:53:35 -0800 (PST) Received: by mail-wm1-x341.google.com with SMTP id a3so8719079wmb.5 for ; Fri, 13 Nov 2020 06:53:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hhHhDYdP+8BPJr5kgR7RD3Uk81FZFDX0ZASxs+JRlko=; b=bv3QPb3TQGfOZkMEevSqRGPcljPWTCf4P0D4GnOlVcK4RdXeiWSsnBzOqsFqBzvs18 38Bpj1b/DohLToMS3nYgryeR6n0K1eWKyK6nJEqlyqnh/KTch3rGtGBHaGHVwGeorwYG ipmKWRCo7rMZO8QJrigrX2GD+rLu4ecrn6UUyzG77TfYvVuUliHa0zBpJIMTUC0Om1eX UnI6MIZb5Z9/K2ZQ3xaRAFh5eo/dcjJ4n2Oq3V09MKlctZwBHQ3Ivd29RIU/KsAO2Uti 1x0MlMBxdgJ1BtShN4sbzSPaAH70/S34iEtVXhNGzAgMjaW+zuZXEIRqS4moU6l42WhJ PCFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hhHhDYdP+8BPJr5kgR7RD3Uk81FZFDX0ZASxs+JRlko=; b=Ch1lNTgJ1oRk8mNsZmCjXcz9/JXWcKx3/KlOUUWkXXe67CfWUtf70tRq8VrJz1xUWW pySMKYbad1Dg9DfkD8caxqrzZIoK9VFXSWJYRh1AiOFIPBOoc0t9qsiEcBUQjpN7Df29 PVhGqmltSqu1SJT1ALeY4PgTm0ozcsmf2ujXlNQMpUTq5C1XPNiFXP28Frm4W2lOr2SR 6OdJRVhP6p4Jna8j3RvEBMptoperX+JYOgAnHG4KDmT5UbjBKHuiZkbLjw6+VkHNtd2Q sSxqzq6Rtu27zRVobcMwEaYvV0ODGdUFdrbpKCQIhDoRTMfkfbwJzaRMFrAAjAUjJg6+ WeNw== X-Gm-Message-State: AOAM531D8VnBqsjnF9r+R4Jxo/BuhNCrnxYzwvfdxDwGS6AWnn86zF+D N38kb3FaeCeND9j0Ayk/tKtSyA== X-Received: by 2002:a1c:f612:: with SMTP id w18mr2994885wmc.11.1605279214464; Fri, 13 Nov 2020 06:53:34 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:304f:e9d4:6385:8ac5]) by smtp.gmail.com with ESMTPSA id i6sm10729341wma.42.2020.11.13.06.53.32 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Nov 2020 06:53:33 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, Loic Poulain Subject: [PATCH 5/8] mhi: pci_generic: Add suspend/resume/recovery procedure Date: Fri, 13 Nov 2020 15:59:59 +0100 Message-Id: <1605279602-18749-6-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> References: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for system wide suspend/resume. During suspend, MHI device controller must be put in M3 state and PCI bus in D3 state. Add a recovery procedure allowing to reinitialize the device in case of error during resume steps, which can happen if device loses power (and so its context) while system suspend. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 100 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index b48c382..75f565b 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -13,6 +13,7 @@ #include #include #include +#include #define MHI_PCI_DEFAULT_BAR_NUM 0 @@ -187,6 +188,7 @@ enum mhi_pci_device_status { struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; + struct work_struct recovery_work; unsigned long status; }; @@ -319,6 +321,48 @@ static void mhi_pci_runtime_put(struct mhi_controller *mhi_cntrl) /* no PM for now */ } +static void mhi_pci_recovery_work(struct work_struct *work) +{ + struct mhi_pci_device *mhi_pdev = container_of(work, struct mhi_pci_device, + recovery_work); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev); + int err; + + dev_warn(&pdev->dev, "device recovery started\n"); + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } + + /* Check if we can recover without full reset */ + pci_set_power_state(pdev, PCI_D0); + pci_load_saved_state(pdev, mhi_pdev->pci_state); + pci_restore_state(pdev); + + if (!mhi_pci_is_alive(mhi_cntrl)) + goto err_try_reset; + + err = mhi_prepare_for_power_up(mhi_cntrl); + if (err) + goto err_try_reset; + + err = mhi_sync_power_up(mhi_cntrl); + if (err) + goto err_unprepare; + + set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + return; + +err_unprepare: + mhi_unprepare_after_power_down(mhi_cntrl); +err_try_reset: + if (pci_reset_function(pdev)) + dev_err(&pdev->dev, "Recovery failed\n"); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -333,6 +377,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (!mhi_pdev) return -ENOMEM; + INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; mhi_cntrl->cntrl_dev = &pdev->dev; @@ -395,6 +441,8 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + cancel_work_sync(&mhi_pdev->recovery_work); + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, true); mhi_unprepare_after_power_down(mhi_cntrl); @@ -463,12 +511,64 @@ static const struct pci_error_handlers mhi_pci_err_handler = { .reset_done = mhi_pci_reset_done, }; +int __maybe_unused mhi_pci_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + /* Transition to M3 state */ + mhi_pm_suspend(mhi_cntrl); + + pci_save_state(pdev); + pci_disable_device(pdev); + pci_wake_from_d3(pdev, true); + pci_set_power_state(pdev, PCI_D3hot); + + return 0; +} + +static int __maybe_unused mhi_pci_resume(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + int err; + + pci_set_power_state(pdev, PCI_D0); + pci_restore_state(pdev); + pci_set_master(pdev); + + err = pci_enable_device(pdev); + if (err) + goto err_recovery; + + /* Exit M3, transition to M0 state */ + err = mhi_pm_resume(mhi_cntrl); + if (err) { + dev_err(&pdev->dev, "failed to resume device: %d\n", err); + goto err_recovery; + } + + return 0; + +err_recovery: + /* The device may have loose power or crashed, try recovering it */ + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return 0; +} + +static const struct dev_pm_ops mhi_pci_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(mhi_pci_suspend, mhi_pci_resume) +}; + static struct pci_driver mhi_pci_driver = { .name = "mhi-pci-generic", .id_table = mhi_pci_id_table, .probe = mhi_pci_probe, .remove = mhi_pci_remove, .err_handler = &mhi_pci_err_handler, + .driver.pm = &mhi_pci_pm_ops }; module_pci_driver(mhi_pci_driver); From patchwork Fri Nov 13 15:00:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324330 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262430ils; Fri, 13 Nov 2020 06:53:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJzaqv/ju4/N6f8avotcaKJGLx+RpgYPMkgJlRf2q6B65cVGob0uS+LTF83RLnP8OVBlCDIi X-Received: by 2002:a17:906:8387:: with SMTP id p7mr2117510ejx.511.1605279239396; Fri, 13 Nov 2020 06:53:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279239; cv=none; d=google.com; s=arc-20160816; b=OJPuG39DmgmZbXN1NzCd7Da+Xnv2ZATiJrzSbobpYnP2q8eTrzr7ND1SY5m9IcWtAG GiwyS6uguUOWOVyzfWhTQk8hGH9wlDtGm+UNMT1o/UYpIHNpZhLDBMosFHYNLEQkYWzv s+ROXRZf9B9ZnXLvLF06cxpaCivD2H7HWqf/pR40fME+NzyjjuYrfhaYbtMfiEyM9kh/ xJavoeIClM8CgEqnnymmLuC9HIc4Vl+jDFLR971AgjdUdzVaCMn4PeFF8qDmox8Oact0 Gzom0+u8QcZdcqWJ+DVJdaYbUlIdRX6CXblKiODp0Y0UabLP28c+mQcM0tj+4k3AtBoX YMMQ== ARC-Message-Signature: i=1; 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This patch enables error reporting and implements error_detected, slot_reset and resume callbacks. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 50 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 75f565b..a7fbba5 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -8,6 +8,7 @@ * Copyright (C) 2020 Linaro Ltd */ +#include #include #include #include @@ -407,6 +408,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) pci_save_state(pdev); mhi_pdev->pci_state = pci_store_saved_state(pdev); + pci_enable_pcie_error_reporting(pdev); + err = mhi_register_controller(mhi_cntrl, mhi_cntrl_config); if (err) return err; @@ -506,7 +509,54 @@ void mhi_pci_reset_done(struct pci_dev *pdev) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); } +static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, + pci_channel_state_t state) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + dev_err(&pdev->dev, "PCI error detected, state = %u\n", state); + + if (state == pci_channel_io_perm_failure) + return PCI_ERS_RESULT_DISCONNECT; + + /* Clean up MHI state */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } else { + /* Nothing to do */ + return PCI_ERS_RESULT_RECOVERED; + } + + pci_disable_device(pdev); + + return PCI_ERS_RESULT_NEED_RESET; +} + +static pci_ers_result_t mhi_pci_slot_reset(struct pci_dev *pdev) +{ + if (pci_enable_device(pdev)) { + dev_err(&pdev->dev, "Cannot re-enable PCI device after reset.\n"); + return PCI_ERS_RESULT_DISCONNECT; + } + + return PCI_ERS_RESULT_RECOVERED; +} + +static void mhi_pci_io_resume(struct pci_dev *pdev) +{ + struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); + + dev_err(&pdev->dev, "PCI slot reset done\n"); + + queue_work(system_long_wq, &mhi_pdev->recovery_work); +} + static const struct pci_error_handlers mhi_pci_err_handler = { + .error_detected = mhi_pci_error_detected, + .slot_reset = mhi_pci_slot_reset, + .resume = mhi_pci_io_resume, .reset_prepare = mhi_pci_reset_prepare, .reset_done = mhi_pci_reset_done, }; From patchwork Fri Nov 13 15:00:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324332 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262450ils; Fri, 13 Nov 2020 06:54:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJwDktPUZmuQ5Sf4QLwEbE5nnHKJGLKbCQ0r//4Le5D+jUEXA6XlTwNMWSW8VDzLirC//yfr X-Received: by 2002:a17:906:6949:: with SMTP id c9mr2223745ejs.482.1605279240434; Fri, 13 Nov 2020 06:54:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279240; cv=none; d=google.com; s=arc-20160816; b=MsrlMBFYgeMRKjjZClXpLFIAucoGYd+ehEFV81J3Rj5xb+84AkommRXquuH/pQsF4d ZdrGa/+0cVR+QMwHc43K0rAFC3R2FLGxh32vDpD/4PYO8wC771rZPL8XlTGp30NAmp1y 0KE8hAkRT2qQsPea1TfByvvdtqPB1mfW/mByNKDxk4H6o3bD8KCH6zf7umeiIneVpR7J 6bEY2lW8X/c6EHRDdTFtCtJ24ka41FqpmpBxzWplrCO3bvucJhpT+A62ZVu+ouXSVQ/Z PHsraB1KcEFF+fnFi/S8UUyMPlS1wN3f2vBPpSRaPuqn4wv91rVZxJm0JkYkPR1R93WA xAjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=bm260PJoO5H8NK8G6hExam2xqasQcYPyaEgFTuITWiM=; b=xzdn6TcQNKDhYjpxADzDXeAzeFfXbfSeX5aJvcubDrirgNw2Zh060QKt0liwtg8ioY yoDzOATq1UI9jGxwjivK2apMBv8kG6nFvtf6OmG/vRm5edEEupZxkpnFaLB/IMVjZg8w QJmo7aDUzAWceqJtSFOU//dQkTqUihUrM3d/cC5v8q7urNrp1A1T0FQdEqWF20vCVpGf kMx6VxzVL+4f/lRXMz1Z8GB1pDobpJqCCI2Wq3HtnxknnF4ImFmXo3egZggkZiLeaykm reV2fm1W9nbYbglWGhi3jJaDY0U6rrGc+Q9v5+yJFatOEx4VgIcgljtF0PpyhzsI6X3p IqZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eG3fS+qa; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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This patch implements a health-check mechanism to check regularly that device is alive (MHI layer can communicate with). If device is not alive (because a crash or unexpected reset), the recovery procedure is triggered. Tested successfully with Telit FN980m module. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index a7fbba5..6cc7bb9 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -14,12 +14,15 @@ #include #include #include +#include #include #define MHI_PCI_DEFAULT_BAR_NUM 0 #define DEV_RESET_REG (0xB0) +#define HEALTH_CHECK_PERIOD (HZ * 5) + /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -190,6 +193,7 @@ struct mhi_pci_device { struct mhi_controller mhi_cntrl; struct pci_saved_state *pci_state; struct work_struct recovery_work; + struct timer_list health_check_timer; unsigned long status; }; @@ -332,6 +336,8 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_warn(&pdev->dev, "device recovery started\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -355,6 +361,7 @@ static void mhi_pci_recovery_work(struct work_struct *work) goto err_unprepare; set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); return; err_unprepare: @@ -364,6 +371,21 @@ static void mhi_pci_recovery_work(struct work_struct *work) dev_err(&pdev->dev, "Recovery failed\n"); } +static void health_check(struct timer_list *t) +{ + struct mhi_pci_device *mhi_pdev = from_timer(mhi_pdev, t, health_check_timer); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + if (!mhi_pci_is_alive(mhi_cntrl)) { + dev_err(mhi_cntrl->cntrl_dev, "Device died\n"); + queue_work(system_long_wq, &mhi_pdev->recovery_work); + return; + } + + /* reschedule in two seconds */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); +} + static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { const struct mhi_pci_dev_info *info = (struct mhi_pci_dev_info *) id->driver_data; @@ -379,6 +401,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) return -ENOMEM; INIT_WORK(&mhi_pdev->recovery_work, mhi_pci_recovery_work); + timer_setup(&mhi_pdev->health_check_timer, health_check, 0); mhi_cntrl_config = info->config; mhi_cntrl = &mhi_pdev->mhi_cntrl; @@ -429,6 +452,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + /* start health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_unprepare: @@ -444,6 +470,7 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + del_timer(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { @@ -464,6 +491,8 @@ void mhi_pci_reset_prepare(struct pci_dev *pdev) dev_info(&pdev->dev, "reset\n"); + del_timer(&mhi_pdev->health_check_timer); + /* Clean up MHI state */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { mhi_power_down(mhi_cntrl, false); @@ -507,6 +536,7 @@ void mhi_pci_reset_done(struct pci_dev *pdev) } set_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status); + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); } static pci_ers_result_t mhi_pci_error_detected(struct pci_dev *pdev, @@ -567,6 +597,9 @@ int __maybe_unused mhi_pci_suspend(struct device *dev) struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + /* Suspend health check */ + del_timer(&mhi_pdev->health_check_timer); + /* Transition to M3 state */ mhi_pm_suspend(mhi_cntrl); @@ -600,6 +633,9 @@ static int __maybe_unused mhi_pci_resume(struct device *dev) goto err_recovery; } + /* Resume health check */ + mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); + return 0; err_recovery: From patchwork Fri Nov 13 15:00:02 2020 Content-Type: text/plain; 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Increase the timeout to prevent MHI power-up issues. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 Reviewed-by: Bhaumik Bhatt Reviewed-by: Hemant Kumar diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 6cc7bb9..7f0068c 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -162,7 +162,7 @@ static const struct mhi_event_config modem_qcom_v1_mhi_events[] = { static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { .max_channels = 128, - .timeout_ms = 5000, + .timeout_ms = 8000, .num_channels = ARRAY_SIZE(modem_qcom_v1_mhi_channels), .ch_cfg = modem_qcom_v1_mhi_channels, .num_events = ARRAY_SIZE(modem_qcom_v1_mhi_events),