From patchwork Wed Nov 11 05:47:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 322914 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp118338ils; Tue, 10 Nov 2020 21:47:51 -0800 (PST) X-Google-Smtp-Source: ABdhPJzMF6xifsZhoBALJPjvjLbWrVXEg9dG+5ymbWa2OWXOZCVlGKk/lBxSxgUk19KZk2Ne5tJL X-Received: by 2002:a25:b942:: with SMTP id s2mr27780395ybm.391.1605073671492; Tue, 10 Nov 2020 21:47:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605073671; cv=none; d=google.com; s=arc-20160816; b=LHkIBLOWygUGYnxtPI5xbYUlDuldHJ/7oZWaqc3YeQtu08VuM85tEquPo/6vQBd1Zv 6S6tShBYD8sZIfVLq4axKEu3IZesoDWDb6KJNFRshwN795XB7IzqBFghFSXs0244H9Xl zrOdts/ZCubB8QRNRa09IV92YwyeO8IXuXd2O/nGE2xaG37VkLjwgJaWiAlRUeYGY3N1 d4w2XQI+Ngr3XesaPPDnKuaLWhajLzcsKWx1g2kyzO69zrs3KALxwMKTIyHCSPCTFj0S T/iqalmNxyszxFy0hMAUFu3enhORk06RPTafIbLswO2ocnRjPn5vl0g7ciavOCwIJism cSeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :ironport-sdr:ironport-sdr; bh=F818ISiUwYAHsy1fh/5xvauzyXTYpBsqAv/WA0uExhA=; b=C6ZMMVSjT/wD1t+/rKnYTg1YJxVOtwzM+uR1+HyEYxDalwAoEi4GrW/sOvkrh88Jgr iiH7Z5dbGGXVkxy/wHEtBmT4jXSqc3fAzjlgwQbEQQo4dyehW3Rl331rzHse0XPxQFbY BWEuYGj+WgGlsQOdpTOEwD7ijKoUBY4r6UgIsVqdFFlWaZ78UJV3RFpfgOgzbRrDvsC0 KoCJ1sLg9UvWqIfh6pT099xREjalV24Dkxp089GKeCu8pzjb8nlKDVi95NNyDT7725rD QLxnDarV/bgC8C/f6cEtMSNmXxCOLjkGhFZjKjB+c33ncHnon3wjPo4VXANZxRPRr7Yl HR0A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f88si1353606ybi.75.2020.11.10.21.47.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 10 Nov 2020 21:47:51 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from localhost ([::1]:39684 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kciz0-0003rE-Tf for patch@linaro.org; Wed, 11 Nov 2020 00:47:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56058) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kciyo-0003qz-7o for qemu-devel@nongnu.org; Wed, 11 Nov 2020 00:47:38 -0500 Received: from mga14.intel.com ([192.55.52.115]:60768) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kciyl-0008O5-5p for qemu-devel@nongnu.org; Wed, 11 Nov 2020 00:47:37 -0500 IronPort-SDR: JVKLAE+UtARd2ciQ3MOSVSfgkJfdQq1Xhv+fweg+Pv+8K9R+Rc+hYACzECVn9ACnRxvya6XwIa 3bJHRny+zpnw== X-IronPort-AV: E=McAfee;i="6000,8403,9801"; a="169314658" X-IronPort-AV: E=Sophos;i="5.77,468,1596524400"; d="scan'208";a="169314658" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Nov 2020 21:47:28 -0800 IronPort-SDR: h+xOlF9TcjRWUkbJgHCiHClWxvL6t5hYRwS/GYHG0GJM2AieTXorOcv4BvHm1N05Ew2f4B1n9O B13xTh6CK2GA== X-IronPort-AV: E=Sophos;i="5.77,468,1596524400"; d="scan'208";a="308710385" Received: from hccoutan-mobl1.amr.corp.intel.com (HELO bwidawsk-mobl5.local) ([10.252.131.159]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Nov 2020 21:47:27 -0800 From: Ben Widawsky To: qemu-devel@nongnu.org Subject: [RFC PATCH 01/25] Temp: Add the PCI_EXT_ID_DVSEC definition to the qemu pci_regs.h copy. Date: Tue, 10 Nov 2020 21:47:00 -0800 Message-Id: <20201111054724.794888-2-ben.widawsky@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201111054724.794888-1-ben.widawsky@intel.com> References: <20201111054724.794888-1-ben.widawsky@intel.com> MIME-Version: 1.0 Received-SPF: pass client-ip=192.55.52.115; envelope-from=ben.widawsky@intel.com; helo=mga14.intel.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/11/11 00:47:28 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vishal Verma , Dan Williams , Ben Widawsky , Jonathan Cameron Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Jonathan Cameron This hasn't yet been added to the linux kernel tree, so for purposes of this RFC just add it locally. Signed-off-by: Jonathan Cameron Signed-off-by: Ben Widawsky --- include/standard-headers/linux/pci_regs.h | 1 + 1 file changed, 1 insertion(+) -- 2.29.2 diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h index a95d55f9f2..5d0b79b9da 100644 --- a/include/standard-headers/linux/pci_regs.h +++ b/include/standard-headers/linux/pci_regs.h @@ -723,6 +723,7 @@ #define PCI_EXT_CAP_ID_DPC 0x1D /* Downstream Port Containment */ #define PCI_EXT_CAP_ID_L1SS 0x1E /* L1 PM Substates */ #define PCI_EXT_CAP_ID_PTM 0x1F /* Precision Time Measurement */ +#define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */ #define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */ #define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */ #define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_16GT