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[114.34.229.221]) by smtp.gmail.com with ESMTPSA id a184sm10117433pfa.86.2020.11.08.23.57.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Nov 2020 23:57:10 -0800 (PST) From: Greentime Hu To: greentime.hu@sifive.com, linux-kernel@vger.kernel.org, linus.walleij@linaro.org, bgolaszewski@baylibre.com, linux-gpio@vger.kernel.org, linux-riscv@lists.infradead.org, palmer@dabbelt.com, paul.walmsley@sifive.com, andy.shevchenko@gmail.com, yash.shah@sifive.com Subject: [PATCH] gpio: sifive: To get gpio irq offset from device tree data Date: Mon, 9 Nov 2020 15:57:02 +0800 Message-Id: <20201109075702.21370-1-greentime.hu@sifive.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We can get hwirq number of the gpio by its irq_data->hwirq so that we don't need to add more macros for different platforms. This patch is tested in SiFive Unleashed board and SiFive Unmatched board. Signed-off-by: Greentime Hu --- drivers/gpio/gpio-sifive.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index c54dd08f2cbf..bfb915bf5d78 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -29,7 +29,6 @@ #define SIFIVE_GPIO_OUTPUT_XOR 0x40 #define SIFIVE_GPIO_MAX 32 -#define SIFIVE_GPIO_IRQ_OFFSET 7 struct sifive_gpio { void __iomem *base; @@ -37,7 +36,7 @@ struct sifive_gpio { struct regmap *regs; unsigned long irq_state; unsigned int trigger[SIFIVE_GPIO_MAX]; - unsigned int irq_parent[SIFIVE_GPIO_MAX]; + unsigned int irq_number[SIFIVE_GPIO_MAX]; }; static void sifive_gpio_set_ie(struct sifive_gpio *chip, unsigned int offset) @@ -144,8 +143,10 @@ static int sifive_gpio_child_to_parent_hwirq(struct gpio_chip *gc, unsigned int *parent, unsigned int *parent_type) { + struct sifive_gpio *chip = gpiochip_get_data(gc); + struct irq_data *d = irq_get_irq_data(chip->irq_number[child]); + *parent = irqd_to_hwirq(d); *parent_type = IRQ_TYPE_NONE; - *parent = child + SIFIVE_GPIO_IRQ_OFFSET; return 0; } @@ -165,7 +166,7 @@ static int sifive_gpio_probe(struct platform_device *pdev) struct irq_domain *parent; struct gpio_irq_chip *girq; struct sifive_gpio *chip; - int ret, ngpio; + int ret, ngpio, i; chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); if (!chip) @@ -200,6 +201,9 @@ static int sifive_gpio_probe(struct platform_device *pdev) return -ENODEV; } + for (i = 0; i < ngpio; i++) + chip->irq_number[i] = platform_get_irq(pdev, i); + ret = bgpio_init(&chip->gc, dev, 4, chip->base + SIFIVE_GPIO_INPUT_VAL, chip->base + SIFIVE_GPIO_OUTPUT_VAL,