From patchwork Fri Oct 16 14:12:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 317812 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp1490829ilm; Fri, 16 Oct 2020 07:13:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyrF6e26ClNkziTU6T958nLkL5sq1+JjK+gRBSz9gldO7OngIgXJ6P4KqopcpNEDKPeHpAU X-Received: by 2002:a17:906:edb0:: with SMTP id sa16mr3880723ejb.327.1602857583061; Fri, 16 Oct 2020 07:13:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602857583; cv=none; d=google.com; s=arc-20160816; b=sx8ORfXxBwziu3BBidjJNJDYg2j1Q/vNBQZhKWuxUoMcn615RvY+nzGPI+GIa0oYDt R4JfVv9Gus+Ow79hxJBVRh/AGv67kWfVHWtnhxPmfv2aZwM7dI7HEKYINmNuPX4NEHj4 M7nH+78d47CH/zRsedjR86qIfix49ibut2NoIi8Yibq+cY2qbYYC9oYicbcrta46l98o 2deP7NKinaPiAgJvsGOvwf6QWPwyu+VcqrCRNhjpwIX8oolmGURdzw36IDiH4fx2nStk 4tf4tLoUuWqh+J16BPjViap/6mwQskESA3HSYd74fcki6XvOrgq633b4DXzaEqcQK3wm PayQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hLnWR4evaA6k5JcpTnqiMDGjsxjllMiiAGlGQ8F3HZE=; b=dgSgQUMzrdMS3kIiJ+HatPTxoe1k6nNL2InK51JTUxsgB1j5pk5uxeKfqef38ikM2w EqLbkm6h8BxyL3npdJ0CYvm3SYOms1kckroK6LhZIR1C3DIoQxnKPD9X/yjU62KE6feb 6H5ABOOmVVUhI3aQlBorBmHgFseR3Juox6owN9zQmfyWuV0m1LEkKqMqqCPj/ZSqPVXV x1o7g79hc7Qm4svxz9ie3jiNTHJ/u4aVfyEAX1DMAzS5e1GcIDI56fpGL98igmJsnUpj eC+Hlvj/fFuNL0do2cUS/yhREIAK0K/Gca2Fa/k0P7wO+hLdW6PTZgJKmSmg6qn+uftO T+oQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ERMd+nbj; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f3si1964370ejt.743.2020.10.16.07.13.01; Fri, 16 Oct 2020 07:13:03 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ERMd+nbj; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408664AbgJPOM7 (ORCPT + 6 others); Fri, 16 Oct 2020 10:12:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2408661AbgJPOM5 (ORCPT ); Fri, 16 Oct 2020 10:12:57 -0400 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 062D6C0613D6 for ; Fri, 16 Oct 2020 07:12:57 -0700 (PDT) Received: by mail-wm1-x344.google.com with SMTP id k18so3111867wmj.5 for ; Fri, 16 Oct 2020 07:12:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hLnWR4evaA6k5JcpTnqiMDGjsxjllMiiAGlGQ8F3HZE=; b=ERMd+nbjjHaN7RaIuVgDuyH1YiLlpP4VXA/JN0jvQOmKrKRXymFiIGTtcbfVVPYDMe aRtGls32X/9FB1Y8U8GsPR8WLeGEVhiemPNRB6X7BTPnLEYSjvGpnSyQ8e45dcT0VeyG ztuSqhcwcYoch8Vx+7fbh42e1YZbNjFkRksdntzQK3qiQ6c9cjDKeGh/sv2VHTVAC4lC VubE/ACyEvbsf8AzEsT+GihjCVi59qoYuUI82uh8ty6taQg+mF+zNgXuGwJvV5W7nkrQ hSBiiBpvWuigr/doO/rP7mmT9qGr+hlyE0UehC3p2NE4fg9gXgHTJ9FbzUykgpdWLhie cBwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hLnWR4evaA6k5JcpTnqiMDGjsxjllMiiAGlGQ8F3HZE=; b=L9XNMAf4jHum5zw3jHO/eDKnsSwVIvKZw7cPtadezfoSiFestS4t152fAm1oWuXQfD 8N/UtCdRleT5jB9MQQMKw3R+PtiQGuR8IqyI6imsK6TUFbFXrtZwME3i/sEo34FtgCVo 6zNNbzz1XIfWh4cOGecfZNvUAfL/qt4tMdMpHWOTp9JcpEbV5XPPbiUgNIs9zfH5tqmj ZdfHmVV1lX2ipcxGiCEmj6X+2tVmD/UGt2Cei+XZ+IReMrIPglJS8oA+SqSbUGFLg88v WdN/jB51rBXKgn1WduHblo+COwiWJQtDVBQSZWZ2QkqOVOEa6I6K2fQqRfJrPpr6U+SU IdlQ== X-Gm-Message-State: AOAM530H9hYiPgLj1tsIr8+sHOycvzWC9gLJku+FoerhDm6T6iPvHNUz hicGlvFKdf/JpxeiFdnWEqqWxA== X-Received: by 2002:a1c:4909:: with SMTP id w9mr4263781wma.133.1602857575769; Fri, 16 Oct 2020 07:12:55 -0700 (PDT) Received: from srini-hackbox.lan (cpc86377-aztw32-2-0-cust226.18-1.cable.virginm.net. [92.233.226.227]) by smtp.gmail.com with ESMTPSA id p9sm2982284wma.12.2020.10.16.07.12.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Oct 2020 07:12:54 -0700 (PDT) From: Srinivas Kandagatla To: sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Cc: bjorn.andersson@linaro.org, mturquette@baylibre.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v3 1/4] dt-bindings: clock: Add support for LPASS Audio Clock Controller Date: Fri, 16 Oct 2020 15:12:38 +0100 Message-Id: <20201016141241.5839-2-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20201016141241.5839-1-srinivas.kandagatla@linaro.org> References: <20201016141241.5839-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Audio Clock controller is a block inside LPASS which controls 2 Glitch free muxes to LPASS codec Macros. Signed-off-by: Srinivas Kandagatla --- .../bindings/clock/qcom,audiocc-sm8250.yaml | 58 +++++++++++++++++++ .../clock/qcom,sm8250-lpass-audiocc.h | 13 +++++ 2 files changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml create mode 100644 include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h -- 2.21.0 diff --git a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml new file mode 100644 index 000000000000..915d76206ad0 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs + +maintainers: + - Srinivas Kandagatla + +description: | + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. + See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list + of Audio Clock controller clock IDs. + +properties: + compatible: + const: qcom,sm8250-lpass-audiocc + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + items: + - description: LPASS Core voting clock + - description: Glitch Free Mux register clock + + clock-names: + items: + - const: core + - const: bus + +required: + - compatible + - reg + - '#clock-cells' + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + clock-controller@3300000 { + #clock-cells = <1>; + compatible = "qcom,sm8250-lpass-audiocc"; + reg = <0x03300000 0x30000>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "bus"; + }; diff --git a/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h b/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h new file mode 100644 index 000000000000..a1aa6cb5d840 --- /dev/null +++ b/include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H +#define _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H + +/* From AudioCC */ +#define LPASS_CDC_WSA_NPL 0 +#define LPASS_CDC_WSA_MCLK 1 +#define LPASS_CDC_RX_MCLK 2 +#define LPASS_CDC_RX_NPL 3 +#define LPASS_CDC_RX_MCLK_MCLK2 4 + +#endif /* _DT_BINDINGS_CLK_LPASS_AUDIOCC_SM8250_H */ From patchwork Fri Oct 16 14:12:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 317813 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp1490965ilm; Fri, 16 Oct 2020 07:13:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxPoZzs9GVoqr7aMbroI+F74AejOZAPRJj7098HyQwUPD47OGaz0vLzu0tMCI53r6RU8PXY X-Received: by 2002:a17:906:8688:: with SMTP id g8mr4038614ejx.535.1602857591194; Fri, 16 Oct 2020 07:13:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602857591; cv=none; d=google.com; s=arc-20160816; b=fG0igmZkLIit9k0blc4kn7AEDsh830XGkfZNsrt2vsZgbytvKQjldAR6YW5LA+W/0Q aloLgGfJVOZne1PvyjfUWH8wqg6Ssy7XBdCrigfn15Ab7jE8626H8F/3iaM65Dlqhfz9 nhkEIY2rFf+vxxNY/Snbt61cJUpUDefc2vvZyzYsDkJoIkSnq89iDG1oUY2GWMaHGWVV V3qK2mw/Xaip2FVzuO+Maal6dRgPNeyV1zFlad6bDe7zY2nPoP2ceBt+wUt5NqgSKKdw Ai9KqFWqIZxh/MBJjWLUPjZZToFgfMWe5LQAD8C9kZK4l8puFtTPOtDOVUJShKfDddnP 6Y4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=csBLm3ebHLvfnJwPW+GEPGSRmaYpvOkO16WRyubpNjA=; b=kQG1aYBk8G6GHwJ9ahf+RYUle6KQ0Zi5tV+bHlKZ3BUWVZYNbd2vAV2kBIpM3fG9z3 W3mdf7ZK1IvNFjifwysArAbUiuZ7eLin5KlSivu4/XS7xsdWpoUVy2D6R/hV8+4tKldY c6PLL1bWK5GneHy2yZ3F9vO7EGuHK0dkWM8VPI7mBlCevkAGXmU2ZE51ZWTby73aSiSM DSevmEeA/8gg7MOmGBUYq16Wrckk7In2pF4U70b2FFpSENO93n1eW+nyFI1g3AsHwBqc 8Gmv+MuL30x62Dbju9LqCY8F5SY8JVF7iod4lneQ/nEBKsfGlbaVcNtbVzVv3YlBpqHM zefA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jCjzqcNL; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f3si1964370ejt.743.2020.10.16.07.13.11; Fri, 16 Oct 2020 07:13:11 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jCjzqcNL; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408625AbgJPONK (ORCPT + 6 others); Fri, 16 Oct 2020 10:13:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2408683AbgJPONI (ORCPT ); Fri, 16 Oct 2020 10:13:08 -0400 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC32BC0613DE for ; Fri, 16 Oct 2020 07:13:03 -0700 (PDT) Received: by mail-wm1-x344.google.com with SMTP id j136so3145741wmj.2 for ; Fri, 16 Oct 2020 07:13:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=csBLm3ebHLvfnJwPW+GEPGSRmaYpvOkO16WRyubpNjA=; b=jCjzqcNL3iczaFS9JnMzZxi14XrBwh6PymeoF2RT1H0/QG7D8NXJrQlSFIICo6fCje VSwaeZBsX7kgRyl/muJVSBdlOZLyv6SBkKHNvNJQgZJoPEYIMLUZ3PvI9N8XUAnOWl34 rr+V3YDkQJUo/JIKTJQm0nmWTv40JBy98of/EI0pHKaQ12Os/6Yy/3/NIZFTPiRUZeHZ feUAitr8HCDmZ3MN1y/2/EV8HGpOTtSzQMeHev6ZtCefBcjOwK3mo68KlOZs9gpPvFSG ZlvVi658Ux+XtMnfLUO5x9nBd+Ka3cZsCmx4MuAoBWIjfvKAr14p8bOsV6IckMsr4Bja H1gQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=csBLm3ebHLvfnJwPW+GEPGSRmaYpvOkO16WRyubpNjA=; b=nmb53RIqU3WW+7HDdmzesC73zcT+FT4CjAuAwtKybkBkm6KuF3/AelUJSZPKrwaOG4 m8DeCDt8Xv5IMzZr9l8pJqo+rcKQ5ZJS4ht1rZtvCJbXdIMoW4HFA6ay26HcpG2FQ40v QvTbmZX6HYf2mWgISxhIcsBK3zpkyiLEzMqXO/hGzySZEggeTtb6gWjqKeShGPtYniiq cmX9gESM2ZjwPZhsOHl5giPpcd84Cf+NXi4Nd/phK3e7QTh2D0qREzs5OftI3hf1YAKV 1qpGwleiMGf+I1L3cFLNZR8eymkOyml55FTKbXLrA/GKt+BltNL8Ao/DHZ++e0oojlHA 1XxA== X-Gm-Message-State: AOAM531HzOsgv27+5/Kee5oydTy+aKW23rKMN1bb7AqtyTfzkjnPov0x X6wb1qOxeTDJWNUs8+A+wthhiA== X-Received: by 2002:a1c:c28a:: with SMTP id s132mr3958670wmf.67.1602857582631; Fri, 16 Oct 2020 07:13:02 -0700 (PDT) Received: from srini-hackbox.lan (cpc86377-aztw32-2-0-cust226.18-1.cable.virginm.net. [92.233.226.227]) by smtp.gmail.com with ESMTPSA id p9sm2982284wma.12.2020.10.16.07.13.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Oct 2020 07:13:01 -0700 (PDT) From: Srinivas Kandagatla To: sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Cc: bjorn.andersson@linaro.org, mturquette@baylibre.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v3 4/4] clk: qcom: Add support to LPASS AON_CC Glitch Free Mux clocks Date: Fri, 16 Oct 2020 15:12:41 +0100 Message-Id: <20201016141241.5839-5-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20201016141241.5839-1-srinivas.kandagatla@linaro.org> References: <20201016141241.5839-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org LPASS Always ON Clock controller has one GFM mux to control VA and TX clocks to codec macro on LPASS. This patch adds support to this mux. Signed-off-by: Srinivas Kandagatla --- drivers/clk/qcom/lpass-gfm-sm8250.c | 63 +++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) -- 2.21.0 diff --git a/drivers/clk/qcom/lpass-gfm-sm8250.c b/drivers/clk/qcom/lpass-gfm-sm8250.c index 48a73dd97d0d..d366c7c2abc7 100644 --- a/drivers/clk/qcom/lpass-gfm-sm8250.c +++ b/drivers/clk/qcom/lpass-gfm-sm8250.c @@ -18,6 +18,7 @@ #include #include #include +#include struct lpass_gfm { struct device *dev; @@ -65,6 +66,46 @@ static const struct clk_ops clk_gfm_ops = { .determine_rate = __clk_mux_determine_rate, }; +static struct clk_gfm lpass_gfm_va_mclk = { + .mux_reg = 0x20000, + .mux_mask = BIT(0), + .hw.init = &(struct clk_init_data) { + .name = "VA_MCLK", + .ops = &clk_gfm_ops, + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, + .num_parents = 2, + .parent_data = (const struct clk_parent_data[]){ + { + .index = 0, + .fw_name = "LPASS_CLK_ID_TX_CORE_MCLK", + }, { + .index = 1, + .fw_name = "LPASS_CLK_ID_VA_CORE_MCLK", + }, + }, + }, +}; + +static struct clk_gfm lpass_gfm_tx_npl = { + .mux_reg = 0x20000, + .mux_mask = BIT(0), + .hw.init = &(struct clk_init_data) { + .name = "TX_NPL", + .ops = &clk_gfm_ops, + .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, + .parent_data = (const struct clk_parent_data[]){ + { + .index = 0, + .fw_name = "LPASS_CLK_ID_TX_CORE_NPL_MCLK", + }, { + .index = 1, + .fw_name = "LPASS_CLK_ID_VA_CORE_2X_MCLK", + }, + }, + .num_parents = 2, + }, +}; + static struct clk_gfm lpass_gfm_wsa_mclk = { .mux_reg = 0x220d8, .mux_mask = BIT(0), @@ -145,6 +186,19 @@ static struct clk_gfm lpass_gfm_rx_npl = { }, }; +static struct clk_gfm *aoncc_gfm_clks[] = { + [LPASS_CDC_VA_MCLK] = &lpass_gfm_va_mclk, + [LPASS_CDC_TX_NPL] = &lpass_gfm_tx_npl, +}; + +static struct clk_hw_onecell_data aoncc_hw_onecell_data = { + .hws = { + [LPASS_CDC_VA_MCLK] = &lpass_gfm_va_mclk.hw, + [LPASS_CDC_TX_NPL] = &lpass_gfm_tx_npl.hw, + }, + .num = ARRAY_SIZE(aoncc_gfm_clks), +}; + static struct clk_gfm *audiocc_gfm_clks[] = { [LPASS_CDC_WSA_NPL] = &lpass_gfm_wsa_npl, [LPASS_CDC_WSA_MCLK] = &lpass_gfm_wsa_mclk, @@ -172,6 +226,11 @@ static struct lpass_gfm_data audiocc_data = { .gfm_clks = audiocc_gfm_clks, }; +static struct lpass_gfm_data aoncc_data = { + .onecell_data = &aoncc_hw_onecell_data, + .gfm_clks = aoncc_gfm_clks, +}; + static int lpass_gfm_clk_driver_probe(struct platform_device *pdev) { const struct lpass_gfm_data *data; @@ -233,6 +292,10 @@ static int lpass_gfm_clk_driver_probe(struct platform_device *pdev) } static const struct of_device_id lpass_gfm_clk_match_table[] = { + { + .compatible = "qcom,sm8250-lpass-aoncc", + .data = &aoncc_data, + }, { .compatible = "qcom,sm8250-lpass-audiocc", .data = &audiocc_data,