From patchwork Sat Oct 10 09:57:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317594 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3108344ilm; Sat, 10 Oct 2020 05:18:07 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzvREiHa6vdPur3JsmlhLN+4IoTWD9HGTBYLD0gHEkPLeIxwoZWXnK970e8d0I4PAaVttGu X-Received: by 2002:a17:906:5e44:: with SMTP id b4mr19616449eju.211.1602332287084; Sat, 10 Oct 2020 05:18:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602332287; cv=none; d=google.com; s=arc-20160816; b=SYLVLtTTn73TRcH6en8pu23oIYRfUPNTULW8GFvzfgf2RNIfAUasOUmYXSS9uMVapK qilg+QtE1jEEef4QKjECpcrwPDcNcZnsI7f3F6mbvpmvTRkKZhuGUm5LdeVn3s/XW8sO j7CELXo2/bgVJaTssBdQXAD5DXHSSKuGv+Kfff0lX3wcl+2DhWw1abhn4WIlwhyB8Qcc PGOsEX+JeNLb5luMkFefqh5yYSOCM53rpQiW/BoxjfX0dy3lTCV3Z01UsxdD7gb5yiCe SsUZQXNxBR5v4g0mFJHx4RDzrWFHUuBRZ32oL0/bnXLnn8Wo4xR4cm/Ki31a0cg/28GB AYVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KfltWFsZyiOR4CIPq1y3GTcU4ICQrwfgoAhMQojqfcg=; b=BysKdmLzew10R1ZfUt5pL9uWnyCdXyGjVAuCxDNmSkMW5QmRQG4z+54xw8V8R6zpcq 2UURqlVxx2++VR4NCONHeGzFM8YBocuG812+SNF2oATB3MdMl/jvXK/YvX9eZf2N6YtE M8VtFBb5c1v5YsN74i6iBK2p0OUa2ONd/8i60VYv8QA9wOCAsATHQ/IoKTF50L5ok8Ki ij8Ega9oDkifAW9vglner/ns5b8uUhEsTXRir1xKYBHzHhhqXyy4E3DZDTqh5nJDDqQX +OwHzD4OL8zkkjfbIsVtjjRJj0iFbkC1T5O9B97KueyYP0y18Z2UoiTO+UD5RZ2yiTiU /NLg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c9si8375040edm.284.2020.10.10.05.18.06; Sat, 10 Oct 2020 05:18:07 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728618AbgJJMQL (ORCPT + 6 others); Sat, 10 Oct 2020 08:16:11 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15256 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726664AbgJJKQN (ORCPT ); Sat, 10 Oct 2020 06:16:13 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 8DB59F3B91C7CD585522; Sat, 10 Oct 2020 17:57:41 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:34 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 01/10] ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml Date: Sat, 10 Oct 2020 17:57:00 +0800 Message-ID: <20201010095709.1340-2-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change node name to match '^serial(@[0-9a-f,]+)*$' 2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hip01.dtsi | 24 ++++++++++++------------ arch/arm/boot/dts/hip04-d01.dts | 2 +- arch/arm/boot/dts/hip04.dtsi | 6 +++--- 3 files changed, 16 insertions(+), 16 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hip01.dtsi b/arch/arm/boot/dts/hip01.dtsi index 975d39828405f0b..fd09e6d9309c755 100644 --- a/arch/arm/boot/dts/hip01.dtsi +++ b/arch/arm/boot/dts/hip01.dtsi @@ -41,41 +41,41 @@ compatible = "simple-bus"; ranges; - uart0: uart@10001000 { + uart0: serial@10001000 { compatible = "snps,dw-apb-uart"; reg = <0x10001000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 32 4>; status = "disabled"; }; - uart1: uart@10002000 { + uart1: serial@10002000 { compatible = "snps,dw-apb-uart"; reg = <0x10002000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 33 4>; status = "disabled"; }; - uart2: uart@10003000 { + uart2: serial@10003000 { compatible = "snps,dw-apb-uart"; reg = <0x10003000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 34 4>; status = "disabled"; }; - uart3: uart@10006000 { + uart3: serial@10006000 { compatible = "snps,dw-apb-uart"; reg = <0x10006000 0x1000>; - clocks = <&hisi_refclk144mhz>; - clock-names = "apb_pclk"; + clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; interrupts = <0 4 4>; status = "disabled"; diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts index 9019e0d2ef60b67..f5691dbc26d2419 100644 --- a/arch/arm/boot/dts/hip04-d01.dts +++ b/arch/arm/boot/dts/hip04-d01.dts @@ -22,7 +22,7 @@ }; soc { - uart0: uart@4007000 { + uart0: serial@4007000 { status = "ok"; }; }; diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi index 555bc6b6720fc94..bccf5ba3d8553c2 100644 --- a/arch/arm/boot/dts/hip04.dtsi +++ b/arch/arm/boot/dts/hip04.dtsi @@ -250,12 +250,12 @@ <0 79 4>; }; - uart0: uart@4007000 { + uart0: serial@4007000 { compatible = "snps,dw-apb-uart"; reg = <0x4007000 0x1000>; interrupts = <0 381 4>; - clocks = <&clk_168m>; - clock-names = "uartclk"; + clocks = <&clk_168m>, <&clk_168m>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; status = "disabled"; }; From patchwork Sat Oct 10 09:57:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317589 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3038581ilm; Sat, 10 Oct 2020 03:22:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy8dQ7zb7RexY+nnHSVTqwovCO5EssNs9Bvho3liI9wxET10YRgApGgsQvS7rtIwm6rImdV X-Received: by 2002:a17:906:e0cb:: with SMTP id gl11mr18488311ejb.486.1602325334867; Sat, 10 Oct 2020 03:22:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602325334; cv=none; d=google.com; s=arc-20160816; b=wiKC5A1P55M5ITGwyV8TCMAGEPEHz1kZtUk8beti7H3AD5nHeQ1s1vZxo5v2aj/Tnl 9Qw+AW5TYnP7aI6rcy1eiltwex8pJbdfZ7pi/3L8DaFb/kZTtNu5oeHIbnGS3js7A8/B tlIRU5X1QvBpPiQAo9j9A6CisMceH9he1SXiVzlgZOkuw0wmVee+ASicJc1JY8SRl5Q4 HhnGXTQWAw0O9NaM6Y8PLerShDaXC/M37C6wg8kX7VvvtEcpus/EK3B6xnxHFvQjPzVG tXuduDh4A7WaxX0omnS9odQGCgWlFwvuPPKHvxNnZAp1KVHjjOpiiuGuY8SHncSTs3sA jzRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=FGANchPFiHpcR/swpl+FmObC+k8LHmYhk0FQT00Bm7E=; b=FZK3WK6Vxv1Rm+HbhGyFGAT2AXX16z9LUp8FSFVZ+6pfZrwFqGDMxhgQ81qNm/5L2q bB6KhWrrVi/rgqlBJaH2hMrXJiz8jAAOF6ijnJ+z8zbeQab08LdU0pvT6PRrdKe4KmTr G2ZHBZF/wjOEklldoWmaeEOZS2/Gjmir0Qwhj29iRHiAdv8wTurqKGdNh6QkPk/hfePm fH/dw6c0A2J6vKe1h/YR3AAlkb22bPGkfnnlW+qiQpS5IQrTFbgEAo6Sx0o0E5hcRm9/ pjK3smcjBC7ptz0fIHXfboxpSfZcyrIUi7obSokpOs12jA+9iXxeZhrRVZ0iBynn9GAQ H+8g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l23si8287015eja.289.2020.10.10.03.22.14; Sat, 10 Oct 2020 03:22:14 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729018AbgJJKTa (ORCPT + 6 others); Sat, 10 Oct 2020 06:19:30 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15260 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726461AbgJJKQN (ORCPT ); Sat, 10 Oct 2020 06:16:13 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id C4D6843111FE3D5C221D; Sat, 10 Oct 2020 17:57:41 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:35 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 02/10] ARM: dts: hisilicon: fix errors detected by pl011.yaml Date: Sat, 10 Oct 2020 17:57:01 +0800 Message-ID: <20201010095709.1340-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change node name to match '^serial(@[0-9a-f,]+)*$' 2. Change clock-names to "uartclk", "apb_pclk". Both of them use the same clock. 3. Change pinctrl-names to "default", "sleep". Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3519.dtsi | 20 ++++++++++---------- arch/arm/boot/dts/hi3620-hi4511.dts | 20 ++++++++++---------- arch/arm/boot/dts/hi3620.dtsi | 30 +++++++++++++++--------------- arch/arm/boot/dts/hisi-x5hd2.dtsi | 30 +++++++++++++++--------------- 4 files changed, 50 insertions(+), 50 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi index 410409a0ed66251..630753c0d704427 100644 --- a/arch/arm/boot/dts/hi3519.dtsi +++ b/arch/arm/boot/dts/hi3519.dtsi @@ -52,8 +52,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12100000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -61,8 +61,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12101000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART1_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -70,8 +70,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12102000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART2_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -79,8 +79,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12103000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART3_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; @@ -88,8 +88,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x12104000 0x1000>; interrupts = ; - clocks = <&crg HI3519_UART4_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>; + clock-names = "uartclk", "apb_pclk"; status = "disable"; }; diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts index 8c703c3f2fe09b7..1c62bdcca647a9a 100644 --- a/arch/arm/boot/dts/hi3620-hi4511.dts +++ b/arch/arm/boot/dts/hi3620-hi4511.dts @@ -27,36 +27,36 @@ status = "ok"; }; - uart0: uart@b00000 { /* console */ - pinctrl-names = "default", "idle"; + uart0: serial@b00000 { /* console */ + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>; pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>; status = "ok"; }; - uart1: uart@b01000 { /* modem */ - pinctrl-names = "default", "idle"; + uart1: serial@b01000 { /* modem */ + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>; pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>; status = "ok"; }; - uart2: uart@b02000 { /* audience */ - pinctrl-names = "default", "idle"; + uart2: serial@b02000 { /* audience */ + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>; pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>; status = "ok"; }; - uart3: uart@b03000 { - pinctrl-names = "default", "idle"; + uart3: serial@b03000 { + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>; pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>; status = "ok"; }; - uart4: uart@b04000 { - pinctrl-names = "default", "idle"; + uart4: serial@b04000 { + pinctrl-names = "default", "sleep"; pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>; pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>; status = "ok"; diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index f683440ee5694b4..d41378391e4cc36 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -172,48 +172,48 @@ interrupts = <1 13 0xf01>; }; - uart0: uart@b00000 { + uart0: serial@b00000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb00000 0x1000>; interrupts = <0 20 4>; - clocks = <&clock HI3620_UARTCLK0>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK0>, <&clock HI3620_UARTCLK0>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart1: uart@b01000 { + uart1: serial@b01000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb01000 0x1000>; interrupts = <0 21 4>; - clocks = <&clock HI3620_UARTCLK1>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK1>, <&clock HI3620_UARTCLK1>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart2: uart@b02000 { + uart2: serial@b02000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb02000 0x1000>; interrupts = <0 22 4>; - clocks = <&clock HI3620_UARTCLK2>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK2>, <&clock HI3620_UARTCLK2>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart3: uart@b03000 { + uart3: serial@b03000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb03000 0x1000>; interrupts = <0 23 4>; - clocks = <&clock HI3620_UARTCLK3>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK3>, <&clock HI3620_UARTCLK3>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart4: uart@b04000 { + uart4: serial@b04000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb04000 0x1000>; interrupts = <0 24 4>; - clocks = <&clock HI3620_UARTCLK4>; - clock-names = "apb_pclk"; + clocks = <&clock HI3620_UARTCLK4>, <&clock HI3620_UARTCLK4>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index e2dbf1d8a67bae2..f645487402f6e86 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -86,48 +86,48 @@ status = "disabled"; }; - uart0: uart@b00000 { + uart0: serial@b00000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b00000 0x1000>; interrupts = <0 49 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart1: uart@6000 { + uart1: serial@6000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00006000 0x1000>; interrupts = <0 50 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart2: uart@b02000 { + uart2: serial@b02000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b02000 0x1000>; interrupts = <0 51 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart3: uart@b03000 { + uart3: serial@b03000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b03000 0x1000>; interrupts = <0 52 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; - uart4: uart@b04000 { + uart4: serial@b04000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb04000 0x1000>; interrupts = <0 53 4>; - clocks = <&clock HIX5HD2_FIXED_83M>; - clock-names = "apb_pclk"; + clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; From patchwork Sat Oct 10 09:57:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317601 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3390088ilm; Sat, 10 Oct 2020 13:30:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwd/uUgVQcPkXh9PlUecBMqWc8+IIehIlHAd6VA3pvquz5vJ7WZ2PWaE0sKQscDOtQXLPG6 X-Received: by 2002:a17:906:1a4c:: with SMTP id j12mr20452723ejf.372.1602361839792; Sat, 10 Oct 2020 13:30:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602361839; cv=none; d=google.com; s=arc-20160816; b=Gvygx+jetLNqk9ulCXhQysQ0ZLnC09Ze/9BCiNElTfkfc3Ie8zu9z9NbyB8hzL4BNb 0F2axS/wTsTBYRlUUWaWhXiClGOSbbVKmuiOvVGztLHOzTAlRRct7eNXajkasp04Vnxl /DhYSGbPyzgQyMXUnl12ui1BzLLT2+WSMHq9c4PMUZnWqjXr8Qqj7ptP/RuDvbvFeLOE rzJQnux6A7jyOq8Gre0CXwqoxIuXQ0maMYRMHXjztNuQq54gFFwrz6mumft+FvNng0E0 49gQDMxul167tG0ZlJ0L+3OhlH00K9FgdubpdL6JrQV5ywuLQqSImfeTvfgEHc1UT1hZ bwBA== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id x11si8888896edr.288.2020.10.10.13.30.39; Sat, 10 Oct 2020 13:30:39 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730256AbgJJMxk (ORCPT + 6 others); Sat, 10 Oct 2020 08:53:40 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15257 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726503AbgJJKQM (ORCPT ); Sat, 10 Oct 2020 06:16:12 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 930ADBC087A0E2A1C59C; Sat, 10 Oct 2020 17:57:41 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:35 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 03/10] ARM: dts: hisilicon: fix errors detected by usb yaml Date: Sat, 10 Oct 2020 17:57:02 +0800 Message-ID: <20201010095709.1340-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change node name to match '^usb(@.*)?' These errrors are detected by generic-ehci.yaml and generic-ohci.yaml. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hisi-x5hd2.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index f645487402f6e86..0c1708945813346 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -453,14 +453,14 @@ status = "disabled"; }; - usb0: ehci@1890000 { + usb0: usb@1890000 { compatible = "generic-ehci"; reg = <0x1890000 0x1000>; interrupts = <0 66 4>; clocks = <&clock HIX5HD2_USB_CLK>; }; - usb1: ohci@1880000 { + usb1: usb@1880000 { compatible = "generic-ohci"; reg = <0x1880000 0x1000>; interrupts = <0 67 4>; From patchwork Sat Oct 10 09:57:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317592 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3090232ilm; Sat, 10 Oct 2020 05:02:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxNZGUk9uFpkhosxiSwUWbP+gp7uWIThPJWGmMX8bbXjOA1bMCqImTNLZv6fLXAP7vzwoh3 X-Received: by 2002:a05:6402:32f:: with SMTP id q15mr4174037edw.230.1602331365622; Sat, 10 Oct 2020 05:02:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602331365; cv=none; d=google.com; s=arc-20160816; b=OexhpD/XnjEyDy8gxJnTOaKIc2EGU/Fa1hEfjx+ewPqMm1uxnWSioMVv5DNUbzegvY Ueux3oHYi5WddDKamW/rOT5mk4JmX2NuIT7MOutwOrdzfQbK2jGbxF1qGEh1/mQxYn8p v2PrjBbyd6fMPwavkY8lYJelyK8EkuTTy41r+PCZkr5GJYg4eKaar0gRRY8eNk4gLq2X PjW+aLjXnJsIh5YYcv+jqTirtaL5ojLCX7zipTmvQqnQRFwD75RQC3cl5hgSH/b4U9c6 aIU/IVL6aM7tw+ZBgEtaFfiMxPOCIcY7Y9OM0JB2kBsy2J79txBmRMr668XSoj2IRwXr xX8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zqXuWNgQRi/FU1PUiuArd791UEsCUrP466r8pv8y85c=; b=evCsK2JwKcdxhbU58A2TD8o5xX8q7N/0G1jCCxJtM8NTIaaCIn+TluX6IPD5leVMsb Hg9OqMTIuWYmpVkwarmg2zj1pKoPOK8ogYoI1RJxYUchvSBDm9On/AHTHjAsq47Mx9LU GAbfS/TsRjYTeIMZDub3RB7WlS1Wu4XCc4G+wmGFr5k84i+4yQmFcZBSJxKj3eMYN/Py i+gtNpN8RaMxjkg8sQpFlT7VwdnhUntpzSw2JhjDYA9UnltEgGoJHId2XviwAfE3x5uL WZ7I4sAOl1lbMpxTpsElXhrTHzs9f62NUW7rP6SLZvMMQsscpy3Ud0cfvHuU8fa0F+hI z/dw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Sat, 10 Oct 2020 17:57:36 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 04/10] ARM: dts: hisilicon: fix errors detected by simple-bus.yaml Date: Sat, 10 Oct 2020 17:57:03 +0800 Message-ID: <20201010095709.1340-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Change bus node name from "amba" to "amba-bus" to match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3620-hi4511.dts | 2 +- arch/arm/boot/dts/hi3620.dtsi | 2 +- arch/arm/boot/dts/hip01.dtsi | 2 +- arch/arm/boot/dts/hisi-x5hd2.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts index 1c62bdcca647a9a..29eedc7fef9861e 100644 --- a/arch/arm/boot/dts/hi3620-hi4511.dts +++ b/arch/arm/boot/dts/hi3620-hi4511.dts @@ -22,7 +22,7 @@ reg = <0x40000000 0x20000000>; }; - amba { + amba-bus { dual_timer0: dual_timer@800000 { status = "ok"; }; diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index d41378391e4cc36..905900bf3e82040 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -63,7 +63,7 @@ }; }; - amba { + amba-bus { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/hip01.dtsi b/arch/arm/boot/dts/hip01.dtsi index fd09e6d9309c755..2a796360539002b 100644 --- a/arch/arm/boot/dts/hip01.dtsi +++ b/arch/arm/boot/dts/hip01.dtsi @@ -35,7 +35,7 @@ interrupt-parent = <&gic>; ranges = <0 0x10000000 0x20000000>; - amba { + amba-bus { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index 0c1708945813346..8fdfde492919407 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -30,7 +30,7 @@ interrupt-parent = <&gic>; ranges = <0 0xf8000000 0x8000000>; - amba { + amba-bus { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; From patchwork Sat Oct 10 09:57:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317600 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3371827ilm; Sat, 10 Oct 2020 12:51:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwUcu0yAuLz5EK05ezYW7s/uesRinvXNY9yw8CprTUDBTr26gaIv1S8UqfRlxlKKZQLZeUp X-Received: by 2002:a17:906:4c93:: with SMTP id q19mr19646460eju.198.1602359501914; Sat, 10 Oct 2020 12:51:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602359501; cv=none; d=google.com; s=arc-20160816; b=cL/4on2wTnNj9Rzjtl+U47wJtx3H/1BjPkuvjqUndGKejRMFwZsOCptvajf0OKvb14 Sd3RoXCGBURfgSpQKVLpHBE3PH3njocd+NZ4IiJ+9MTb1rAngu0AJ2qEaRYreHWLMKHw 63tsCjr7K+ZxyryuDOFv3mLFAOEaMDwhNkC6bLKML737iaAOBjLSh6Q043qhWbyV5cbt R0E+qRIFsUapDtLyxVHQRBLnPTuY1VtkKqPdj4H+I+aqLxd27WsDiJfJP843ADgOuMST Z7yuDywjp7qufmEp5PlSNBqhWiKvmBCRs/QrFZUulVHcqLF5pq2BRZjFKuOOdLkXOmWi +vtQ== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id x11si8888896edr.288.2020.10.10.12.51.41; Sat, 10 Oct 2020 12:51:41 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730553AbgJJM7x (ORCPT + 6 others); Sat, 10 Oct 2020 08:59:53 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:54216 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727035AbgJJKQM (ORCPT ); Sat, 10 Oct 2020 06:16:12 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id D3954681641ED91839EE; Sat, 10 Oct 2020 17:57:46 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:36 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 05/10] ARM: dts: hisilicon: fix errors detected by root-node.yaml Date: Sat, 10 Oct 2020 17:57:04 +0800 Message-ID: <20201010095709.1340-6-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Make the momory node name match the regex "^memory(@[0-9a-f]+)?$" which is described in memory.yaml. Otherwise, it will be treated as root node, and misreported by root-node.yaml. Errors misreported by root-node.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3519-demb.dts | 2 +- arch/arm/boot/dts/hi3620-hi4511.dts | 2 +- arch/arm/boot/dts/hip01-ca9x2.dts | 2 +- arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3519-demb.dts b/arch/arm/boot/dts/hi3519-demb.dts index 64f8ed126931099..f473fa22e9ce56a 100644 --- a/arch/arm/boot/dts/hi3519-demb.dts +++ b/arch/arm/boot/dts/hi3519-demb.dts @@ -14,7 +14,7 @@ serial0 = &uart0; }; - memory { + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts index 29eedc7fef9861e..ce356c469e1e13e 100644 --- a/arch/arm/boot/dts/hi3620-hi4511.dts +++ b/arch/arm/boot/dts/hi3620-hi4511.dts @@ -17,7 +17,7 @@ stdout-path = "serial0:115200n8"; }; - memory { + memory@40000000 { device_type = "memory"; reg = <0x40000000 0x20000000>; }; diff --git a/arch/arm/boot/dts/hip01-ca9x2.dts b/arch/arm/boot/dts/hip01-ca9x2.dts index f05e74eacfe0bf2..031476304d94614 100644 --- a/arch/arm/boot/dts/hip01-ca9x2.dts +++ b/arch/arm/boot/dts/hip01-ca9x2.dts @@ -37,7 +37,7 @@ }; }; - memory { + memory@80000000 { device_type = "memory"; reg = <0x80000000 0x80000000>; }; diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts index d55e9cd3b12b420..22b122d3f514e43 100644 --- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts +++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts @@ -35,7 +35,7 @@ }; }; - memory { + memory@0 { device_type = "memory"; reg = <0x00000000 0x80000000>; }; From patchwork Sat Oct 10 09:57:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317590 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3087101ilm; Sat, 10 Oct 2020 04:57:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz7rKB+M8NZPx2N8QhgUAZyGCK5O68MAkm3oBfGr17UbMUdzM8pzGhOwCl8IXl5hEbrZhR6 X-Received: by 2002:a17:906:4f8d:: with SMTP id o13mr18491118eju.20.1602331050526; Sat, 10 Oct 2020 04:57:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602331050; cv=none; d=google.com; s=arc-20160816; b=K+zjBeXTyOUcMCuCdheM7dhxpB/tS3bTWPfaLMb/aaWqvidGPrmsQn4O5gd3F6GNxE PpPicNfkgSbOKGitZruYxY1ot3wbMChrrepMxwvcl7D9k9nDGF00N6FBkX/JNhmGcOWU aLX+myD+HgWb3MFBZ5UbUKIe3hRapgXxAfUAGOYlwOmKVRW/xzagkyg9G43iu1bWjw77 BKAS9g5sR2j64gWTAVYmrO7Uh1UzJ0QB3zQ8da7IV37fiY9+SOYvR6EofDESvahlyEk2 jvt1Rm0KA3XM9ttRuxYWrLSuH9MhcyR2VYDRywxvQtbNOBVCiGmgpShO+/dyBzibm3cn nuNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=oTpkwLcvg2MslX3qIPvmxWLSSX3QL1BpCD70oo8wIJY=; b=FTciWSlG7TJQjArNK8Xi4pZ0U2YrwhoPqkEvU+GtiLLzk+KpAJRRk2oiLn/qfOhqr1 4x5fNNsiVPoQLRJ1qSfvaX+RRBn8Qi+DLAb0vhXMY1IRV81VtaFZfOPO2eZB+NPMFjS8 PW/WvWA/cjKFctLNSiBDyLc7f8+qFC6PjKgBlvDKwXwIsr1N60kNBSViMDc9hjglT0Pz BEnzVTm0WW7MQRYMF6yOXE0h4KVtY6UfyU0v268CuvtJ8GpfMqBV2zqc6gwPrjWQFeM1 EyKuYcZE64VdH0DZmdBCHL+0UInbQF5oaaErKgRaZ5NFJnoRx5xUi4khPtuT5DVAUl1S 0AdQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x9si7942448ejn.285.2020.10.10.04.57.30; Sat, 10 Oct 2020 04:57:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728802AbgJJKTQ (ORCPT + 6 others); Sat, 10 Oct 2020 06:19:16 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:54218 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727043AbgJJKQO (ORCPT ); Sat, 10 Oct 2020 06:16:14 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id DB3CA956F32200E28D24; Sat, 10 Oct 2020 17:57:46 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:37 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 06/10] ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml Date: Sat, 10 Oct 2020 17:57:05 +0800 Message-ID: <20201010095709.1340-7-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Look at the clock-names schema defined in synopsys-dw-mshc.yaml: clock-names: items: - const: biu - const: ciu The "biu" needs to be placed before the "ciu". Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hisi-x5hd2.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index 8fdfde492919407..9a513893758bf89 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -423,7 +423,7 @@ interrupts = <0 35 4>; clocks = <&clock HIX5HD2_MMC_CIU_RST>, <&clock HIX5HD2_MMC_BIU_CLK>; - clock-names = "ciu", "biu"; + clock-names = "biu", "ciu"; }; sd: mmc@1820000 { @@ -432,7 +432,7 @@ interrupts = <0 34 4>; clocks = <&clock HIX5HD2_SD_CIU_RST>, <&clock HIX5HD2_SD_BIU_CLK>; - clock-names = "ciu","biu"; + clock-names = "biu", "ciu"; }; gmac0: ethernet@1840000 { From patchwork Sat Oct 10 09:57:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317591 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3088872ilm; Sat, 10 Oct 2020 05:01:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyoq/MBk/fp5UIPo7A6SU2GAmH3v7mxjK4AMMR0JXBsLcpGwmoHFbktp/n93/mzKKRKHgIe X-Received: by 2002:a05:6402:3094:: with SMTP id de20mr4242476edb.350.1602331260372; Sat, 10 Oct 2020 05:01:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602331260; cv=none; d=google.com; s=arc-20160816; b=rhJ7O7mxmwjChAmmi1q22wZGAm/4aF9UatdQXKAd1tBz7IqrbhbcNRBeiu0Gkj31EE QKMV863gwB0RJqX1FHRGzjOs5zj6exDmQThkUikLS1QBmNMuKaxUpv/C/icWEeMJmzPn 8WjgkBVapFkD5PkPw/6ziB14vg6i7pb31wwnTjoRzwZWox6TrU3d+gCquVaoiWGVPZl8 zhZuMwLUODqJY0kOyRqEs8W0g8syD7ekKLArmYO4vAAFUbD/IR2TdVNjUSFWJgFaIPfN 8b/V4vR+x3INtw53D+O8MhgyVPC1IQFp9MFJo0UQLn2mIfXsStCiD8CtkVsfPKpm118z o7Jw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ptC1ntDbpeQBl4a1u0ddxBl/cS1YUfD8vz4A+pP8kOY=; b=BgMtzLYPNUWE2I+to42QavEuBRVTwKNwY/SfWQ8JO2HH4LBmDOcgcdaudVrdy4wUrO pw8KPfdzzq8MsyQrQ1axb9XyUMksIYJHY+T2pg5TgyDnygaufYVp85OCkcjVir1rGT9q 2rCNP6aSPXHZBzk1L2MKQxJuUEaFsJ2eaDXsr4PcZzCbe5DtU4wizpAtPw5sJH8jZsAY KChiAl5T56wVHmD3noqVvGRjDtLJOCoFxki5n4c74iTZ2nKiTNtVlY9Imu0uzjFdPyZ5 zMMHEY1cTkWHqqx867PdARU7ZxtfWiGIfolpWqu9SxisLxJqiaEOTX+9Dgb1m7oUZ4sR Mz8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x9si7942448ejn.285.2020.10.10.05.01.00; Sat, 10 Oct 2020 05:01:00 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727315AbgJJMAD (ORCPT + 6 others); Sat, 10 Oct 2020 08:00:03 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15263 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726384AbgJJKSO (ORCPT ); Sat, 10 Oct 2020 06:18:14 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id AE5AB38021F2D9FD9A61; Sat, 10 Oct 2020 17:57:46 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:37 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 07/10] ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml Date: Sat, 10 Oct 2020 17:57:06 +0800 Message-ID: <20201010095709.1340-8-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3519.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi index 630753c0d704427..c524c854d319243 100644 --- a/arch/arm/boot/dts/hi3519.dtsi +++ b/arch/arm/boot/dts/hi3519.dtsi @@ -127,8 +127,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12120000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -139,8 +139,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12121000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI1_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -151,8 +151,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12122000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI2_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; From patchwork Sat Oct 10 09:57:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317593 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3101028ilm; Sat, 10 Oct 2020 05:15:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzeHdmjoGCd8sy+WyjbWu6nD+1UEic8Ri+1dRgtxs6UMM/TWTPUbCf2rQ4zY6OEIOk0m/33 X-Received: by 2002:a05:6402:2207:: with SMTP id cq7mr4268474edb.359.1602332121221; Sat, 10 Oct 2020 05:15:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602332121; cv=none; d=google.com; s=arc-20160816; b=MXbeymzULgUnmAPzZ8T1Y7RPOKoW/PVGAYiiMUa9mZ/ECg623HzW4Ea9h+h6HJ6WXZ rrIIKvOwkOo/ml7/skKfXy0SWCOa2fECP2Sw8CQRF6SzYw5Rb7Pm3gVqgkruuCvCIOMV 5BgQjaBY0LqmiksQHICmLN+MnYaorsNByblFdja2dItv4GlP2V9FC1mxTgDJXaeIZDBU DYvl1dOOUcBIiege89KErQbWI/f3sAlGPurKsHKft3aaCjVs3zJoflAwSv8WMYiua3FX l+F35Qo17AjPynGlGheNdXh0Z83F9B6DwShOa1p3ns/G6onZAqcG4+4vSf8ji7Upfykm +yqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lqwLpvYlKVM/z7WFPK1JDQiV5MwiSJ8Idw2odqFHiys=; b=d0C2bmo/T1f6pKxXzVNQEIUHGU4ndRwMjPXYF4kFHDdwr/tH2meus4xHb65wZdKVf+ yDpHTzjvy84SuA8ti1Jvz+E726b/nT1QuHliCtGFIZbc2tNOn8kkVndW4jo0m36lAs8W ++RmZ84Al+OVX4SleEKaY3VtPnAyVbqLiqZcqgyAySihjMA+TxNlzsHQq/YDkLUsmvw5 Cg6RyCJE3CucnmKm9pXe+RIKbnZnlJa5L5m18RECmYn2A1SalOFPiD4eBPsRD4bgk4mt vUZkKQMa5BVfWergCZg4w+wGI7fpTif7Fd7e8D7dPT6NOP8OgQfGakiMfyZlmgZ5v3T5 iu+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c9si8375040edm.284.2020.10.10.05.15.20; Sat, 10 Oct 2020 05:15:21 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729613AbgJJL6x (ORCPT + 6 others); Sat, 10 Oct 2020 07:58:53 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15261 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725978AbgJJKSQ (ORCPT ); Sat, 10 Oct 2020 06:18:16 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id A52BF6AB31DADDDF63DE; Sat, 10 Oct 2020 17:57:46 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:38 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 08/10] ARM: dts: hisilicon: fix errors detected by syscon.yaml Date: Sat, 10 Oct 2020 17:57:07 +0800 Message-ID: <20201010095709.1340-9-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DT binding for system controller is not allowed to contain only the compatible string "syscon", the Hisilicon peripheral subsystem controller should add compatible string "hisilicon,peri-subctrl". Otherwise, the error "compatible: ['syscon'] is too short" will be reported. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hisi-x5hd2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index 9a513893758bf89..97211385dc89cbf 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -468,7 +468,7 @@ }; peripheral_ctrl: syscon@a20000 { - compatible = "syscon"; + compatible = "hisilicon,peri-subctrl", "syscon"; reg = <0xa20000 0x1000>; }; From patchwork Sat Oct 10 09:57:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317588 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3037299ilm; Sat, 10 Oct 2020 03:19:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyH8zWDb+tCyvmerNruWpYTarBslNvaJALisg7yUzucVeNBxWrWot6uatoTcs/esAYOFh72 X-Received: by 2002:a17:906:b1c9:: with SMTP id bv9mr2070007ejb.495.1602325189537; Sat, 10 Oct 2020 03:19:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602325189; cv=none; d=google.com; s=arc-20160816; b=lYJ10R8bgV3fu0cpULSNdrVS0BiCWaNQxEenDzY8+K7l6U+4b8xFwSp9QwCgys8jlH jDu6if/rh9wg6ZKeuysrPFyVNBCwvvzSwwPvoX68+axN1DRxOsibY9Pg63DeiDnLZH/A ltMOlf13URPf4ryBHJdftQve/1OJSktpYKVLHzwOaTxib3t+2P5uFNoYY3TSr/Z2layl 98m9ZMVf4KWXeyE7uv1dB25imUjcApWCuBmajYfsqxLNocSqhgQFzCuzT964x5hY0xPg sC7pKbHR/yuS0rwCppJ0KBJSZwnyixArj5jX+EObgl6DjPhan+uF8SoNxBGMvsR76Bck QYMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Blww+J29Qk2V7ZueCuhI+EFLfUpnK3EvCEQoTvW5hV4=; b=q9vYfHMmq5bW5DHFVwEf7Zlxqk/athF39YmSReu4XB/B9THgmYnKKg3I4p4s0xTYK5 gZ3viO5yxPiHIpeD1EUVcuRnTaubvfXrAkilC3k3Hclb1fTuklpyMePh7jh1PuNsowM3 k53tUZnNZEPL0Sc9wLnV8tlo1hJtbDKuFasQlBoM43oB1uFKlVpwRnqP79lea/lpzZMq 15NWbl6w/YB9OirNXq0JHr500wXdgE3K9OL0odGLCE+Ssx+ZvwiUIMUVP9kXB4wQs9lx HmDg3OnjUFKowQLMCpL19wLOU5KTIs/qtWsTrnE6wQVOxtWUQF0V7JLq/WkIheC1jYEF XlaQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a20si9408330edn.39.2020.10.10.03.19.48; Sat, 10 Oct 2020 03:19:49 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728466AbgJJKSw (ORCPT + 6 others); Sat, 10 Oct 2020 06:18:52 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:54206 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727172AbgJJKQa (ORCPT ); Sat, 10 Oct 2020 06:16:30 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id B6F2CEA0387CB9B93677; Sat, 10 Oct 2020 17:57:46 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:38 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 09/10] dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml Date: Sat, 10 Oct 2020 17:57:08 +0800 Message-ID: <20201010095709.1340-10-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add properties: #address-cells, #size-cells and ranges. Due to the Hisilicon system controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The examples have also been updated. Signed-off-by: Zhen Lei --- .../bindings/arm/hisilicon/controller/sysctrl.yaml | 25 +++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml index 449140f89ddbc3b..a27b79694e9883f 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml @@ -71,21 +71,40 @@ properties: '#clock-cells': const: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + required: - compatible - reg -additionalProperties: false +additionalProperties: + type: object examples: - | /* Hisilicon system controller */ - system-controller@fc802000 { + system-controller@802000 { compatible = "hisilicon,sysctrl", "syscon"; - reg = <0xfc802000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x802000 0x1000>; + reg = <0x802000 0x1000>; + smp-offset = <0x31c>; resume-offset = <0x308>; reboot-offset = <0x4>; + + clock: clock@0 { + compatible = "hisilicon,hi3620-clock"; + reg = <0 0x10000>; + #clock-cells = <1>; + }; }; /* HiP01 system controller */ From patchwork Sat Oct 10 09:57:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317596 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp3114702ilm; Sat, 10 Oct 2020 05:24:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzQvXvLLqC9VFkGbl95WtFbIPtWoguq0EE7R57qLEWBAHR7rZ41wwAHIBnbfe5i/Sv6njZM X-Received: by 2002:a05:6402:890:: with SMTP id e16mr4198344edy.272.1602332657885; Sat, 10 Oct 2020 05:24:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602332657; cv=none; d=google.com; s=arc-20160816; b=NAQ0L4FxSPNfkpDqPmpTAtVp6TgIwU1XN0/8B6l7hjzh8uvnYpIfhsKeyCIFdaEHtR cRnzHHdBumOaoO8om7TYY65D2aSQ2jdM00wW4v/ylYIuJlYXrNZOz74aaJ/BuRnbEdz/ 4nrd/fEu73PDXKa6gw+nPfJDVR4Y+mDO/2BybxCb7RDuX5JG9L7gCMixp+Co0UCuSt/3 g4us7SwZBqwjnZ/PYlVYCkCTX+DqU57aBMYkfDdwMLhTgpzJTY/7W4sdHspcbOFiMm99 ZwB/pV+aorX4ZoC+9VhwvL6xGMrwe2QrJCMqXz1pFuePUhmwZ7vfCC3n5VacatrQLenL RCLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=kL4onZ79jRTGY1zSp3AoIXTyK/wHoyJXcM88vYmzjTA=; b=LUdfWQwGjlUA+qh3uZXT8dX1HHz97YW4r3X7ZARWzebvZi775Ad/EERlcca+3tFZSZ wKdfar1nRquk3t+MIN0WX/QSW7lnmKaeoe4oHhxMJrD7moWgMVUPSgODUk+FLk1Mljt4 gNYQDnV+VCIOLFY6ek4fITpwfUvagJ5ogjY3OYSmcrTPptRAoTGTNsJbwoSV0Knz6UjY m7YqulslKTk+FF5Ar3YKvWgtey1TLYk5h9JIX1PJ6xEMPFmxukNwENnpgv+9DNx7dFEL 4gNXcW3eNYxRR90uTUWbhhHRkS5CwX5tg1+I92sxH3l6eHhHv3E1n4JzIAtFU9kdUBlg YzaQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e13si8434666edu.27.2020.10.10.05.24.17; Sat, 10 Oct 2020 05:24:17 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730074AbgJJMWo (ORCPT + 6 others); Sat, 10 Oct 2020 08:22:44 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:15258 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726923AbgJJKQM (ORCPT ); Sat, 10 Oct 2020 06:16:12 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id A0795FA2F258C4B7956E; Sat, 10 Oct 2020 17:57:46 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 10 Oct 2020 17:57:39 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 10/10] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml Date: Sat, 10 Oct 2020 17:57:09 +0800 Message-ID: <20201010095709.1340-11-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201010095709.1340-1-thunder.leizhen@huawei.com> References: <20201010095709.1340-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add properties: #address-cells, #size-cells and ranges. Due to the Hisilicon CPU controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The corresponding examples are also added. Signed-off-by: Zhen Lei --- .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 27 +++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml index f6a314db3a59416..528dad4cde3cd19 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml @@ -21,9 +21,34 @@ properties: reg: maxItems: 1 + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + required: - compatible - reg -additionalProperties: false +additionalProperties: + type: object + +examples: + - | + cpuctrl@a22000 { + compatible = "hisilicon,cpuctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00a22000 0x2000>; + ranges = <0 0x00a22000 0x2000>; + + clock: clock@0 { + compatible = "hisilicon,hix5hd2-clock"; + reg = <0 0x2000>; + #clock-cells = <1>; + }; + }; ...