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Fri, 30 Oct 2020 12:52:57 +0000 (GMT) X-AuditID: cbfec7f4-677ff7000000176d-ea-5f9c0ca965c4 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 4B.47.06017.9AC0C9F5; Fri, 30 Oct 2020 12:52:57 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201030125256eusmtip27b6e264b0d8ca5524ddd3eb520fb0916~CxjuRlRJZ1667716677eusmtip2G; Fri, 30 Oct 2020 12:52:56 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 1/6] dt-bindings: devfreq: Add documentation for the interconnect properties Date: Fri, 30 Oct 2020 13:51:44 +0100 Message-Id: <20201030125149.8227-2-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0iTYRTu3Xd1OPmcQidNpVVENy0VeskIK8FFFCZdqChb+qWSTtmcZWho XvLeULw0RU2CmRmaqYhZ1FyNsBxYmaU2UtOUIkrNS6I1v1X+e57zPs85zzm8LCHtpFzYSGUc r1IqomS0mGx5Nmveetu+PGTbwH0PbKlIR/heaT2F306OUrjS2EXh11PfaFzysJHGBRYtic3m Bga/aiun8USeEeFS8yMRvmscYHBfSg2N0x8aGdzx5RqFSwvHaH9O3libRcv7e9ppuSXHJJLn N9Ui+USjexB1UrwrjI+KjOdVXrvPiiNGFg1kbIHs0q2KaSYZ9bpmI5YFzhdGDFuzkZiVcjUI MhfyGIFMIpi5WoYEMoGgskhPZCO7JcfQVIVNpUdwM6WO/md539xHW1U0tx3ynuYjK3bmAiDj UwVpxQQ3KILUyqVOTpwCetI/UVZMcuuhTm9a8kq4nVA0+M42zQPuNDxewnacH2Rn9YoEjSM8 vzFs6+kBqc1lhDUEcGMMzPV/FgnmAPj4os3WyAnGTU2MgFdDZ2EuKRhSEeQ+6GMEokVgMVUh QeUH/V1ztPVMBLcR6tu8hPIe+DndzgjXc4Der45CCAcoaCkhhLIEMjOkgnod/KotscVxgZzh RVKQyOFed6AWrdEt20a3bBvd/7FViKhFK3mNOjqcV3sr+YueakW0WqMM9wyNiW5Ef75Y54Jp shW1zZ8zII5FMnuJv0dZiJRSxKsTog0IWELmLNn7svOMVBKmSLjMq2JCVJooXm1AriwpWynx qR47LeXCFXH8BZ6P5VV/X0WsnUsy4oYuTZgSVySJfI7oR9GPYK278btsH/Stnd9x0NkTH7Ls D7mg32vXcSBtxxU3J2pD60xHpHdo8eGomIvHG0SnkLsk9smT7tlB7y2rzO1zscP5gVPVpfGJ yrhpTY2v+Ktj8BtNd9XgseK0zdJWt8ij57t0SUHV11oKtSfOjJ9H1z/ISHWEYvsmQqVW/AaI e8CKXgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPIsWRmVeSWpSXmKPExsVy+t/xe7oreebEGzyYzW5xf14ro8XGGetZ La5/ec5qMf/IOVaLK1/fs1lM37uJzWLS/QksFufPb2C3uLxrDpvF594jjBYzzu9jslh75C67 xe3GFWwWrXuPsFscftPOajFj8ks2BwGPTas62TzuXNvD5nG/+ziTR9+WVYwenzfJBbBG6dkU 5ZeWpCpk5BeX2CpFG1oY6RlaWugZmVjqGRqbx1oZmSrp29mkpOZklqUW6dsl6GU8+3+IpWCS UsWSed/ZGxhvSHcxcnJICJhIPP46j72LkYtDSGApo0TjjaVADgdQQkpifosSRI2wxJ9rXWwQ NZ8YJQ5Ma2UHSbAJGEr0Hu1jBLFFBDwkTrWuZQUpYhb4wCSx9kEvWEJYIF5iwrN7YDaLgKrE muXH2UBsXgEriamPbjJDbJCXWL3hAJjNKWAt0dV5gwnkCCGgmrcHqiDKBSVOznzCAhJmFlCX WD9PCCTMDNTZvHU28wRGwVlIqmYhVM1CUrWAkXkVo0hqaXFuem6xkV5xYm5xaV66XnJ+7iZG YGRuO/Zzyw7GrnfBhxgFOBiVeHgd5GfHC7EmlhVX5h5ilOBgVhLhdTp7Ok6INyWxsiq1KD++ qDQntfgQoynQZxOZpUST84FJI68k3tDU0NzC0tDc2NzYzEJJnLdD4GCMkEB6YklqdmpqQWoR TB8TB6dUA6PKhWiX/e0m1ziTrKYXHL3RFnSy8NATrm3nV3uqCrOnPcne3vE+2cteoVCg3ELk Xl7wD+3vN4pmME/YY9nSMuHX2UbT/isb43P/it14ruPuOnnrmxNMahemzak9fOrhXWk7g9cH mllkri/1bApgKGHpX/5wR/rvoNNvfbes3/OuaW1Qr3Rl2jUlluKMREMt5qLiRADQU3/74gIA AA== X-CMS-MailID: 20201030125257eucas1p29c6b018cfcdda337b2b3d2a496f0c830 X-Msg-Generator: CA X-RootMTR: 20201030125257eucas1p29c6b018cfcdda337b2b3d2a496f0c830 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125257eucas1p29c6b018cfcdda337b2b3d2a496f0c830 References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for new optional properties in the exynos bus nodes: interconnects, #interconnect-cells, samsung,data-clock-ratio. These properties allow to specify the SoC interconnect structure which then allows the interconnect consumer devices to request specific bandwidth requirements. Signed-off-by: Artur Świgoń Signed-off-by: Sylwester Nawrocki --- Changes for v7: - bus-width property replaced with samsung,data-clock-ratio, - the interconnect consumer bindings used instead of vendor specific properties Changes for v6: - added dts example of bus hierarchy definition and the interconnect consumer, - added new bus-width property. Changes for v5: - exynos,interconnect-parent-node renamed to samsung,interconnect-parent --- .../devicetree/bindings/devfreq/exynos-bus.txt | 68 +++++++++++++++++++++- 1 file changed, 66 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt index e71f752..e34175c 100644 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -51,6 +51,16 @@ Optional properties only for parent bus device: - exynos,saturation-ratio: the percentage value which is used to calibrate the performance count against total cycle count. +Optional properties for interconnect functionality (QoS frequency constraints): +- #interconnect-cells: should be 0. +- interconnects: as documented in ../interconnect.txt, describes a path + at the higher level interconnects used by this interconnect provider. + If this interconnect provider is a parent of a top level interconnect + provider the property contains only one phandle. + +- samsung,data-clock-ratio: ratio of the data troughput in B/s to minimum data + clock frequency in Hz, default value is 8 when this property is missing. + Detailed correlation between sub-blocks and power line according to Exynos SoC: - In case of Exynos3250, there are two power line as following: VDD_MIF |--- DMC @@ -135,7 +145,7 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC: |--- PERIC (Fixed clock rate) |--- FSYS (Fixed clock rate) -Example1: +Example 1: Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to power line (regulator). The MIF (Memory Interface) AXI bus is used to transfer data between DRAM and CPU and uses the VDD_MIF regulator. @@ -184,7 +194,7 @@ Example1: |L5 |200000 |200000 |400000 |300000 | ||1000000 | ---------------------------------------------------------- -Example2 : +Example 2: The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is listed below: @@ -419,3 +429,57 @@ Example2 : devfreq = <&bus_leftbus>; status = "okay"; }; + +Example 3: + An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on + Exynos4412 SoC with video mixer as an interconnect consumer device. + + soc { + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + samsung,data-clock-ratio = <4>; + #interconnect-cells = <0>; + }; + + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_dmc>; + }; + + bus_display: bus_display { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_ACLK160>; + clock-names = "bus"; + operating-points-v2 = <&bus_display_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_leftbus &bus_dmc>; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + /* ... */ + } + + bus_leftbus_opp_table: opp_table3 { + compatible = "operating-points-v2"; + /* ... */ + }; + + bus_display_opp_table: opp_table4 { + compatible = "operating-points-v2"; + /* .. */ + }; + + &mixer { + compatible = "samsung,exynos4212-mixer"; + interconnects = <&bus_display &bus_dmc>; + /* ... */ + }; + }; From patchwork Fri Oct 30 12:51:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\\(PLT\\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 314712 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 998DFC388F9 for ; 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Fri, 30 Oct 2020 12:53:03 +0000 (GMT) X-AuditID: cbfec7f2-7efff70000001938-e0-5f9c0caf7c1d Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 20.57.06017.FAC0C9F5; Fri, 30 Oct 2020 12:53:03 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201030125302eusmtip293f7bc05eee5aec888e610e430a328c7~Cxj0KYcpI1667716677eusmtip2J; Fri, 30 Oct 2020 12:53:02 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 3/6] PM / devfreq: exynos-bus: Add registration of interconnect child device Date: Fri, 30 Oct 2020 13:51:46 +0100 Message-Id: <20201030125149.8227-4-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRjm2zk7OxMnxyn5YpfpyMhIzezHYUqoKCwsuvwoCHTNPLnKTdmc VkQaeal5wZSaWuk0UluocyyL0iidSc5caaahsZIiNM28LCm7Oc+if8/7XL734eUjMWED1588 rspk1Cp5mpjwwNuffh8IafW8LtuWNxhBO2ryEd1W2cqlRxY/cela6wCXfuWcJWh9p5mgyx1l OG23m3j00IPrBL1QYkV0pf0Rh262vuXRY+ebCDq/08qju6cLuXRlxSQRTUnNxkuEdPx1ByF1 FPVypKUWI5IumDfs4x72iEph0o5nMeqwnUc8FK3TdixjmDrVM3swF/UJdIhPArUDbtlzkQ55 kEKqCcH4vZc4OywisL7/6VYWEDS+MHL+RZZGqnms0Ijgbv/S/0jLExvuchFUOJT0lCIX9qXi oOBjzSqPURMcuFCLubAPJYeZtjcrr5IkTgVBz+cEFy2gJKDTN+PsMhHcMT1etfOpSNBdGnWX MPOgYs6XxXEw9PSL2+8DU70WHovXga2ieLUbUBcQFD8c47FDGQJHrwGxrkgYH/hBuEpgVDC0 Pghj6RjoHnWVIFewF4zOeLP1vaC8XY+xtAAuFghZ90ZYNurd1fyh6MMfd1IK9VUYe51SBB2X G/AyJKr+v8uAkBH5MVqNMpXRhKuY7FCNXKnRqlJDj6YrzWjl99h+987fR87B5C5EkUjsKYgW XZMJufIszWllFwISE/sKYp/bkoSCFPnpM4w6XabWpjGaLrSWxMV+goj6yUQhlSrPZE4yTAaj /qdySL5/LqqLmtkvCT0hQnO6X/vrEhSbtTemLB0bCRlRsz4InJZl3yv920PecRUTOQnpDe3P RjclfeGJdAH48K7G7G+SrfpzwVU5dkmexRRrcIo6Cw95H5v/6r1779U9tthjewPPJvfdPAD6 +NQ1iocxJjywqYW4vSMgPlHCVwkNJSrtRzGuUcjDt2Bqjfwvad9oZjkDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpnkeLIzCtJLcpLzFFi42I5/e/4Pd31PHPiDfZsk7K4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbXN41h83ic+8RRosZ5/cxWaw9cpfd 4nbjCjaL1r1H2C0Ov2lntZgx+SWbg4DHplWdbB53ru1h87jffZzJo2/LKkaPz5vkAlij9GyK 8ktLUhUy8otLbJWiDS2M9AwtLfSMTCz1DI3NY62MTJX07WxSUnMyy1KL9O0S9DLWvznPXHBV oOLo+7AGxlO8XYycHBICJhLfr89i72Lk4hASWMoosfjAAcYuRg6ghJTE/BYliBphiT/Xutgg aj4xSnza3ckIkmATMJToPdoHZosIeEical3LClLELPCBSWLtg16whLBAvET/o20sIENZBFQl jr72BgnzClhJdE1fywKxQF5i9YYDzCA2p4C1RFfnDSaQciGgmrcHqiYw8i1gZFjFKJJaWpyb nltspFecmFtcmpeul5yfu4kRGAnbjv3csoOx613wIUYBDkYlHl4H+dnxQqyJZcWVuYcYJTiY lUR4nc6ejhPiTUmsrEotyo8vKs1JLT7EaAp00kRmKdHkfGCU5pXEG5oamltYGpobmxubWSiJ 83YIHIwREkhPLEnNTk0tSC2C6WPi4JRqYAz+GFvp9Fz3Y/uCLHlJ+aDbKhKpXC7Hvb9yi0qF 6/0VNz+5cnpGQoqLXsbuE4/uu534xb9G8py0b6LnnJTM/MK0NL03T1Pm7/HZ7xdT5Piv7arK x/93bDfIfzqyq/LVg7ppaus23WqJnifFz3Q8ysVdvaSgs0olvV2myubpAsPNDG2TjzsyKbEU ZyQaajEXFScCAI8vPs+aAgAA X-CMS-MailID: 20201030125303eucas1p14a9de4111ffafc1870527abdea0994c9 X-Msg-Generator: CA X-RootMTR: 20201030125303eucas1p14a9de4111ffafc1870527abdea0994c9 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125303eucas1p14a9de4111ffafc1870527abdea0994c9 References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds registration of a child platform device for the exynos interconnect driver. It is assumed that the interconnect provider will only be needed when #interconnect-cells property is present in the bus DT node, hence the child device will be created only when such a property is present. Signed-off-by: Sylwester Nawrocki --- Changes for v7, v6: - none. Changes for v5: - new patch. --- drivers/devfreq/exynos-bus.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c index 1e684a4..ee300ee 100644 --- a/drivers/devfreq/exynos-bus.c +++ b/drivers/devfreq/exynos-bus.c @@ -24,6 +24,7 @@ struct exynos_bus { struct device *dev; + struct platform_device *icc_pdev; struct devfreq *devfreq; struct devfreq_event_dev **edev; @@ -156,6 +157,8 @@ static void exynos_bus_exit(struct device *dev) if (ret < 0) dev_warn(dev, "failed to disable the devfreq-event devices\n"); + platform_device_unregister(bus->icc_pdev); + dev_pm_opp_of_remove_table(dev); clk_disable_unprepare(bus->clk); if (bus->opp_table) { @@ -168,6 +171,8 @@ static void exynos_bus_passive_exit(struct device *dev) { struct exynos_bus *bus = dev_get_drvdata(dev); + platform_device_unregister(bus->icc_pdev); + dev_pm_opp_of_remove_table(dev); clk_disable_unprepare(bus->clk); } @@ -432,6 +437,18 @@ static int exynos_bus_probe(struct platform_device *pdev) if (ret < 0) goto err; + /* Create child platform device for the interconnect provider */ + if (of_get_property(dev->of_node, "#interconnect-cells", NULL)) { + bus->icc_pdev = platform_device_register_data( + dev, "exynos-generic-icc", + PLATFORM_DEVID_AUTO, NULL, 0); + + if (IS_ERR(bus->icc_pdev)) { + ret = PTR_ERR(bus->icc_pdev); + goto err; + } + } + max_state = bus->devfreq->profile->max_state; min_freq = (bus->devfreq->profile->freq_table[0] / 1000); max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000); From patchwork Fri Oct 30 12:51:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\\(PLT\\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 314711 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6028C55178 for ; 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Fri, 30 Oct 2020 12:53:08 +0000 (GMT) X-AuditID: cbfec7f5-371ff700000018ae-ea-5f9c0cb587b6 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 87.57.06017.4BC0C9F5; Fri, 30 Oct 2020 12:53:08 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201030125307eusmtip2765b832a309bff135edf3b1d0790c9c2~Cxj49WQwv1609116091eusmtip2K; Fri, 30 Oct 2020 12:53:07 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 6/6] drm: exynos: mixer: Add interconnect support Date: Fri, 30 Oct 2020 13:51:49 +0100 Message-Id: <20201030125149.8227-7-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa2yLYRT2fvfOKt+q4qhFaeYHwchE3rgsyEgT4hYRJLSlX2ax1tJuZiIy qdnWbVL8aM0ylxnTkl3iMqMzU+sobcRdRwWLzCUubYVhtPu2bP+e85zneZ9zTl6OlN2jFVyW MVcwGXXZKiaButzxKzD9UmKVZuarqxIcqi5CuNFRT+Onkfc0Pu7x0/hR9AuD7e4mBh8O2Sgc CDSw+GFLFYPDFR6EHYFWAl/wvGRxcF8dg4vcHhbf+lRMY8eRHmYhr25yljLqrifXGXWozEuo D150InW4acIqemPCfL2QnbVTMKWmaxO2HfrkQjkfl+wKntQUolvYiiQc8LOhufMcY0UJnIyv Q+BptdNiEUEQDv4gxCKM4E3kOzVoORl4jsTGWQSFJR1Dlsf1ESKuYvhZUHH7IIpjOZ8BB7qr +90k/4YAy3EyjkfH+EflNf08xU+GM7anbBxL+bnQ57mHxDQluBra+vUSfh5YS58RoiYJ7hx9 N/CmEiyXjpHxIYDvYeGPs4UWzRnQ/dDCiHg0fPBeZEWcDL4j5ZRosCAovxZkxcKGIOQ9MRA9 D7r8vTE3F4uYAvUtqSK9CG6cbmPjNPCj4NnnJHGIUXD4sp0UaSmUHJCJ6hT47bQTIlZA2bt/ A1dUw+3Gn7QNTaoctk7lsHUqh3JPINKJxgp5ZkOmYE4zCvkzzDqDOc+YOWPrDkMTiv0xX583 2oxa/2xpRzyHVInShcpjGhmt22kuMLQj4EiVXLr4vm+zTKrXFewWTDs0prxswdyOxnOUaqw0 7VTPJhmfqcsVtgtCjmAa7BKcRFGINrjXZ+kdrqMbVioejEi5k5vvvvn16+rUtSO1HmvxnFfL a2pfT6XWvF+W8mLdsimJts2OJ30VH3u1Yb9iTO9+/tyD133RBfmBHNfzKr9SXjTxSvOvC9/4 2nEd6zvr9rZJ2go6Ofn5v8kr7nbO7zrT8NYdSf8+bbrfp0/rXqrFe7ZH01WUeZtu1lTSZNb9 B8YNN9ZfAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsVy+t/xe7pbeObEG5xuUbG4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbXN41h83ic+8RRosZ5/cxWaw9cpfd 4nbjCjaL1r1H2C0Ov2lntZgx+SWbg4DHplWdbB53ru1h87jffZzJo2/LKkaPz5vkAlij9GyK 8ktLUhUy8otLbJWiDS2M9AwtLfSMTCz1DI3NY62MTJX07WxSUnMyy1KL9O0S9DImvlnNWPDa teL2wvgGxsMWXYycHBICJhILz99k7GLk4hASWMoo8e/2bZYuRg6ghJTE/BYliBphiT/XuthA bCGBT4wS09emg9hsAoYSvUf7GEFsEQEPiVOta1lB5jALfGCSWPugFywhLOAicaVnMQuIzSKg KrFswnV2EJtXwEri35EzjBAL5CVWbzjADGJzClhLdHXeYAK5QQio5u2BKohyQYmTM5+AncYs oC6xfp4QSJgZqLN562zmCYyCs5BUzUKomoWkagEj8ypGkdTS4tz03GIjveLE3OLSvHS95Pzc TYzAqNx27OeWHYxd74IPMQpwMCrx8DrIz44XYk0sK67MPcQowcGsJMLrdPZ0nBBvSmJlVWpR fnxRaU5q8SFGU6DPJjJLiSbnAxNGXkm8oamhuYWlobmxubGZhZI4b4fAwRghgfTEktTs1NSC 1CKYPiYOTqkGRofJ2uuOlyq/9s3e6BtQ6V3cYRL0Y3V8nQhzqM6bJS+KasqulIZvO16gYcLd 0hFmuDZ3Sor+8YjwFRbrfTK7mDL1v/8Wmbplvel0e8aTvPMNHjFw7t5d1t3TYmgcra1w5NZn ngi7T0aqFyZWlcrPTxPaXvVqsdycD4s2r4mb+i+OUfz2e6b7SizFGYmGWsxFxYkA6kFqOOAC AAA= X-CMS-MailID: 20201030125308eucas1p14ae969ae1d5549d422c478aa54d3311e X-Msg-Generator: CA X-RootMTR: 20201030125308eucas1p14ae969ae1d5549d422c478aa54d3311e X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125308eucas1p14ae969ae1d5549d422c478aa54d3311e References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds interconnect support to exynos-mixer. The mixer works the same as before when CONFIG_INTERCONNECT is 'n'. For proper operation of the video mixer block we need to ensure the interconnect busses like DMC or LEFTBUS provide enough bandwidth so as to avoid DMA buffer underruns in the mixer block. I.e we need to prevent those busses from operating in low perfomance OPPs when the mixer is running. In this patch the bus bandwidth request is done through the interconnect API, the bandwidth value is calculated from selected DRM mode, i.e. video plane width, height, refresh rate and pixel format. The bandwidth setting is synchronized with VSYNC when we are switching to lower bandwidth. This is required to ensure enough bandwidth for the device since new settings are normally being applied in the hardware synchronously with VSYNC. Co-developed-by: Artur Świgoń Signed-off-by: Marek Szyprowski Signed-off-by: Sylwester Nawrocki --- Changes for v7: - fixed incorrect setting of the ICC bandwidth when the mixer is disabled, now the bandwidth is set explicitly to 0 in such case. Changes for v6: - the icc_set_bw() call is now only done when calculated value for a crtc changes, this avoids unnecessary calls per each video frame - added synchronization of the interconnect bandwidth setting with the mixer VSYNC in order to avoid buffer underflow when we lower the interconnect bandwidth when the hardware still operates with previous mode settings that require higher bandwidth. This fixed IOMMU faults observed e.g. during switching from two planes to a single plane operation. Changes for v5: - renamed soc_path variable to icc_path --- drivers/gpu/drm/exynos/exynos_mixer.c | 146 ++++++++++++++++++++++++++++++++-- 1 file changed, 138 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index af192e5..61182cf 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -73,6 +74,7 @@ enum mixer_flag_bits { MXR_BIT_INTERLACE, MXR_BIT_VP_ENABLED, MXR_BIT_HAS_SCLK, + MXR_BIT_REQUEST_BW, }; static const uint32_t mixer_formats[] = { @@ -99,6 +101,13 @@ struct mixer_context { struct exynos_drm_plane planes[MIXER_WIN_NR]; unsigned long flags; + struct icc_path *icc_path; + /* memory bandwidth on the interconnect bus in B/s */ + unsigned long icc_bandwidth; + /* mutex protecting @icc_bandwidth */ + struct mutex icc_lock; + struct work_struct work; + int irq; void __iomem *mixer_regs; void __iomem *vp_regs; @@ -754,6 +763,9 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) val |= MXR_INT_CLEAR_VSYNC; val &= ~MXR_INT_STATUS_VSYNC; + if (test_and_clear_bit(MXR_BIT_REQUEST_BW, &ctx->flags)) + schedule_work(&ctx->work); + /* interlace scan need to check shadow register */ if (test_bit(MXR_BIT_INTERLACE, &ctx->flags) && !mixer_is_synced(ctx)) @@ -934,6 +946,76 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc) mixer_reg_writemask(mixer_ctx, MXR_INT_EN, 0, MXR_INT_EN_VSYNC); } +/** + * mixer_get_memory_bandwidth - calculate memory bandwidth for current crtc mode + * @crtc: a crtc with DRM mode to calculate the bandwidth for + * + * Return: memory bandwidth in B/s + * + * This function returns memory bandwidth calculated as a sum of amount of data + * per second for each plane. The calculation is based on maximum possible pixel + * resolution for a plane so as to avoid different bandwidth request per each + * video frame. The formula used for calculation for each plane is: + * + * bw = width * height * frame_rate / interlace / (hor_subs * vert_subs) + * + * where: + * - width, height - (DRM mode) video frame width and height in pixels, + * - frame_rate - DRM mode frame refresh rate, + * - interlace: 1 - in case of progressive and 2 in case of interlaced video, + * - hor_subs, vert_subs - accordingly horizontal and vertical pixel + * subsampling for a plane. + */ +static unsigned int mixer_get_memory_bandwidth(struct exynos_drm_crtc *crtc) +{ + struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; + struct mixer_context *ctx = crtc->ctx; + unsigned long bw, bandwidth = 0; + int i, j, sub; + + for (i = 0; i < MIXER_WIN_NR; i++) { + struct drm_plane *plane = &ctx->planes[i].base; + const struct drm_format_info *format; + + if (plane->state && plane->state->crtc && plane->state->fb) { + format = plane->state->fb->format; + bw = mode->hdisplay * mode->vdisplay * + drm_mode_vrefresh(mode); + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + bw /= 2; + for (j = 0; j < format->num_planes; j++) { + sub = j ? (format->vsub * format->hsub) : 1; + bandwidth += format->cpp[j] * bw / sub; + } + } + } + + return bandwidth; +} + +static void mixer_set_icc_bandwidth(struct mixer_context *ctx, + unsigned long bandwidth) +{ + u32 avg_bw, peak_bw; + + /* add 20% safety margin */ + bandwidth = bandwidth / 4 * 5; + + avg_bw = peak_bw = Bps_to_icc(bandwidth); + icc_set_bw(ctx->icc_path, avg_bw, peak_bw); + + dev_dbg(ctx->dev, "safe bandwidth %lu Bps\n", bandwidth); +} + +static void mixer_icc_request_fn(struct work_struct *work) +{ + struct mixer_context *ctx = container_of(work, struct mixer_context, + work); + mutex_lock(&ctx->icc_lock); + mixer_set_icc_bandwidth(ctx, ctx->icc_bandwidth); + mutex_unlock(&ctx->icc_lock); +} + static void mixer_atomic_begin(struct exynos_drm_crtc *crtc) { struct mixer_context *ctx = crtc->ctx; @@ -980,12 +1062,35 @@ static void mixer_disable_plane(struct exynos_drm_crtc *crtc, static void mixer_atomic_flush(struct exynos_drm_crtc *crtc) { - struct mixer_context *mixer_ctx = crtc->ctx; + struct mixer_context *ctx = crtc->ctx; + int bw, prev_bw; - if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) + if (!test_bit(MXR_BIT_POWERED, &ctx->flags)) return; - mixer_enable_sync(mixer_ctx); + /* + * Request necessary bandwidth on the interconnects. If new + * bandwidth is greater than current value set the new value + * immediately. Otherwise request lower bandwidth only after + * VSYNC, after the HW has actually switched to new video + * frame settings. + */ + if (ctx->icc_path) { + bw = mixer_get_memory_bandwidth(crtc); + + mutex_lock(&ctx->icc_lock); + prev_bw = ctx->icc_bandwidth; + ctx->icc_bandwidth = bw; + + if (bw > prev_bw) + mixer_set_icc_bandwidth(ctx, bw); + else if (bw < prev_bw) + set_bit(MXR_BIT_REQUEST_BW, &ctx->flags); + + mutex_unlock(&ctx->icc_lock); + } + + mixer_enable_sync(ctx); exynos_crtc_handle_event(crtc); } @@ -1036,6 +1141,8 @@ static void mixer_atomic_disable(struct exynos_drm_crtc *crtc) pm_runtime_put(ctx->dev); + mixer_set_icc_bandwidth(ctx, 0); + clear_bit(MXR_BIT_POWERED, &ctx->flags); } @@ -1223,19 +1330,33 @@ static int mixer_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; const struct mixer_drv_data *drv; struct mixer_context *ctx; + struct icc_path *path; int ret; + /* + * Returns NULL if CONFIG_INTERCONNECT is disabled. + * May return ERR_PTR(-EPROBE_DEFER). + */ + path = of_icc_get(dev, NULL); + if (IS_ERR(path)) + return PTR_ERR(path); + ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); if (!ctx) { DRM_DEV_ERROR(dev, "failed to alloc mixer context.\n"); - return -ENOMEM; + ret = -ENOMEM; + goto err; } drv = of_device_get_match_data(dev); + INIT_WORK(&ctx->work, mixer_icc_request_fn); + mutex_init(&ctx->icc_lock); + ctx->pdev = pdev; ctx->dev = dev; ctx->mxr_ver = drv->version; + ctx->icc_path = path; if (drv->is_vp_enabled) __set_bit(MXR_BIT_VP_ENABLED, &ctx->flags); @@ -1247,17 +1368,26 @@ static int mixer_probe(struct platform_device *pdev) pm_runtime_enable(dev); ret = component_add(&pdev->dev, &mixer_component_ops); - if (ret) + if (ret) { pm_runtime_disable(dev); - + goto err; + } + return 0; +err: + icc_put(path); return ret; } static int mixer_remove(struct platform_device *pdev) { - pm_runtime_disable(&pdev->dev); + struct device *dev = &pdev->dev; + struct mixer_context *ctx = dev_get_drvdata(dev); + + pm_runtime_disable(dev); + + component_del(dev, &mixer_component_ops); - component_del(&pdev->dev, &mixer_component_ops); + icc_put(ctx->icc_path); return 0; }