From patchwork Tue Nov 3 11:18:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 314503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UPPERCASE_50_75,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F028C2D0A3 for ; Tue, 3 Nov 2020 11:20:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1860E22403 for ; Tue, 3 Nov 2020 11:20:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728427AbgKCLTS (ORCPT ); Tue, 3 Nov 2020 06:19:18 -0500 Received: from inva021.nxp.com ([92.121.34.21]:41012 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728249AbgKCLTO (ORCPT ); Tue, 3 Nov 2020 06:19:14 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B2A6C200342; Tue, 3 Nov 2020 12:19:11 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A559D2002EB; Tue, 3 Nov 2020 12:19:11 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id EBA352033F; Tue, 3 Nov 2020 12:19:10 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v5 01/14] dt-bindings: clocks: imx8mp: Rename audiomix ids clocks to audio_blk_ctl Date: Tue, 3 Nov 2020 13:18:13 +0200 Message-Id: <1604402306-5348-2-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> References: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In the reference manual the actual name is Audio BLK_CTL. Lets make it more obvious here by renaming from audiomix to audio_blk_ctl. Signed-off-by: Abel Vesa Acked-by: Rob Herring Reviewed-by: Dong Aisheng Acked-by: Stephen Boyd --- include/dt-bindings/clock/imx8mp-clock.h | 120 +++++++++++++++---------------- 1 file changed, 60 insertions(+), 60 deletions(-) diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index e8d68fb..89c67b7 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -324,66 +324,66 @@ #define IMX8MP_CLK_END 313 -#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 -#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 -#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2 2 -#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3 3 -#define IMX8MP_CLK_AUDIOMIX_SAI2_IPG 4 -#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1 5 -#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2 6 -#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3 7 -#define IMX8MP_CLK_AUDIOMIX_SAI3_IPG 8 -#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1 9 -#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2 10 -#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3 11 -#define IMX8MP_CLK_AUDIOMIX_SAI5_IPG 12 -#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1 13 -#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2 14 -#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3 15 -#define IMX8MP_CLK_AUDIOMIX_SAI6_IPG 16 -#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1 17 -#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2 18 -#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3 19 -#define IMX8MP_CLK_AUDIOMIX_SAI7_IPG 20 -#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1 21 -#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2 22 -#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3 23 -#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG 24 -#define IMX8MP_CLK_AUDIOMIX_PDM_IPG 25 -#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT 26 -#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT 27 -#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT 28 -#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT 29 -#define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT 30 -#define IMX8MP_CLK_AUDIOMIX_EARC_IPG 31 -#define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG 32 -#define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG 33 -#define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT 34 -#define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT 35 -#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT 36 -#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT 37 -#define IMX8MP_CLK_AUDIOMIX_EARC_PHY 38 -#define IMX8MP_CLK_AUDIOMIX_PDM_ROOT 39 -#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL 40 -#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL 41 -#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL 42 -#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL 43 -#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL 44 -#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL 45 -#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL 46 -#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL 47 -#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL 48 -#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL 49 -#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL 50 -#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL 51 -#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL 52 -#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL 53 -#define IMX8MP_CLK_AUDIOMIX_PDM_SEL 54 -#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL 55 -#define IMX8MP_CLK_AUDIOMIX_SAI_PLL 56 -#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS 57 -#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT 58 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_IPG 0 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK1 1 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK2 2 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK3 3 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI2_IPG 4 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI2_MCLK1 5 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI2_MCLK2 6 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI2_MCLK3 7 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI3_IPG 8 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI3_MCLK1 9 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI3_MCLK2 10 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI3_MCLK3 11 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI5_IPG 12 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI5_MCLK1 13 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI5_MCLK2 14 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI5_MCLK3 15 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI6_IPG 16 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI6_MCLK1 17 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI6_MCLK2 18 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI6_MCLK3 19 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI7_IPG 20 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI7_MCLK1 21 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI7_MCLK2 22 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI7_MCLK3 23 +#define IMX8MP_CLK_AUDIO_BLK_CTL_ASRC_IPG 24 +#define IMX8MP_CLK_AUDIO_BLK_CTL_PDM_IPG 25 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SDMA2_ROOT 26 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SDMA3_ROOT 27 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SPBA2_ROOT 28 +#define IMX8MP_CLK_AUDIO_BLK_CTL_DSP_ROOT 29 +#define IMX8MP_CLK_AUDIO_BLK_CTL_DSPDBG_ROOT 30 +#define IMX8MP_CLK_AUDIO_BLK_CTL_EARC_IPG 31 +#define IMX8MP_CLK_AUDIO_BLK_CTL_OCRAMA_IPG 32 +#define IMX8MP_CLK_AUDIO_BLK_CTL_AUD2HTX_IPG 33 +#define IMX8MP_CLK_AUDIO_BLK_CTL_EDMA_ROOT 34 +#define IMX8MP_CLK_AUDIO_BLK_CTL_AUDPLL_ROOT 35 +#define IMX8MP_CLK_AUDIO_BLK_CTL_MU2_ROOT 36 +#define IMX8MP_CLK_AUDIO_BLK_CTL_MU3_ROOT 37 +#define IMX8MP_CLK_AUDIO_BLK_CTL_EARC_PHY 38 +#define IMX8MP_CLK_AUDIO_BLK_CTL_PDM_ROOT 39 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK1_SEL 40 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK2_SEL 41 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI2_MCLK1_SEL 42 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI2_MCLK2_SEL 43 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI3_MCLK1_SEL 44 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI3_MCLK2_SEL 45 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI4_MCLK1_SEL 46 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI4_MCLK2_SEL 47 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI5_MCLK1_SEL 48 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI5_MCLK2_SEL 49 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI6_MCLK1_SEL 50 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI6_MCLK2_SEL 51 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI7_MCLK1_SEL 52 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI7_MCLK2_SEL 53 +#define IMX8MP_CLK_AUDIO_BLK_CTL_PDM_SEL 54 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI_PLL_REF_SEL 55 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI_PLL 56 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI_PLL_BYPASS 57 +#define IMX8MP_CLK_AUDIO_BLK_CTL_SAI_PLL_OUT 58 -#define IMX8MP_CLK_AUDIOMIX_END 59 +#define IMX8MP_CLK_AUDIO_BLK_CTL_END 59 #endif From patchwork Tue Nov 3 11:18:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 314507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CD42C388F2 for ; Tue, 3 Nov 2020 11:19:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0B12722404 for ; Tue, 3 Nov 2020 11:19:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728474AbgKCLTS (ORCPT ); Tue, 3 Nov 2020 06:19:18 -0500 Received: from inva020.nxp.com ([92.121.34.13]:38182 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728286AbgKCLTO (ORCPT ); Tue, 3 Nov 2020 06:19:14 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 879F91A089A; Tue, 3 Nov 2020 12:19:12 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 78B491A04D2; Tue, 3 Nov 2020 12:19:12 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id B53662033F; Tue, 3 Nov 2020 12:19:11 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v5 02/14] dt-bindings: reset: imx8mp: Add audio blk_ctl reset IDs Date: Tue, 3 Nov 2020 13:18:14 +0200 Message-Id: <1604402306-5348-3-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> References: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These will be used by the imx8mp for blk_ctl driver. Signed-off-by: Abel Vesa Acked-by: Rob Herring Reviewed-by: Dong Aisheng Acked-by: Stephen Boyd --- include/dt-bindings/reset/imx8mp-reset.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/dt-bindings/reset/imx8mp-reset.h b/include/dt-bindings/reset/imx8mp-reset.h index 2e8c910..6c7f17f 100644 --- a/include/dt-bindings/reset/imx8mp-reset.h +++ b/include/dt-bindings/reset/imx8mp-reset.h @@ -47,4 +47,9 @@ #define IMX8MP_RESET_NUM 38 +#define IMX8MP_AUDIO_BLK_CTL_EARC_RESET 0 +#define IMX8MP_AUDIO_BLK_CTL_EARC_PHY_RESET 1 + +#define IMX8MP_AUDIO_BLK_CTL_RESET_NUM 2 + #endif From patchwork Tue Nov 3 11:18:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 314502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 425FBC388F2 for ; Tue, 3 Nov 2020 11:20:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F14602076E for ; Tue, 3 Nov 2020 11:20:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728462AbgKCLTR (ORCPT ); Tue, 3 Nov 2020 06:19:17 -0500 Received: from inva020.nxp.com ([92.121.34.13]:38212 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728202AbgKCLTP (ORCPT ); Tue, 3 Nov 2020 06:19:15 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 5A38F1A08FC; Tue, 3 Nov 2020 12:19:13 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 4B64F1A087F; Tue, 3 Nov 2020 12:19:13 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 88AF12033F; Tue, 3 Nov 2020 12:19:12 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v5 03/14] dt-bindings: clock: imx8mp: Add ids for the audio shared gate Date: Tue, 3 Nov 2020 13:18:15 +0200 Message-Id: <1604402306-5348-4-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> References: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All these IDs are for one single HW gate (CCGR101) that is shared between these root clocks. Signed-off-by: Abel Vesa Acked-by: Rob Herring Reviewed-by: Dong Aisheng Acked-by: Stephen Boyd --- include/dt-bindings/clock/imx8mp-clock.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index 89c67b7..5fc2c40 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -322,7 +322,17 @@ #define IMX8MP_CLK_HSIO_AXI 311 #define IMX8MP_CLK_MEDIA_ISP 312 -#define IMX8MP_CLK_END 313 +#define IMX8MP_CLK_AUDIO_AHB_ROOT 313 +#define IMX8MP_CLK_AUDIO_AXI_ROOT 314 +#define IMX8MP_CLK_SAI1_ROOT 315 +#define IMX8MP_CLK_SAI2_ROOT 316 +#define IMX8MP_CLK_SAI3_ROOT 317 +#define IMX8MP_CLK_SAI5_ROOT 318 +#define IMX8MP_CLK_SAI6_ROOT 319 +#define IMX8MP_CLK_SAI7_ROOT 320 +#define IMX8MP_CLK_PDM_ROOT 321 + +#define IMX8MP_CLK_END 322 #define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_IPG 0 #define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK1 1 From patchwork Tue Nov 3 11:18:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 314501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UPPERCASE_50_75,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C69EC55178 for ; Tue, 3 Nov 2020 11:20:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B710722404 for ; Tue, 3 Nov 2020 11:20:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728857AbgKCLUW (ORCPT ); Tue, 3 Nov 2020 06:20:22 -0500 Received: from inva020.nxp.com ([92.121.34.13]:38264 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728426AbgKCLTR (ORCPT ); Tue, 3 Nov 2020 06:19:17 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E7AE91A0600; Tue, 3 Nov 2020 12:19:14 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id DA9F41A0984; Tue, 3 Nov 2020 12:19:14 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 292A62033F; Tue, 3 Nov 2020 12:19:14 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v5 05/14] dt-bindings: reset: imx8mp: Add media blk_ctl reset IDs Date: Tue, 3 Nov 2020 13:18:17 +0200 Message-Id: <1604402306-5348-6-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> References: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These will be used by the imx8mp for blk_ctl driver. Signed-off-by: Abel Vesa Acked-by: Rob Herring Reviewed-by: Dong Aisheng Acked-by: Stephen Boyd --- include/dt-bindings/reset/imx8mp-reset.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/include/dt-bindings/reset/imx8mp-reset.h b/include/dt-bindings/reset/imx8mp-reset.h index 6c7f17f..ba70248 100644 --- a/include/dt-bindings/reset/imx8mp-reset.h +++ b/include/dt-bindings/reset/imx8mp-reset.h @@ -52,4 +52,32 @@ #define IMX8MP_AUDIO_BLK_CTL_RESET_NUM 2 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI_PCLK 0 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI_CLKREF 1 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI_PCLK 2 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI_ACLK 3 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_PIXEL 4 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_APB 5 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISI_PROC 6 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISI_APB 7 +#define IMX8MP_MEDIA_BLK_CTL_RESET_BUS_BLK 8 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI2_PCLK 9 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI2_ACLK 10 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_PIXEL 11 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_APB 12 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_COR 13 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_AXI 14 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_AHB 15 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_COR 16 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_AXI 17 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_AHB 18 +#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_COR 19 +#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_AXI 20 +#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_AHB 21 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI2 22 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_AXI 23 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_AXI 24 + +#define IMX8MP_MEDIA_BLK_CTL_RESET_NUM 25 + #endif From patchwork Tue Nov 3 11:18:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 314504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87756C388F2 for ; Tue, 3 Nov 2020 11:20:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3F7B22076E for ; Tue, 3 Nov 2020 11:20:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728745AbgKCLT5 (ORCPT ); Tue, 3 Nov 2020 06:19:57 -0500 Received: from inva021.nxp.com ([92.121.34.21]:41062 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728476AbgKCLTU (ORCPT ); Tue, 3 Nov 2020 06:19:20 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 18AD1200869; Tue, 3 Nov 2020 12:19:18 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0B9BD2008F0; Tue, 3 Nov 2020 12:19:18 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 515FD2033F; Tue, 3 Nov 2020 12:19:17 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v5 09/14] Documentation: bindings: clk: Add bindings for i.MX BLK_CTL Date: Tue, 3 Nov 2020 13:18:21 +0200 Message-Id: <1604402306-5348-10-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> References: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the i.MX BLK_CTL with its devicetree properties. Signed-off-by: Abel Vesa Reviewed-by: Dong Aisheng Reviewed-by: Rob Herring Acked-by: Stephen Boyd --- .../devicetree/bindings/clock/fsl,imx-blk-ctl.yaml | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/fsl,imx-blk-ctl.yaml diff --git a/Documentation/devicetree/bindings/clock/fsl,imx-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/fsl,imx-blk-ctl.yaml new file mode 100644 index 00000000..5e9eb40 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/fsl,imx-blk-ctl.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fsl,imx-blk-ctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX BLK_CTL + +maintainers: + - Abel Vesa + +description: + i.MX BLK_CTL is a conglomerate of different GPRs that are + dedicated to a specific subsystem. Because it usually contains + clocks amongst other things, it needs access to the i.MX clocks + API. All the other functionalities it provides can work just fine + from the clock subsystem tree. + +properties: + compatible: + items: + - enum: + - fsl,imx8mp-audio-blk-ctl + - fsl,imx8mp-hdmi-blk-ctl + - fsl,imx8mp-media-blk-ctl + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - power-domains + - '#clock-cells' + - '#reset-cells' + +additionalProperties: false + +examples: + - | + #include + + audio_blk_ctl: clock-controller@30e20000 { + compatible = "fsl,imx8mp-audio-blk-ctl", "syscon"; + reg = <0x30e20000 0x10000>; + power-domains = <&audiomix_pd>; + + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Tue Nov 3 11:18:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 314505 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57424C388F7 for ; Tue, 3 Nov 2020 11:19:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 144FC2076E for ; Tue, 3 Nov 2020 11:19:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728368AbgKCLTu (ORCPT ); Tue, 3 Nov 2020 06:19:50 -0500 Received: from inva020.nxp.com ([92.121.34.13]:38412 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728507AbgKCLTW (ORCPT ); Tue, 3 Nov 2020 06:19:22 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 75D631A08CF; Tue, 3 Nov 2020 12:19:20 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 66D121A0600; Tue, 3 Nov 2020 12:19:20 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id A24382033F; Tue, 3 Nov 2020 12:19:19 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v5 12/14] arm64: dts: imx8mp: Add audio_blk_ctl node Date: Tue, 3 Nov 2020 13:18:24 +0200 Message-Id: <1604402306-5348-13-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> References: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some of the features of the audio_ctl will be used by some different drivers in a way those drivers will know best, so adding the syscon compatible we allow those to do just that. Only the resets and the clocks are registered bit the clk-blk-ctl driver. Signed-off-by: Abel Vesa Reviewed-by: Dong Aisheng --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 4793122..3716119 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -743,6 +743,21 @@ }; }; + aips5: bus@30c00000 { + compatible = "fsl,aips-bus", "simple-bus"; + reg = <0x30c00000 0x400000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + audio_blk_ctl: clock-controller@30e20000 { + compatible = "fsl,imx8mp-audio-blk-ctl", "syscon"; + reg = <0x30e20000 0x50c>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, From patchwork Tue Nov 3 11:18:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 314506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C90D8C388F2 for ; Tue, 3 Nov 2020 11:19:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 85C312076E for ; Tue, 3 Nov 2020 11:19:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728286AbgKCLTY (ORCPT ); Tue, 3 Nov 2020 06:19:24 -0500 Received: from inva021.nxp.com ([92.121.34.21]:41062 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728530AbgKCLTX (ORCPT ); Tue, 3 Nov 2020 06:19:23 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 196C420068E; Tue, 3 Nov 2020 12:19:22 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0CEA52002EB; Tue, 3 Nov 2020 12:19:22 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 49E6D2033F; Tue, 3 Nov 2020 12:19:21 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v5 14/14] arm64: dts: imx8mp: Add hdmi_blk_ctl node Date: Tue, 3 Nov 2020 13:18:26 +0200 Message-Id: <1604402306-5348-15-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> References: <1604402306-5348-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some of the features of the hdmi_ctl will be used by some different drivers in a way those drivers will know best, so adding the syscon compatible we allow those to do just that. Only the resets and the clocks are registered bit the clk-blk-ctl driver. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 8e1a01f..f1c5a07d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -756,6 +756,13 @@ #clock-cells = <1>; #reset-cells = <1>; }; + + hdmi_blk_ctl: clock-controller@32fc0000 { + compatible = "fsl,imx8mp-hdmi-blk-ctl", "syscon"; + reg = <0x32fc0000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; }; aips5: bus@30c00000 {