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Wed, 4 Nov 2020 10:37:18 +0000 (GMT) X-AuditID: cbfec7f5-38bff700000018ae-7d-5fa2845f005e Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 3A.75.06314.E5482AF5; Wed, 4 Nov 2020 10:37:18 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201104103718eusmtip25006f9bb88eff50476c174c7a16ba0f7~ER7uR07EW1402114021eusmtip2F; Wed, 4 Nov 2020 10:37:18 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, s.nawrocki@samsung.com Subject: [PATCH v8 1/7] dt-bindings: devfreq: Add documentation for the interconnect properties Date: Wed, 4 Nov 2020 11:36:51 +0100 Message-Id: <20201104103657.18007-2-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201104103657.18007-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Sa0iTYRTHefZeN5q9m5IHu+HoQkVesA9PaVlisE8h9CGyy3rTF610k71e i0hbZnnDlJqXULMr66bzgl3UmssVkjMVE1xpaJRWSE0JKzLna+W3/znn93/+58DDEup+yo89 ok8WjHo+QUMryKaO6a6NujM1uqCnjV54qDIb4brS+xR+PfmBwlX2Lgr3TU3Q2NxipXHxUBGJ nc5aBltH+inc+/Ayjd0FdoRLna0yfNf+hsGDWbdonN1iZ3D75xwKl5aM0dtVWqvlPK119T+m tUN5Dpm2/topbWGDBWnd1hVRdLQiLFZIOJIqGAO3HVLEl1W8pZKcq9I7Gkx0JnItz0VyFrhN UND/nc5FClbN3ULQVvFgvphEUHW1kpEKN4Lv9c3kX8sFp2ueuomgp+AB+c9S3WOSeSiaC4aC Z4XIo324SDj7vnIOIrhzBDQ1FxOegTfHw6fuccajSW41PHcOz5mVXChk17XPx62E27VP5ng5 Fwav3CZGYlTwomx0jiFmGVNjBeEJAG6KgYnJe7RkjgRHVhkhaW8YdzQwkl4GnSX5pGQwIch/ NMhIRRGCIUc1kqhQcHX9mH2JnY1YB/cfBkrtHTDcNkx52sB5wcAXlbSEFxQ3mQmprYRzZ9US vQp+WswySftB3ugMKSFasJdQRci/fME15QuuKf8fW40IC/IVUsTEOEEM0QtpASKfKKbo4wJi DIlWNPvbOn87pppR66/DNsSxSLNI+aTpik5N8aliRqINAUtofJQRLzsPqpWxfMZxwWjQGVMS BNGGlrKkxlcZUjN2QM3F8cnCMUFIEox/pzJW7peJws3Rqq/hRzdndH8cPZC5VkGc2DJyI5Sk OqpMIUi193bfkqLcwobpb7ssOq/p63tOm6JTgE9tt23tvTRp2OMjbojx9zFU5uxzsYuXhlVc zD5pHovyLvXVr07TybtbttbY3qULY9Gve2Z2a3f6uyPagmuLQ4O61+z/MXDqzo3LzbEaUozn g9cTRpH/A8myVXFpAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOIsWRmVeSWpSXmKPExsVy+t/xe7pxLYviDdrXmVrcn9fKaLFxxnpW i+tfnrNazD9yjtXiytf3bBbT925is5h0fwKLxfnzG9gtNj2+xmpxedccNovPvUcYLWac38dk sfbIXXaL240r2Cxa9x5htzj8pp3VYsbkl2wOgh6bVnWyedy5tofN4373cSaPzUvqPfq2rGL0 +LxJLoAtSs+mKL+0JFUhI7+4xFYp2tDCSM/Q0kLPyMRSz9DYPNbKyFRJ384mJTUnsyy1SN8u QS9j5ux7rAXnVSqObWlma2C8I9vFyMkhIWAiMfH8HbYuRi4OIYGljBKPT+xn7WLkAEpIScxv UYKoEZb4c62LDcQWEvjEKHH5BFicTcBQovdoHyOILSLgIXGqdS0riM0sMINZ4vQsUxBbWCBe Yu+302BxFgFViRPnHzCB2LwC1hKtGw+zQMyXl1i94QAziM0pYCNx8XMzO8Qua4nFz89B1QtK nJz5hAXkNGYBdYn184QgVslLNG+dzTyBUXAWkqpZCFWzkFQtYGRexSiSWlqcm55bbKhXnJhb XJqXrpecn7uJERip24793LyD8dLG4EOMAhyMSjy8B7YtjBdiTSwrrsw9xCjBwawkwut09nSc EG9KYmVValF+fFFpTmrxIUZToNcmMkuJJucDk0heSbyhqaG5haWhubG5sZmFkjhvh8DBGCGB 9MSS1OzU1ILUIpg+Jg5OqQbGyJwjvcysdZWHF0/ZI/lv11nnek+H45NFM2dt25LC1nstYYuw hNbNkmmi535eqrt7OOSvaJLocwajGce3JKZcODtb48LpvDnfFUUlFzx4flnif+ZEkfwZ7w8s 9q9/Nj9wj4vJ1Em/11ybxiZ8eXaSSb935pKGuWtXLvbetTAs9nGdY5z9pXXFT5RYijMSDbWY i4oTAfJNaOnqAgAA X-CMS-MailID: 20201104103718eucas1p1c103f1a96499b03c72e5457ac2542c3d X-Msg-Generator: CA X-RootMTR: 20201104103718eucas1p1c103f1a96499b03c72e5457ac2542c3d X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201104103718eucas1p1c103f1a96499b03c72e5457ac2542c3d References: <20201104103657.18007-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for new optional properties in the exynos bus nodes: interconnects, #interconnect-cells, samsung,data-clock-ratio. These properties allow to specify the SoC interconnect structure which then allows the interconnect consumer devices to request specific bandwidth requirements. Signed-off-by: Artur Świgoń Signed-off-by: Sylwester Nawrocki Acked-by: Chanwoo Choi Acked-by: Rob Herring --- Changes for v8: - updated description of the interconnects property, - fixed typo in samsung,data-clk-ratio property description. Changes for v7: - bus-width property replaced with samsung,data-clock-ratio, - the interconnect consumer bindings used instead of vendor specific properties Changes for v6: - added dts example of bus hierarchy definition and the interconnect consumer, - added new bus-width property. Changes for v5: - exynos,interconnect-parent-node renamed to samsung,interconnect-parent --- .../devicetree/bindings/devfreq/exynos-bus.txt | 71 +++++++++++++++++++++- 1 file changed, 69 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt index e71f752..bcaa2c0 100644 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -51,6 +51,19 @@ Optional properties only for parent bus device: - exynos,saturation-ratio: the percentage value which is used to calibrate the performance count against total cycle count. +Optional properties for the interconnect functionality (QoS frequency +constraints): +- #interconnect-cells: should be 0. +- interconnects: as documented in ../interconnect.txt, describes a path at the + higher level interconnects used by this interconnect provider. + If this interconnect provider is directly linked to a top level interconnect + provider the property contains only one phandle. The provider extends + the interconnect graph by linking its node to a node registered by provider + pointed to by first phandle in the 'interconnects' property. + +- samsung,data-clock-ratio: ratio of the data throughput in B/s to minimum data + clock frequency in Hz, default value is 8 when this property is missing. + Detailed correlation between sub-blocks and power line according to Exynos SoC: - In case of Exynos3250, there are two power line as following: VDD_MIF |--- DMC @@ -135,7 +148,7 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC: |--- PERIC (Fixed clock rate) |--- FSYS (Fixed clock rate) -Example1: +Example 1: Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to power line (regulator). The MIF (Memory Interface) AXI bus is used to transfer data between DRAM and CPU and uses the VDD_MIF regulator. @@ -184,7 +197,7 @@ Example1: |L5 |200000 |200000 |400000 |300000 | ||1000000 | ---------------------------------------------------------- -Example2 : +Example 2: The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is listed below: @@ -419,3 +432,57 @@ Example2 : devfreq = <&bus_leftbus>; status = "okay"; }; + +Example 3: + An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on + Exynos4412 SoC with video mixer as an interconnect consumer device. + + soc { + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + samsung,data-clock-ratio = <4>; + #interconnect-cells = <0>; + }; + + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_dmc>; + }; + + bus_display: bus_display { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_ACLK160>; + clock-names = "bus"; + operating-points-v2 = <&bus_display_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_leftbus &bus_dmc>; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + /* ... */ + } + + bus_leftbus_opp_table: opp_table3 { + compatible = "operating-points-v2"; + /* ... */ + }; + + bus_display_opp_table: opp_table4 { + compatible = "operating-points-v2"; + /* .. */ + }; + + &mixer { + compatible = "samsung,exynos4212-mixer"; + interconnects = <&bus_display &bus_dmc>; + /* ... */ + }; + }; From patchwork Wed Nov 4 10:36:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\\(PLT\\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 314452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C371C2D0A3 for ; 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Wed, 4 Nov 2020 10:37:26 +0000 (GMT) X-AuditID: cbfec7f2-7efff70000001938-15-5fa28466ef04 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 0F.75.06314.46482AF5; Wed, 4 Nov 2020 10:37:24 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201104103724eusmtip2a27f0801494ca72c6885d4086cb9b9bc~ER7z97sjL1005710057eusmtip28; Wed, 4 Nov 2020 10:37:24 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, s.nawrocki@samsung.com Subject: [PATCH v8 4/7] PM / devfreq: exynos-bus: Add registration of interconnect child device Date: Wed, 4 Nov 2020 11:36:54 +0100 Message-Id: <20201104103657.18007-5-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201104103657.18007-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WSfSzUcRzH973fw/2Ys59j8x2irtTUkB7mO25NTXV/NLX1RxuiKz8P447d D8XaKM+PJ1ouM+dpo7PCxWXEjMu1CUOoKMpzpZpjU1rl56f67/39fF7vz+e9z74UJm4kHKgo ZTyjUspjJKQlbuj7PuQenl4denglcz+arsgAqFnTSKCJtUUCaY2DBHq5/pVEpZ16EhVPF+Fo aKhJiPSz4wQabS8nkbnACJBmqEuAHhrfCtHkrXoSZXQahaj3cxaBNCXLpJ+NTK/LIWVT409J 2XSeSSB7XJsiK2zRAZlZ73yBDLSUhjExUYmMyvPEFcvItPefiLh2mxsb6gksFdRa5wILCtLH YM3SnCAXWFJiuh7AhZlVkn+sAXg/XQM4SkybAdTNXcwF1LZjuOksz9QBuKw2Yv8MrTXfSM5A 0l6w4FnhttmO9oeZ8xU4B2F0NgYNbcUY17Cl5TBtbAXnNE67wq43r4XcBhHtC1tzbvLxXGBD U/c2bkFL4bA5TcjNgXSPEPZO9uJ8In9Y3kfyvC38aGoR8toJ9pfk4zyfBmB+x+SOuQjAaVMl 4ClfODX4g+QGYbQbbGz35MsnYcvoXYyfbw1frdhwZWxLFhtKd8oimJ0p5ul9cFNXKuC1A8yb +72TTAZ/Nvvw51ED+KRBTRQBl7L/uyoB0AF7JoFVRDCsl5K57sHKFWyCMsLjWqxCD7a+Uf8v 02obWB+52gNoCkisRN2GqlAxIU9kkxQ9AFKYxE50aqA/RCwKkyclM6rYUFVCDMP2AEcKl9iL jlYvXxbTEfJ4Jpph4hjV366AsnBIBX5dPmdC6gJSguxnCKfVIM0R75oAC6l28UCzdrNhM1mb FejaZ+87cycmuazV0eX4uS8f7klTleo9DxRVBruO2Ufr75LzrMzh8dGVA2Nj3hkLEqkxp67l kpv78zFTgN0u9nZt8AxsH9U2dZwPcj60Vzpyuo3a7WR4sTQfOVDYsREswdlIuddBTMXK/wCa E0XOQgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsVy+t/xe7opLYviDU7st7G4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbbHp8jdXi8q45bBafe48wWsw4v4/J Yu2Ru+wWtxtXsFm07j3CbnH4TTurxYzJL9kcBD02repk87hzbQ+bx/3u40wem5fUe/RtWcXo 8XmTXABblJ5NUX5pSapCRn5xia1StKGFkZ6hpYWekYmlnqGxeayVkamSvp1NSmpOZllqkb5d gl5G88PXrAW7BCt+9F9nbmBcwtfFyMEhIWAicXGDexcjF4eQwFJGiUMbfzJDxKUk5rcodTFy ApnCEn+udbFB1HxilHj99zczSIJNwFCi92gfI4gtIuAhcap1LSuIzSwwg1ni9CxTEFtYIF5i 9ar/YPUsAqoS+27dZAeZzytgLbG1swZivrzE6g0HwEo4BWwkLn5uZgexhYBKFj8/xzSBkW8B I8MqRpHU0uLc9NxiQ73ixNzi0rx0veT83E2MwNjYduzn5h2MlzYGH2IU4GBU4uE9sG1hvBBr YllxZe4hRgkOZiURXqezp+OEeFMSK6tSi/Lji0pzUosPMZoC3TSRWUo0OR8Yt3kl8YamhuYW lobmxubGZhZK4rwdAgdjhATSE0tSs1NTC1KLYPqYODilGhgXCsd+/GHMwNzVG7r9pOR8/tAv Zndma7K6TmM6urPpycWKN6ZLzdu80ysOzd8iHNrz95fg5OO2qyKPah8+yqB249zvh+Ebi86c VDY3sTyss2uWXtTRLH9prrd1LpqSz16sTT3tYWv64+VF01zp5gX/mvXjtrD7fju2NPMKZ8r6 p60q3wu6WHcpsRRnJBpqMRcVJwIAyEniaKMCAAA= X-CMS-MailID: 20201104103726eucas1p2e8f7c32f13b4232d925e901284ada13d X-Msg-Generator: CA X-RootMTR: 20201104103726eucas1p2e8f7c32f13b4232d925e901284ada13d X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201104103726eucas1p2e8f7c32f13b4232d925e901284ada13d References: <20201104103657.18007-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds registration of a child platform device for the exynos interconnect driver. It is assumed that the interconnect provider will only be needed when #interconnect-cells property is present in the bus DT node, hence the child device will be created only when such a property is present. Acked-by: Krzysztof Kozlowski Acked-by: Chanwoo Choi Signed-off-by: Sylwester Nawrocki --- Changes for v8, v7, v6: - none. Changes for v5: - new patch. --- drivers/devfreq/exynos-bus.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c index 1e684a4..ee300ee 100644 --- a/drivers/devfreq/exynos-bus.c +++ b/drivers/devfreq/exynos-bus.c @@ -24,6 +24,7 @@ struct exynos_bus { struct device *dev; + struct platform_device *icc_pdev; struct devfreq *devfreq; struct devfreq_event_dev **edev; @@ -156,6 +157,8 @@ static void exynos_bus_exit(struct device *dev) if (ret < 0) dev_warn(dev, "failed to disable the devfreq-event devices\n"); + platform_device_unregister(bus->icc_pdev); + dev_pm_opp_of_remove_table(dev); clk_disable_unprepare(bus->clk); if (bus->opp_table) { @@ -168,6 +171,8 @@ static void exynos_bus_passive_exit(struct device *dev) { struct exynos_bus *bus = dev_get_drvdata(dev); + platform_device_unregister(bus->icc_pdev); + dev_pm_opp_of_remove_table(dev); clk_disable_unprepare(bus->clk); } @@ -432,6 +437,18 @@ static int exynos_bus_probe(struct platform_device *pdev) if (ret < 0) goto err; + /* Create child platform device for the interconnect provider */ + if (of_get_property(dev->of_node, "#interconnect-cells", NULL)) { + bus->icc_pdev = platform_device_register_data( + dev, "exynos-generic-icc", + PLATFORM_DEVID_AUTO, NULL, 0); + + if (IS_ERR(bus->icc_pdev)) { + ret = PTR_ERR(bus->icc_pdev); + goto err; + } + } + max_state = bus->devfreq->profile->max_state; min_freq = (bus->devfreq->profile->freq_table[0] / 1000); max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000); From patchwork Wed Nov 4 10:36:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\\(PLT\\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 314453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AECAC56201 for ; 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Wed, 4 Nov 2020 10:37:28 +0000 (GMT) X-AuditID: cbfec7f2-809ff70000001938-24-5fa284683a0e Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id B2.85.06314.86482AF5; Wed, 4 Nov 2020 10:37:28 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201104103727eusmtip2586e9f806ee1ec4683732c23bd18e85b~ER73BceSb0884408844eusmtip2P; Wed, 4 Nov 2020 10:37:27 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, s.nawrocki@samsung.com Subject: [PATCH v8 6/7] ARM: dts: exynos: Add interconnects to Exynos4412 mixer Date: Wed, 4 Nov 2020 11:36:56 +0100 Message-Id: <20201104103657.18007-7-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201104103657.18007-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SWUwTURSGvZ3pdCAWh4LhgkZigw+YsCmaGzYRiam8iAlPGIQKEyCypcMi PCCERSxLEAwgGEA0EaoEaKFBFsPSWkiBBkGQgBYDxKAgaCFsAaQdVN7+c+53/3P+m0tigo9c OzI6LpGWxIljhIQ5rny/pXOKyq4LdZ0bdUX66hyAWiqauGhy7RsX1ahGuGh8fYVA5d1yApXo i3Gk0zXzkHxugovGOp4RyFCoAqhC946DGlWfeWg6s55AOd0qHupfeshFFaWLhK+lSC57RIhm JroIkT5fwxEpXj4QFbXKgMggPxNIBJt7RdAx0cm0xMUnzDzq8bKSSBgi79fsbBEZoIonBWYk pNxhe4MMSIE5KaDqARzWKzhssQageiofZwsDgNrcEkwKSNOVUYM3238FoGFogPh3o6FFihl9 CcoNFqqLgFFbU/4wd6Ha5IRReRhUtpeYICvqFqxtmcKNGqfOwco3YybNpzzh9Owyzi5oD183 95h4M8rrYHIWj2Us4eDTeRODHTBZbVWYcQCkfvHg29lmHruqP1SPnGR9rOB3Teth6NNQW1qA s3wWgAWd0zy2KAZQr6kFLOUJZ0a2CaMRRjnCpg4Xtn0Vdg9WHz6FBfy0bMnuYAFLlOWHbT7M yxWwtAPckZVzWG0H8+f3D2OJoK52DCsGZyuPpKk8kqby/9xagMmADZ3ExEbSjFscneLMiGOZ pLhI5/D4WDk4+GzaPc3vdrD+4W4foEggPM7vUT4PFXDFyUxqbB+AJCa05vsNa+8I+BHi1DRa Eh8qSYqhmT5wisSFNvyLdYshAipSnEjfo+kEWvL3lEOa2WWAoBeXbXe/MCEr9vl4kO/e6o+F oKnrg6v1a9zNtr3+Y4qAUfUVBTPpUDb3BEx7WCxlpXgoyhrr413ChqU3gwd8A7J73dO8Oj2/ hjrt794oDsy0iS/TXUj/GejSeyLdb3ZjeyXFUW+bp7Jmeto5FhvXti75BNzWpmx6j4Mufnp4 nhBnosRu5zEJI/4D7fsP5GgDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGIsWRmVeSWpSXmKPExsVy+t/xe7oZLYviDZ7/FrK4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbbHp8jdXi8q45bBafe48wWsw4v4/J Yu2Ru+wWtxtXsFm07j3CbnH4TTurxYzJL9kcBD02repk87hzbQ+bx/3u40wem5fUe/RtWcXo 8XmTXABblJ5NUX5pSapCRn5xia1StKGFkZ6hpYWekYmlnqGxeayVkamSvp1NSmpOZllqkb5d gl7GxLfb2ArOcFTM//2TrYFxNnsXIweHhICJxMXPtl2MXBxCAksZJbpuTWKBiEtJzG9R6mLk BDKFJf5c62KDqPnEKDHz0woWkASbgKFE79E+RhBbRMBD4lTrWlYQm1lgBrPE6VmmIHOEBfwl Vj9lAgmzCKhKzFpzGayVV8Ba4vaDtywQ8+UlVm84wAxicwrYAJ3TzA5iCwHVLH5+jgmiXlDi 5MwnYKcxC6hLrJ8nBLFJXqJ562zmCYyCs5BUzUKomoWkagEj8ypGkdTS4tz03GJDveLE3OLS vHS95PzcTYzAON127OfmHYyXNgYfYhTgYFTi4T2wbWG8EGtiWXFl7iFGCQ5mJRFep7On44R4 UxIrq1KL8uOLSnNSiw8xmgK9NpFZSjQ5H5hC8kriDU0NzS0sDc2NzY3NLJTEeTsEDsYICaQn lqRmp6YWpBbB9DFxcEo1MEpcEXBSeKP9YMniaPVeu5Wvzjx96Lw6xPHpeWst/5t+qm5fpHyv rXrDLXq4a5fKorQ5rS7vPrVluRubd7AUlc87cTfSS2qe8e6aOMYtKbJBDepb+Zv7llSnZcpw RXWsjdyfdk9JderGdzu9H6/0iL3vrna1NEaKzWtBMn/wAtPYON8Srj9TlViKMxINtZiLihMB UkZdHOkCAAA= X-CMS-MailID: 20201104103728eucas1p2f671f29ed9eb06d4c6c991b073be092e X-Msg-Generator: CA X-RootMTR: 20201104103728eucas1p2f671f29ed9eb06d4c6c991b073be092e X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201104103728eucas1p2f671f29ed9eb06d4c6c991b073be092e References: <20201104103657.18007-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Artur Świgoń This patch adds an 'interconnects' property to Exynos4412 DTS in order to declare the interconnect path used by the mixer. Please note that the 'interconnect-names' property is not needed when there is only one path in 'interconnects', in which case calling of_icc_get() with a NULL name simply returns the right path. Reviewed-by: Chanwoo Choi Signed-off-by: Artur Świgoń Signed-off-by: Sylwester Nawrocki --- Changes for v8...v5: - none. --- arch/arm/boot/dts/exynos4412.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 4999e68..d07739e 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -779,6 +779,7 @@ clock-names = "mixer", "hdmi", "sclk_hdmi", "vp"; clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>; + interconnects = <&bus_display &bus_dmc>; }; &pmu { From patchwork Wed Nov 4 10:36:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\\(PLT\\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 314451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79E44C388F7 for ; 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Wed, 4 Nov 2020 10:37:30 +0000 (GMT) X-AuditID: cbfec7f5-371ff700000018ae-a4-5fa2846adf0d Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 35.85.06314.A6482AF5; Wed, 4 Nov 2020 10:37:30 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201104103729eusmtip2cae8ed3d402fdf6b98a5eafd8e0f4d28~ER74sPJoW1361713617eusmtip2Z; Wed, 4 Nov 2020 10:37:29 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, s.nawrocki@samsung.com Subject: [PATCH v8 7/7] drm: exynos: mixer: Add interconnect support Date: Wed, 4 Nov 2020 11:36:57 +0100 Message-Id: <20201104103657.18007-8-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201104103657.18007-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCKsWRmVeSWpSXmKPExsWy7djPc7pZLYviDXYdlba4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbbHp8jdXi8q45bBafe48wWsw4v4/J Yu2Ru+wWtxtXsFm07j3CbnH4TTurxYzJL9kcBD02repk87hzbQ+bx/3u40wem5fUe/RtWcXo 8XmTXABbFJdNSmpOZllqkb5dAlfGtJ6ZTAVN7hWPZrWwNDAetOxi5OCQEDCRmHwquYuRi0NI YAWjxJZZB9m6GDmBnC+MEtvXSkIkPjNKtO//yQSSAGl48LedDSKxnFHi3bmjzBAOUMe2x2/Y QarYBAwleo/2MYLYIgIuEm1P57GAFDELdDBLbNsxiRkkIQyU6J95HWwfi4CqxMKGC6wgNq+A tcSJmY/YIdbJS6zecACsnlPARuLi52Z2iBpBiZMzn7CA2MxANc1bZ4NdISHwk12i8/VfqFtd JG61LWWBsIUlXh3fAjVURuL05B4WiIZmRome3bfZIZwJjBL3jy9ghKiylrhz7hcbKJiYBTQl 1u/Shwg7SlxbtYIFEnp8EjfeCkIcwScxadt0Zogwr0RHmxBEtYrE71XToc6Rkuh+8h+q00Ni Zpv0BEbFWUi+mYXkm1kIaxcwMq9iFE8tLc5NTy02zkst1ytOzC0uzUvXS87P3cQITGun/x3/ uoNx35+kQ4wCHIxKPLwHti2MF2JNLCuuzD3EKMHBrCTC63T2dJwQb0piZVVqUX58UWlOavEh RmkOFiVxXuNFL2OFBNITS1KzU1MLUotgskwcnFINjK58Yod2qO3vW50c5X5LwHaComtI83nP N5wVWxN33PLezGfn/0/lmXKVEOPpZU7lZw2FnB4zujbdjHxYyR7WIG6QE7pbUvmqokLC7YsF 5TGcq3XL/666Z6m0N/LH/ZTzCRdXTknnlj9w/HXmNhW5/w3zv/AvKHawu5pfk+22ItDCOy3O r7FViaU4I9FQi7moOBEAFRVhKGcDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOIsWRmVeSWpSXmKPExsVy+t/xe7pZLYviDaYeYba4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbbHp8jdXi8q45bBafe48wWsw4v4/J Yu2Ru+wWtxtXsFm07j3CbnH4TTurxYzJL9kcBD02repk87hzbQ+bx/3u40wem5fUe/RtWcXo 8XmTXABblJ5NUX5pSapCRn5xia1StKGFkZ6hpYWekYmlnqGxeayVkamSvp1NSmpOZllqkb5d gl7GtJ6ZTAVN7hWPZrWwNDAetOxi5OSQEDCRePC3na2LkYtDSGApo8T5978Zuxg5gBJSEvNb lCBqhCX+XOtiA7GFBD4xSmzprAKx2QQMJXqP9jGC2CICHhKnWteygtjMAjOYJU7PMgWxhQVc JPpnXgfrZRFQlVjYcAGshlfAWuLEzEfsEPPlJVZvOMAMYnMK2Ehc/NzMDrHLWmLx83NMEPWC EidnPmEBOY1ZQF1i/TwhiFXyEs1bZzNPYBSchaRqFkLVLCRVCxiZVzGKpJYW56bnFhvqFSfm Fpfmpesl5+duYgRG6rZjPzfvYLy0MfgQowAHoxIP74FtC+OFWBPLiitzDzFKcDArifA6nT0d J8SbklhZlVqUH19UmpNafIjRFOi1icxSosn5wCSSVxJvaGpobmFpaG5sbmxmoSTO2yFwMEZI ID2xJDU7NbUgtQimj4mDU6qBkV/vcGDugUWCcTJ7xS/EP3mjGe+wft3xI48Lv+w14nsu/fL/ 0+TfD7Z+2vN9wgElHZYVvftSb1+R49BP+qLaKDDjx+TJxT39ah8eRUhuuLw8Qb7355mqh9Pl Oebu+v1OqY3XrS5N6u9SoU3MhufX31N4k115dZHV6g0VJq6/db7qnj6Zv7nqVbMSS3FGoqEW c1FxIgCxxSkg6gIAAA== X-CMS-MailID: 20201104103730eucas1p2964e5910a1319fc1c931db8f02a447de X-Msg-Generator: CA X-RootMTR: 20201104103730eucas1p2964e5910a1319fc1c931db8f02a447de X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201104103730eucas1p2964e5910a1319fc1c931db8f02a447de References: <20201104103657.18007-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds interconnect support to exynos-mixer. The mixer works the same as before when CONFIG_INTERCONNECT is 'n'. For proper operation of the video mixer block we need to ensure the interconnect busses like DMC or LEFTBUS provide enough bandwidth so as to avoid DMA buffer underruns in the mixer block. I.e we need to prevent those busses from operating in low perfomance OPPs when the mixer is running. In this patch the bus bandwidth request is done through the interconnect API, the bandwidth value is calculated from selected DRM mode, i.e. video plane width, height, refresh rate and pixel format. The bandwidth setting is synchronized with VSYNC when we are switching to lower bandwidth. This is required to ensure enough bandwidth for the device since new settings are normally being applied in the hardware synchronously with VSYNC. Acked-by: Krzysztof Kozlowski Co-developed-by: Artur Świgoń Signed-off-by: Marek Szyprowski Signed-off-by: Sylwester Nawrocki Reviewed-by: Chanwoo Choi --- Changes for v8: - updated comment in mixer_probe() Changes for v7: - fixed incorrect setting of the ICC bandwidth when the mixer is disabled, now the bandwidth is set explicitly to 0 in such case. Changes for v6: - the icc_set_bw() call is now only done when calculated value for a crtc changes, this avoids unnecessary calls per each video frame - added synchronization of the interconnect bandwidth setting with the mixer VSYNC in order to avoid buffer underflow when we lower the interconnect bandwidth when the hardware still operates with previous mode settings that require higher bandwidth. This fixed IOMMU faults observed e.g. during switching from two planes to a single plane operation. Changes for v5: - renamed soc_path variable to icc_path --- drivers/gpu/drm/exynos/exynos_mixer.c | 146 ++++++++++++++++++++++++++++++++-- 1 file changed, 138 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index af192e5..8c1509e 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -73,6 +74,7 @@ enum mixer_flag_bits { MXR_BIT_INTERLACE, MXR_BIT_VP_ENABLED, MXR_BIT_HAS_SCLK, + MXR_BIT_REQUEST_BW, }; static const uint32_t mixer_formats[] = { @@ -99,6 +101,13 @@ struct mixer_context { struct exynos_drm_plane planes[MIXER_WIN_NR]; unsigned long flags; + struct icc_path *icc_path; + /* memory bandwidth on the interconnect bus in B/s */ + unsigned long icc_bandwidth; + /* mutex protecting @icc_bandwidth */ + struct mutex icc_lock; + struct work_struct work; + int irq; void __iomem *mixer_regs; void __iomem *vp_regs; @@ -754,6 +763,9 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) val |= MXR_INT_CLEAR_VSYNC; val &= ~MXR_INT_STATUS_VSYNC; + if (test_and_clear_bit(MXR_BIT_REQUEST_BW, &ctx->flags)) + schedule_work(&ctx->work); + /* interlace scan need to check shadow register */ if (test_bit(MXR_BIT_INTERLACE, &ctx->flags) && !mixer_is_synced(ctx)) @@ -934,6 +946,76 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc) mixer_reg_writemask(mixer_ctx, MXR_INT_EN, 0, MXR_INT_EN_VSYNC); } +/** + * mixer_get_memory_bandwidth - calculate memory bandwidth for current crtc mode + * @crtc: a crtc with DRM mode to calculate the bandwidth for + * + * Return: memory bandwidth in B/s + * + * This function returns memory bandwidth calculated as a sum of amount of data + * per second for each plane. The calculation is based on maximum possible pixel + * resolution for a plane so as to avoid different bandwidth request per each + * video frame. The formula used for calculation for each plane is: + * + * bw = width * height * frame_rate / interlace / (hor_subs * vert_subs) + * + * where: + * - width, height - (DRM mode) video frame width and height in pixels, + * - frame_rate - DRM mode frame refresh rate, + * - interlace: 1 - in case of progressive and 2 in case of interlaced video, + * - hor_subs, vert_subs - accordingly horizontal and vertical pixel + * subsampling for a plane. + */ +static unsigned int mixer_get_memory_bandwidth(struct exynos_drm_crtc *crtc) +{ + struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; + struct mixer_context *ctx = crtc->ctx; + unsigned long bw, bandwidth = 0; + int i, j, sub; + + for (i = 0; i < MIXER_WIN_NR; i++) { + struct drm_plane *plane = &ctx->planes[i].base; + const struct drm_format_info *format; + + if (plane->state && plane->state->crtc && plane->state->fb) { + format = plane->state->fb->format; + bw = mode->hdisplay * mode->vdisplay * + drm_mode_vrefresh(mode); + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + bw /= 2; + for (j = 0; j < format->num_planes; j++) { + sub = j ? (format->vsub * format->hsub) : 1; + bandwidth += format->cpp[j] * bw / sub; + } + } + } + + return bandwidth; +} + +static void mixer_set_icc_bandwidth(struct mixer_context *ctx, + unsigned long bandwidth) +{ + u32 avg_bw, peak_bw; + + /* add 20% safety margin */ + bandwidth = bandwidth / 4 * 5; + + avg_bw = peak_bw = Bps_to_icc(bandwidth); + icc_set_bw(ctx->icc_path, avg_bw, peak_bw); + + dev_dbg(ctx->dev, "safe bandwidth %lu Bps\n", bandwidth); +} + +static void mixer_icc_request_fn(struct work_struct *work) +{ + struct mixer_context *ctx = container_of(work, struct mixer_context, + work); + mutex_lock(&ctx->icc_lock); + mixer_set_icc_bandwidth(ctx, ctx->icc_bandwidth); + mutex_unlock(&ctx->icc_lock); +} + static void mixer_atomic_begin(struct exynos_drm_crtc *crtc) { struct mixer_context *ctx = crtc->ctx; @@ -980,12 +1062,35 @@ static void mixer_disable_plane(struct exynos_drm_crtc *crtc, static void mixer_atomic_flush(struct exynos_drm_crtc *crtc) { - struct mixer_context *mixer_ctx = crtc->ctx; + struct mixer_context *ctx = crtc->ctx; + int bw, prev_bw; - if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) + if (!test_bit(MXR_BIT_POWERED, &ctx->flags)) return; - mixer_enable_sync(mixer_ctx); + /* + * Request necessary bandwidth on the interconnects. If new + * bandwidth is greater than current value set the new value + * immediately. Otherwise request lower bandwidth only after + * VSYNC, after the HW has actually switched to new video + * frame settings. + */ + if (ctx->icc_path) { + bw = mixer_get_memory_bandwidth(crtc); + + mutex_lock(&ctx->icc_lock); + prev_bw = ctx->icc_bandwidth; + ctx->icc_bandwidth = bw; + + if (bw > prev_bw) + mixer_set_icc_bandwidth(ctx, bw); + else if (bw < prev_bw) + set_bit(MXR_BIT_REQUEST_BW, &ctx->flags); + + mutex_unlock(&ctx->icc_lock); + } + + mixer_enable_sync(ctx); exynos_crtc_handle_event(crtc); } @@ -1036,6 +1141,8 @@ static void mixer_atomic_disable(struct exynos_drm_crtc *crtc) pm_runtime_put(ctx->dev); + mixer_set_icc_bandwidth(ctx, 0); + clear_bit(MXR_BIT_POWERED, &ctx->flags); } @@ -1223,19 +1330,33 @@ static int mixer_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; const struct mixer_drv_data *drv; struct mixer_context *ctx; + struct icc_path *path; int ret; + /* + * Returns NULL if CONFIG_INTERCONNECT is disabled or if "interconnects" + * property does not exist. May return ERR_PTR(-EPROBE_DEFER). + */ + path = of_icc_get(dev, NULL); + if (IS_ERR(path)) + return PTR_ERR(path); + ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); if (!ctx) { DRM_DEV_ERROR(dev, "failed to alloc mixer context.\n"); - return -ENOMEM; + ret = -ENOMEM; + goto err; } drv = of_device_get_match_data(dev); + INIT_WORK(&ctx->work, mixer_icc_request_fn); + mutex_init(&ctx->icc_lock); + ctx->pdev = pdev; ctx->dev = dev; ctx->mxr_ver = drv->version; + ctx->icc_path = path; if (drv->is_vp_enabled) __set_bit(MXR_BIT_VP_ENABLED, &ctx->flags); @@ -1247,17 +1368,26 @@ static int mixer_probe(struct platform_device *pdev) pm_runtime_enable(dev); ret = component_add(&pdev->dev, &mixer_component_ops); - if (ret) + if (ret) { pm_runtime_disable(dev); - + goto err; + } + return 0; +err: + icc_put(path); return ret; } static int mixer_remove(struct platform_device *pdev) { - pm_runtime_disable(&pdev->dev); + struct device *dev = &pdev->dev; + struct mixer_context *ctx = dev_get_drvdata(dev); + + pm_runtime_disable(dev); + + component_del(dev, &mixer_component_ops); - component_del(&pdev->dev, &mixer_component_ops); + icc_put(ctx->icc_path); return 0; }