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[209.132.180.67]) by mx.google.com with ESMTP id t184si6984764pgb.591.2017.12.22.01.26.55; Fri, 22 Dec 2017 01:26:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=olSKsZ27; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757672AbdLVJ0w (ORCPT + 4 others); Fri, 22 Dec 2017 04:26:52 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:55026 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755845AbdLVJ01 (ORCPT ); Fri, 22 Dec 2017 04:26:27 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBM9Q9CX011389; Fri, 22 Dec 2017 03:26:09 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513934769; bh=6eaz3v+15HF7lZIE7u8QQzPsnPNAFqBuYhFvdvVUvfY=; h=From:To:CC:Subject:Date; b=olSKsZ27qI1TVfgBK8DPFOmOWUFadZ7ose9q0CjVpSq1ySEtrq+uJs0Ug98O1q+o0 jeY21dVgRgIb8o32UAqoIPDDv69ckqCsykbVp7M+HT371q3/HG185rKcaumuqG1ylk 8FsN3edG9ETzTlhn4kIbZGUFGSa3xlkHyTGVZx+o= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBM9Q957006472; Fri, 22 Dec 2017 03:26:09 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 22 Dec 2017 03:26:09 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 22 Dec 2017 03:26:09 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBM9Q7XN010392; Fri, 22 Dec 2017 03:26:08 -0600 From: Tero Kristo To: , , CC: Subject: [PATCH] ARM: OMAP2+: hwmod_core: enable optional clocks before main clock Date: Fri, 22 Dec 2017 11:26:03 +0200 Message-ID: <1513934763-23966-1-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The optional clocks must be enabled before the main clock after the transition to clkctrl controlled clocks is done. Otherwise the module we attempt to enable might be stuck in transition. Reported-by: Keerthy Signed-off-by: Tero Kristo --- Hi Tony, This patch fixes a regression seen in linux-next, where certain peripherals fail to enable after the clkctrl changes are in. The case seen has been with mcasp3, where it fails to transition to enabled during the audio driver probe. Not sure where you want to pick this up, maybe as early rc fixes if its too late to push this to linux-next? arch/arm/mach-omap2/omap_hwmod.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 1.9.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Tested-by: Keerthy diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 7324048..340d05c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -976,6 +976,9 @@ static int _enable_clocks(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); + if (oh->flags & HWMOD_OPT_CLKS_NEEDED) + _enable_optional_clocks(oh); + if (oh->_clk) clk_enable(oh->_clk); @@ -984,9 +987,6 @@ static int _enable_clocks(struct omap_hwmod *oh) clk_enable(os->_clk); } - if (oh->flags & HWMOD_OPT_CLKS_NEEDED) - _enable_optional_clocks(oh); - /* The opt clocks are controlled by the device driver. */ return 0;